pinctrl: Add pinctrl-s3c24xx driver

The s3c24xx pins follow a similar pattern as the other Samsung SoCs and
can therefore reuse the already introduced infrastructure.

The s3c24xx SoCs have one design oddity in that the first 4 external
interrupts do not reside in the eint pending register but in the main
interrupt controller instead. We solve this by forwarding the external
interrupt from the main controller into the irq domain of the pin bank.
The masking/acking of these interrupts is handled in the same way.

Furthermore the S3C2412/2413 SoCs contain another oddity in that they
keep the same 4 eints in the main interrupt controller and eintpend
register and requiring ack operations to happen in both. This is solved
by using different compatible properties for the wakeup eint node which
set a property accordingly.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>

1 files changed, 4 insertions, 0 deletions

diff --git a/drivers/gpio/gpio-samsung.c b/drivers/gpio/gpio-samsung.c
index b22ca7933745..83a0d711b154 100644
--- a/drivers/gpio/gpio-samsung.c
+++ b/drivers/gpio/gpio-samsung.c
@@ -3026,6 +3026,10 @@ static __init int samsung_gpiolib_init(void)
         */
         struct device_node *pctrl_np;
         static const struct of_device_id exynos_pinctrl_ids[] = {
+                { .compatible = "samsung,s3c2412-pinctrl", },
+                { .compatible = "samsung,s3c2416-pinctrl", },
+                { .compatible = "samsung,s3c2440-pinctrl", },
+                { .compatible = "samsung,s3c2450-pinctrl", },
                 { .compatible = "samsung,exynos4210-pinctrl", },
                 { .compatible = "samsung,exynos4x12-pinctrl", },
                 { .compatible = "samsung,exynos5250-pinctrl", },