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authorJiri Kosina <jkosina@suse.cz>2014-11-20 08:42:02 -0500
committerJiri Kosina <jkosina@suse.cz>2014-11-20 08:42:02 -0500
commita02001086bbfb4da35d1228bebc2f1b442db455f (patch)
tree62ab47936cef06fd08657ca5b6cd1df98c19be57 /drivers/gpio
parenteff264efeeb0898408e8c9df72d8a32621035bed (diff)
parentfc14f9c1272f62c3e8d01300f52467c0d9af50f9 (diff)
Merge Linus' tree to be be to apply submitted patches to newer code than
current trivial.git base
Diffstat (limited to 'drivers/gpio')
-rw-r--r--drivers/gpio/Kconfig37
-rw-r--r--drivers/gpio/Makefile5
-rw-r--r--drivers/gpio/devres.c42
-rw-r--r--drivers/gpio/gpio-74x164.c8
-rw-r--r--drivers/gpio/gpio-adnp.c164
-rw-r--r--drivers/gpio/gpio-adp5520.c8
-rw-r--r--drivers/gpio/gpio-adp5588.c6
-rw-r--r--drivers/gpio/gpio-amd8111.c3
-rw-r--r--drivers/gpio/gpio-arizona.c3
-rw-r--r--drivers/gpio/gpio-bcm-kona.c2
-rw-r--r--drivers/gpio/gpio-bt8xx.c3
-rw-r--r--drivers/gpio/gpio-crystalcove.c390
-rw-r--r--drivers/gpio/gpio-cs5535.c17
-rw-r--r--drivers/gpio/gpio-da9052.c3
-rw-r--r--drivers/gpio/gpio-da9055.c3
-rw-r--r--drivers/gpio/gpio-dwapb.c412
-rw-r--r--drivers/gpio/gpio-em.c5
-rw-r--r--drivers/gpio/gpio-f7188x.c18
-rw-r--r--drivers/gpio/gpio-generic.c3
-rw-r--r--drivers/gpio/gpio-grgpio.c4
-rw-r--r--drivers/gpio/gpio-ich.c9
-rw-r--r--drivers/gpio/gpio-intel-mid.c86
-rw-r--r--drivers/gpio/gpio-it8761e.c6
-rw-r--r--drivers/gpio/gpio-janz-ttl.c8
-rw-r--r--drivers/gpio/gpio-kempld.c3
-rw-r--r--drivers/gpio/gpio-ks8695.c30
-rw-r--r--drivers/gpio/gpio-lp3943.c3
-rw-r--r--drivers/gpio/gpio-lpc32xx.c2
-rw-r--r--drivers/gpio/gpio-lynxpoint.c116
-rw-r--r--drivers/gpio/gpio-max730x.c13
-rw-r--r--drivers/gpio/gpio-max732x.c7
-rw-r--r--drivers/gpio/gpio-mc33880.c11
-rw-r--r--drivers/gpio/gpio-mc9s08dz60.c3
-rw-r--r--drivers/gpio/gpio-mcp23s08.c90
-rw-r--r--drivers/gpio/gpio-ml-ioh.c8
-rw-r--r--drivers/gpio/gpio-msm-v2.c5
-rw-r--r--drivers/gpio/gpio-mxc.c2
-rw-r--r--drivers/gpio/gpio-octeon.c3
-rw-r--r--drivers/gpio/gpio-omap.c296
-rw-r--r--drivers/gpio/gpio-palmas.c3
-rw-r--r--drivers/gpio/gpio-pca953x.c61
-rw-r--r--drivers/gpio/gpio-pcf857x.c4
-rw-r--r--drivers/gpio/gpio-pch.c12
-rw-r--r--drivers/gpio/gpio-pxa.c7
-rw-r--r--drivers/gpio/gpio-rc5t583.c3
-rw-r--r--drivers/gpio/gpio-rcar.c9
-rw-r--r--drivers/gpio/gpio-rdc321x.c7
-rw-r--r--drivers/gpio/gpio-samsung.c1015
-rw-r--r--drivers/gpio/gpio-sch.c16
-rw-r--r--drivers/gpio/gpio-sch311x.c6
-rw-r--r--drivers/gpio/gpio-sodaville.c4
-rw-r--r--drivers/gpio/gpio-stmpe.c212
-rw-r--r--drivers/gpio/gpio-stp-xway.c2
-rw-r--r--drivers/gpio/gpio-sx150x.c7
-rw-r--r--drivers/gpio/gpio-syscon.c97
-rw-r--r--drivers/gpio/gpio-tb10x.c5
-rw-r--r--drivers/gpio/gpio-tc3589x.c13
-rw-r--r--drivers/gpio/gpio-timberdale.c5
-rw-r--r--drivers/gpio/gpio-tps6586x.c3
-rw-r--r--drivers/gpio/gpio-tps65910.c3
-rw-r--r--drivers/gpio/gpio-tps65912.c3
-rw-r--r--drivers/gpio/gpio-ts5500.c6
-rw-r--r--drivers/gpio/gpio-twl4030.c6
-rw-r--r--drivers/gpio/gpio-twl6040.c3
-rw-r--r--drivers/gpio/gpio-ucb1400.c4
-rw-r--r--drivers/gpio/gpio-viperboard.c10
-rw-r--r--drivers/gpio/gpio-vr41xx.c8
-rw-r--r--drivers/gpio/gpio-vx855.c3
-rw-r--r--drivers/gpio/gpio-wm831x.c3
-rw-r--r--drivers/gpio/gpio-wm8350.c3
-rw-r--r--drivers/gpio/gpio-wm8994.c3
-rw-r--r--drivers/gpio/gpio-xgene.c244
-rw-r--r--drivers/gpio/gpio-xilinx.c27
-rw-r--r--drivers/gpio/gpio-zynq.c727
-rw-r--r--drivers/gpio/gpiolib-acpi.c79
-rw-r--r--drivers/gpio/gpiolib-legacy.c102
-rw-r--r--drivers/gpio/gpiolib-of.c14
-rw-r--r--drivers/gpio/gpiolib-sysfs.c827
-rw-r--r--drivers/gpio/gpiolib.c1363
-rw-r--r--drivers/gpio/gpiolib.h105
80 files changed, 3640 insertions, 3231 deletions
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index 4a1b5113e527..0959ca9b6b27 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -136,7 +136,6 @@ config GPIO_DWAPB
136 tristate "Synopsys DesignWare APB GPIO driver" 136 tristate "Synopsys DesignWare APB GPIO driver"
137 select GPIO_GENERIC 137 select GPIO_GENERIC
138 select GENERIC_IRQ_CHIP 138 select GENERIC_IRQ_CHIP
139 depends on OF_GPIO
140 help 139 help
141 Say Y or M here to build support for the Synopsys DesignWare APB 140 Say Y or M here to build support for the Synopsys DesignWare APB
142 GPIO block. 141 GPIO block.
@@ -334,12 +333,28 @@ config GPIO_TZ1090_PDC
334 help 333 help
335 Say yes here to support Toumaz Xenif TZ1090 PDC GPIOs. 334 Say yes here to support Toumaz Xenif TZ1090 PDC GPIOs.
336 335
336config GPIO_XGENE
337 bool "APM X-Gene GPIO controller support"
338 depends on ARM64 && OF_GPIO
339 help
340 This driver is to support the GPIO block within the APM X-Gene SoC
341 platform's generic flash controller. The GPIO pins are muxed with
342 the generic flash controller's address and data pins. Say yes
343 here to enable the GFC GPIO functionality.
344
337config GPIO_XILINX 345config GPIO_XILINX
338 bool "Xilinx GPIO support" 346 bool "Xilinx GPIO support"
339 depends on PPC_OF || MICROBLAZE || ARCH_ZYNQ 347 depends on PPC_OF || MICROBLAZE || ARCH_ZYNQ
340 help 348 help
341 Say yes here to support the Xilinx FPGA GPIO device 349 Say yes here to support the Xilinx FPGA GPIO device
342 350
351config GPIO_ZYNQ
352 tristate "Xilinx Zynq GPIO support"
353 depends on ARCH_ZYNQ
354 select GPIOLIB_IRQCHIP
355 help
356 Say yes here to support Xilinx Zynq GPIO controller.
357
343config GPIO_XTENSA 358config GPIO_XTENSA
344 bool "Xtensa GPIO32 support" 359 bool "Xtensa GPIO32 support"
345 depends on XTENSA 360 depends on XTENSA
@@ -423,7 +438,7 @@ config GPIO_GE_FPGA
423config GPIO_LYNXPOINT 438config GPIO_LYNXPOINT
424 tristate "Intel Lynxpoint GPIO support" 439 tristate "Intel Lynxpoint GPIO support"
425 depends on ACPI && X86 440 depends on ACPI && X86
426 select IRQ_DOMAIN 441 select GPIOLIB_IRQCHIP
427 help 442 help
428 driver for GPIO functionality on Intel Lynxpoint PCH chipset 443 driver for GPIO functionality on Intel Lynxpoint PCH chipset
429 Requires ACPI device enumeration code to set up a platform device. 444 Requires ACPI device enumeration code to set up a platform device.
@@ -450,6 +465,19 @@ config GPIO_ARIZONA
450 help 465 help
451 Support for GPIOs on Wolfson Arizona class devices. 466 Support for GPIOs on Wolfson Arizona class devices.
452 467
468config GPIO_CRYSTAL_COVE
469 tristate "GPIO support for Crystal Cove PMIC"
470 depends on INTEL_SOC_PMIC
471 select GPIOLIB_IRQCHIP
472 help
473 Support for GPIO pins on Crystal Cove PMIC.
474
475 Say Yes if you have a Intel SoC based tablet with Crystal Cove PMIC
476 inside.
477
478 This driver can also be built as a module. If so, the module will be
479 called gpio-crystalcove.
480
453config GPIO_LP3943 481config GPIO_LP3943
454 tristate "TI/National Semiconductor LP3943 GPIO expander" 482 tristate "TI/National Semiconductor LP3943 GPIO expander"
455 depends on MFD_LP3943 483 depends on MFD_LP3943
@@ -573,6 +601,7 @@ config GPIO_SX150X
573config GPIO_STMPE 601config GPIO_STMPE
574 bool "STMPE GPIOs" 602 bool "STMPE GPIOs"
575 depends on MFD_STMPE 603 depends on MFD_STMPE
604 select GPIOLIB_IRQCHIP
576 help 605 help
577 This enables support for the GPIOs found on the STMPE I/O 606 This enables support for the GPIOs found on the STMPE I/O
578 Expanders. 607 Expanders.
@@ -660,6 +689,7 @@ config GPIO_ADP5588_IRQ
660config GPIO_ADNP 689config GPIO_ADNP
661 tristate "Avionic Design N-bit GPIO expander" 690 tristate "Avionic Design N-bit GPIO expander"
662 depends on I2C && OF_GPIO 691 depends on I2C && OF_GPIO
692 select GPIOLIB_IRQCHIP
663 help 693 help
664 This option enables support for N GPIOs found on Avionic Design 694 This option enables support for N GPIOs found on Avionic Design
665 I2C GPIO expanders. The register space will be extended by powers 695 I2C GPIO expanders. The register space will be extended by powers
@@ -775,7 +805,6 @@ config GPIO_MAX7301
775 805
776config GPIO_MCP23S08 806config GPIO_MCP23S08
777 tristate "Microchip MCP23xxx I/O expander" 807 tristate "Microchip MCP23xxx I/O expander"
778 depends on OF_GPIO
779 depends on (SPI_MASTER && !I2C) || I2C 808 depends on (SPI_MASTER && !I2C) || I2C
780 help 809 help
781 SPI/I2C driver for Microchip MCP23S08/MCP23S17/MCP23008/MCP23017 810 SPI/I2C driver for Microchip MCP23S08/MCP23S17/MCP23008/MCP23017
@@ -859,7 +888,7 @@ config GPIO_MSIC
859 888
860config GPIO_BCM_KONA 889config GPIO_BCM_KONA
861 bool "Broadcom Kona GPIO" 890 bool "Broadcom Kona GPIO"
862 depends on OF_GPIO 891 depends on OF_GPIO && (ARCH_BCM_MOBILE || COMPILE_TEST)
863 help 892 help
864 Turn on GPIO support for Broadcom "Kona" chips. 893 Turn on GPIO support for Broadcom "Kona" chips.
865 894
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index d10f6a9d875a..e5d346cf3b6e 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -4,7 +4,9 @@ ccflags-$(CONFIG_DEBUG_GPIO) += -DDEBUG
4 4
5obj-$(CONFIG_GPIO_DEVRES) += devres.o 5obj-$(CONFIG_GPIO_DEVRES) += devres.o
6obj-$(CONFIG_GPIOLIB) += gpiolib.o 6obj-$(CONFIG_GPIOLIB) += gpiolib.o
7obj-$(CONFIG_GPIOLIB) += gpiolib-legacy.o
7obj-$(CONFIG_OF_GPIO) += gpiolib-of.o 8obj-$(CONFIG_OF_GPIO) += gpiolib-of.o
9obj-$(CONFIG_GPIO_SYSFS) += gpiolib-sysfs.o
8obj-$(CONFIG_GPIO_ACPI) += gpiolib-acpi.o 10obj-$(CONFIG_GPIO_ACPI) += gpiolib-acpi.o
9 11
10# Device drivers. Generally keep list sorted alphabetically 12# Device drivers. Generally keep list sorted alphabetically
@@ -20,6 +22,7 @@ obj-$(CONFIG_GPIO_BCM_KONA) += gpio-bcm-kona.o
20obj-$(CONFIG_GPIO_BT8XX) += gpio-bt8xx.o 22obj-$(CONFIG_GPIO_BT8XX) += gpio-bt8xx.o
21obj-$(CONFIG_GPIO_CLPS711X) += gpio-clps711x.o 23obj-$(CONFIG_GPIO_CLPS711X) += gpio-clps711x.o
22obj-$(CONFIG_GPIO_CS5535) += gpio-cs5535.o 24obj-$(CONFIG_GPIO_CS5535) += gpio-cs5535.o
25obj-$(CONFIG_GPIO_CRYSTAL_COVE) += gpio-crystalcove.o
23obj-$(CONFIG_GPIO_DA9052) += gpio-da9052.o 26obj-$(CONFIG_GPIO_DA9052) += gpio-da9052.o
24obj-$(CONFIG_GPIO_DA9055) += gpio-da9055.o 27obj-$(CONFIG_GPIO_DA9055) += gpio-da9055.o
25obj-$(CONFIG_GPIO_DAVINCI) += gpio-davinci.o 28obj-$(CONFIG_GPIO_DAVINCI) += gpio-davinci.o
@@ -98,6 +101,8 @@ obj-$(CONFIG_GPIO_VX855) += gpio-vx855.o
98obj-$(CONFIG_GPIO_WM831X) += gpio-wm831x.o 101obj-$(CONFIG_GPIO_WM831X) += gpio-wm831x.o
99obj-$(CONFIG_GPIO_WM8350) += gpio-wm8350.o 102obj-$(CONFIG_GPIO_WM8350) += gpio-wm8350.o
100obj-$(CONFIG_GPIO_WM8994) += gpio-wm8994.o 103obj-$(CONFIG_GPIO_WM8994) += gpio-wm8994.o
104obj-$(CONFIG_GPIO_XGENE) += gpio-xgene.o
101obj-$(CONFIG_GPIO_XILINX) += gpio-xilinx.o 105obj-$(CONFIG_GPIO_XILINX) += gpio-xilinx.o
102obj-$(CONFIG_GPIO_XTENSA) += gpio-xtensa.o 106obj-$(CONFIG_GPIO_XTENSA) += gpio-xtensa.o
103obj-$(CONFIG_GPIO_ZEVIO) += gpio-zevio.o 107obj-$(CONFIG_GPIO_ZEVIO) += gpio-zevio.o
108obj-$(CONFIG_GPIO_ZYNQ) += gpio-zynq.o
diff --git a/drivers/gpio/devres.c b/drivers/gpio/devres.c
index 65978cf85f79..954b9f6b0ef8 100644
--- a/drivers/gpio/devres.c
+++ b/drivers/gpio/devres.c
@@ -39,57 +39,63 @@ static int devm_gpiod_match(struct device *dev, void *res, void *data)
39 * devm_gpiod_get - Resource-managed gpiod_get() 39 * devm_gpiod_get - Resource-managed gpiod_get()
40 * @dev: GPIO consumer 40 * @dev: GPIO consumer
41 * @con_id: function within the GPIO consumer 41 * @con_id: function within the GPIO consumer
42 * @flags: optional GPIO initialization flags
42 * 43 *
43 * Managed gpiod_get(). GPIO descriptors returned from this function are 44 * Managed gpiod_get(). GPIO descriptors returned from this function are
44 * automatically disposed on driver detach. See gpiod_get() for detailed 45 * automatically disposed on driver detach. See gpiod_get() for detailed
45 * information about behavior and return values. 46 * information about behavior and return values.
46 */ 47 */
47struct gpio_desc *__must_check devm_gpiod_get(struct device *dev, 48struct gpio_desc *__must_check __devm_gpiod_get(struct device *dev,
48 const char *con_id) 49 const char *con_id,
50 enum gpiod_flags flags)
49{ 51{
50 return devm_gpiod_get_index(dev, con_id, 0); 52 return devm_gpiod_get_index(dev, con_id, 0, flags);
51} 53}
52EXPORT_SYMBOL(devm_gpiod_get); 54EXPORT_SYMBOL(__devm_gpiod_get);
53 55
54/** 56/**
55 * devm_gpiod_get_optional - Resource-managed gpiod_get_optional() 57 * devm_gpiod_get_optional - Resource-managed gpiod_get_optional()
56 * @dev: GPIO consumer 58 * @dev: GPIO consumer
57 * @con_id: function within the GPIO consumer 59 * @con_id: function within the GPIO consumer
60 * @flags: optional GPIO initialization flags
58 * 61 *
59 * Managed gpiod_get_optional(). GPIO descriptors returned from this function 62 * Managed gpiod_get_optional(). GPIO descriptors returned from this function
60 * are automatically disposed on driver detach. See gpiod_get_optional() for 63 * are automatically disposed on driver detach. See gpiod_get_optional() for
61 * detailed information about behavior and return values. 64 * detailed information about behavior and return values.
62 */ 65 */
63struct gpio_desc *__must_check devm_gpiod_get_optional(struct device *dev, 66struct gpio_desc *__must_check __devm_gpiod_get_optional(struct device *dev,
64 const char *con_id) 67 const char *con_id,
68 enum gpiod_flags flags)
65{ 69{
66 return devm_gpiod_get_index_optional(dev, con_id, 0); 70 return devm_gpiod_get_index_optional(dev, con_id, 0, flags);
67} 71}
68EXPORT_SYMBOL(devm_gpiod_get_optional); 72EXPORT_SYMBOL(__devm_gpiod_get_optional);
69 73
70/** 74/**
71 * devm_gpiod_get_index - Resource-managed gpiod_get_index() 75 * devm_gpiod_get_index - Resource-managed gpiod_get_index()
72 * @dev: GPIO consumer 76 * @dev: GPIO consumer
73 * @con_id: function within the GPIO consumer 77 * @con_id: function within the GPIO consumer
74 * @idx: index of the GPIO to obtain in the consumer 78 * @idx: index of the GPIO to obtain in the consumer
79 * @flags: optional GPIO initialization flags
75 * 80 *
76 * Managed gpiod_get_index(). GPIO descriptors returned from this function are 81 * Managed gpiod_get_index(). GPIO descriptors returned from this function are
77 * automatically disposed on driver detach. See gpiod_get_index() for detailed 82 * automatically disposed on driver detach. See gpiod_get_index() for detailed
78 * information about behavior and return values. 83 * information about behavior and return values.
79 */ 84 */
80struct gpio_desc *__must_check devm_gpiod_get_index(struct device *dev, 85struct gpio_desc *__must_check __devm_gpiod_get_index(struct device *dev,
81 const char *con_id, 86 const char *con_id,
82 unsigned int idx) 87 unsigned int idx,
88 enum gpiod_flags flags)
83{ 89{
84 struct gpio_desc **dr; 90 struct gpio_desc **dr;
85 struct gpio_desc *desc; 91 struct gpio_desc *desc;
86 92
87 dr = devres_alloc(devm_gpiod_release, sizeof(struct gpiod_desc *), 93 dr = devres_alloc(devm_gpiod_release, sizeof(struct gpio_desc *),
88 GFP_KERNEL); 94 GFP_KERNEL);
89 if (!dr) 95 if (!dr)
90 return ERR_PTR(-ENOMEM); 96 return ERR_PTR(-ENOMEM);
91 97
92 desc = gpiod_get_index(dev, con_id, idx); 98 desc = gpiod_get_index(dev, con_id, idx, flags);
93 if (IS_ERR(desc)) { 99 if (IS_ERR(desc)) {
94 devres_free(dr); 100 devres_free(dr);
95 return desc; 101 return desc;
@@ -100,26 +106,28 @@ struct gpio_desc *__must_check devm_gpiod_get_index(struct device *dev,
100 106
101 return desc; 107 return desc;
102} 108}
103EXPORT_SYMBOL(devm_gpiod_get_index); 109EXPORT_SYMBOL(__devm_gpiod_get_index);
104 110
105/** 111/**
106 * devm_gpiod_get_index_optional - Resource-managed gpiod_get_index_optional() 112 * devm_gpiod_get_index_optional - Resource-managed gpiod_get_index_optional()
107 * @dev: GPIO consumer 113 * @dev: GPIO consumer
108 * @con_id: function within the GPIO consumer 114 * @con_id: function within the GPIO consumer
109 * @index: index of the GPIO to obtain in the consumer 115 * @index: index of the GPIO to obtain in the consumer
116 * @flags: optional GPIO initialization flags
110 * 117 *
111 * Managed gpiod_get_index_optional(). GPIO descriptors returned from this 118 * Managed gpiod_get_index_optional(). GPIO descriptors returned from this
112 * function are automatically disposed on driver detach. See 119 * function are automatically disposed on driver detach. See
113 * gpiod_get_index_optional() for detailed information about behavior and 120 * gpiod_get_index_optional() for detailed information about behavior and
114 * return values. 121 * return values.
115 */ 122 */
116struct gpio_desc *__must_check devm_gpiod_get_index_optional(struct device *dev, 123struct gpio_desc *__must_check __devm_gpiod_get_index_optional(struct device *dev,
117 const char *con_id, 124 const char *con_id,
118 unsigned int index) 125 unsigned int index,
126 enum gpiod_flags flags)
119{ 127{
120 struct gpio_desc *desc; 128 struct gpio_desc *desc;
121 129
122 desc = devm_gpiod_get_index(dev, con_id, index); 130 desc = devm_gpiod_get_index(dev, con_id, index, flags);
123 if (IS_ERR(desc)) { 131 if (IS_ERR(desc)) {
124 if (PTR_ERR(desc) == -ENOENT) 132 if (PTR_ERR(desc) == -ENOENT)
125 return NULL; 133 return NULL;
@@ -127,7 +135,7 @@ struct gpio_desc *__must_check devm_gpiod_get_index_optional(struct device *dev,
127 135
128 return desc; 136 return desc;
129} 137}
130EXPORT_SYMBOL(devm_gpiod_get_index_optional); 138EXPORT_SYMBOL(__devm_gpiod_get_index_optional);
131 139
132/** 140/**
133 * devm_gpiod_put - Resource-managed gpiod_put() 141 * devm_gpiod_put - Resource-managed gpiod_put()
diff --git a/drivers/gpio/gpio-74x164.c b/drivers/gpio/gpio-74x164.c
index e4ae29824c32..e3d968f751f1 100644
--- a/drivers/gpio/gpio-74x164.c
+++ b/drivers/gpio/gpio-74x164.c
@@ -167,13 +167,11 @@ exit_destroy:
167static int gen_74x164_remove(struct spi_device *spi) 167static int gen_74x164_remove(struct spi_device *spi)
168{ 168{
169 struct gen_74x164_chip *chip = spi_get_drvdata(spi); 169 struct gen_74x164_chip *chip = spi_get_drvdata(spi);
170 int ret;
171 170
172 ret = gpiochip_remove(&chip->gpio_chip); 171 gpiochip_remove(&chip->gpio_chip);
173 if (!ret) 172 mutex_destroy(&chip->lock);
174 mutex_destroy(&chip->lock);
175 173
176 return ret; 174 return 0;
177} 175}
178 176
179static const struct of_device_id gen_74x164_dt_ids[] = { 177static const struct of_device_id gen_74x164_dt_ids[] = {
diff --git a/drivers/gpio/gpio-adnp.c b/drivers/gpio/gpio-adnp.c
index b2239d678d01..d3d0a90fe542 100644
--- a/drivers/gpio/gpio-adnp.c
+++ b/drivers/gpio/gpio-adnp.c
@@ -6,10 +6,9 @@
6 * published by the Free Software Foundation. 6 * published by the Free Software Foundation.
7 */ 7 */
8 8
9#include <linux/gpio.h> 9#include <linux/gpio/driver.h>
10#include <linux/i2c.h> 10#include <linux/i2c.h>
11#include <linux/interrupt.h> 11#include <linux/interrupt.h>
12#include <linux/irqdomain.h>
13#include <linux/module.h> 12#include <linux/module.h>
14#include <linux/of_irq.h> 13#include <linux/of_irq.h>
15#include <linux/seq_file.h> 14#include <linux/seq_file.h>
@@ -27,8 +26,6 @@ struct adnp {
27 unsigned int reg_shift; 26 unsigned int reg_shift;
28 27
29 struct mutex i2c_lock; 28 struct mutex i2c_lock;
30
31 struct irq_domain *domain;
32 struct mutex irq_lock; 29 struct mutex irq_lock;
33 30
34 u8 *irq_enable; 31 u8 *irq_enable;
@@ -253,6 +250,7 @@ static void adnp_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
253static int adnp_gpio_setup(struct adnp *adnp, unsigned int num_gpios) 250static int adnp_gpio_setup(struct adnp *adnp, unsigned int num_gpios)
254{ 251{
255 struct gpio_chip *chip = &adnp->gpio; 252 struct gpio_chip *chip = &adnp->gpio;
253 int err;
256 254
257 adnp->reg_shift = get_count_order(num_gpios) - 3; 255 adnp->reg_shift = get_count_order(num_gpios) - 3;
258 256
@@ -272,6 +270,10 @@ static int adnp_gpio_setup(struct adnp *adnp, unsigned int num_gpios)
272 chip->of_node = chip->dev->of_node; 270 chip->of_node = chip->dev->of_node;
273 chip->owner = THIS_MODULE; 271 chip->owner = THIS_MODULE;
274 272
273 err = gpiochip_add(chip);
274 if (err)
275 return err;
276
275 return 0; 277 return 0;
276} 278}
277 279
@@ -326,7 +328,8 @@ static irqreturn_t adnp_irq(int irq, void *data)
326 328
327 for_each_set_bit(bit, &pending, 8) { 329 for_each_set_bit(bit, &pending, 8) {
328 unsigned int child_irq; 330 unsigned int child_irq;
329 child_irq = irq_find_mapping(adnp->domain, base + bit); 331 child_irq = irq_find_mapping(adnp->gpio.irqdomain,
332 base + bit);
330 handle_nested_irq(child_irq); 333 handle_nested_irq(child_irq);
331 } 334 }
332 } 335 }
@@ -334,35 +337,32 @@ static irqreturn_t adnp_irq(int irq, void *data)
334 return IRQ_HANDLED; 337 return IRQ_HANDLED;
335} 338}
336 339
337static int adnp_gpio_to_irq(struct gpio_chip *chip, unsigned offset) 340static void adnp_irq_mask(struct irq_data *d)
338{ 341{
339 struct adnp *adnp = to_adnp(chip); 342 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
340 return irq_create_mapping(adnp->domain, offset); 343 struct adnp *adnp = to_adnp(gc);
341} 344 unsigned int reg = d->hwirq >> adnp->reg_shift;
342 345 unsigned int pos = d->hwirq & 7;
343static void adnp_irq_mask(struct irq_data *data)
344{
345 struct adnp *adnp = irq_data_get_irq_chip_data(data);
346 unsigned int reg = data->hwirq >> adnp->reg_shift;
347 unsigned int pos = data->hwirq & 7;
348 346
349 adnp->irq_enable[reg] &= ~BIT(pos); 347 adnp->irq_enable[reg] &= ~BIT(pos);
350} 348}
351 349
352static void adnp_irq_unmask(struct irq_data *data) 350static void adnp_irq_unmask(struct irq_data *d)
353{ 351{
354 struct adnp *adnp = irq_data_get_irq_chip_data(data); 352 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
355 unsigned int reg = data->hwirq >> adnp->reg_shift; 353 struct adnp *adnp = to_adnp(gc);
356 unsigned int pos = data->hwirq & 7; 354 unsigned int reg = d->hwirq >> adnp->reg_shift;
355 unsigned int pos = d->hwirq & 7;
357 356
358 adnp->irq_enable[reg] |= BIT(pos); 357 adnp->irq_enable[reg] |= BIT(pos);
359} 358}
360 359
361static int adnp_irq_set_type(struct irq_data *data, unsigned int type) 360static int adnp_irq_set_type(struct irq_data *d, unsigned int type)
362{ 361{
363 struct adnp *adnp = irq_data_get_irq_chip_data(data); 362 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
364 unsigned int reg = data->hwirq >> adnp->reg_shift; 363 struct adnp *adnp = to_adnp(gc);
365 unsigned int pos = data->hwirq & 7; 364 unsigned int reg = d->hwirq >> adnp->reg_shift;
365 unsigned int pos = d->hwirq & 7;
366 366
367 if (type & IRQ_TYPE_EDGE_RISING) 367 if (type & IRQ_TYPE_EDGE_RISING)
368 adnp->irq_rise[reg] |= BIT(pos); 368 adnp->irq_rise[reg] |= BIT(pos);
@@ -387,16 +387,18 @@ static int adnp_irq_set_type(struct irq_data *data, unsigned int type)
387 return 0; 387 return 0;
388} 388}
389 389
390static void adnp_irq_bus_lock(struct irq_data *data) 390static void adnp_irq_bus_lock(struct irq_data *d)
391{ 391{
392 struct adnp *adnp = irq_data_get_irq_chip_data(data); 392 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
393 struct adnp *adnp = to_adnp(gc);
393 394
394 mutex_lock(&adnp->irq_lock); 395 mutex_lock(&adnp->irq_lock);
395} 396}
396 397
397static void adnp_irq_bus_unlock(struct irq_data *data) 398static void adnp_irq_bus_unlock(struct irq_data *d)
398{ 399{
399 struct adnp *adnp = irq_data_get_irq_chip_data(data); 400 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
401 struct adnp *adnp = to_adnp(gc);
400 unsigned int num_regs = 1 << adnp->reg_shift, i; 402 unsigned int num_regs = 1 << adnp->reg_shift, i;
401 403
402 mutex_lock(&adnp->i2c_lock); 404 mutex_lock(&adnp->i2c_lock);
@@ -408,26 +410,6 @@ static void adnp_irq_bus_unlock(struct irq_data *data)
408 mutex_unlock(&adnp->irq_lock); 410 mutex_unlock(&adnp->irq_lock);
409} 411}
410 412
411static int adnp_irq_reqres(struct irq_data *data)
412{
413 struct adnp *adnp = irq_data_get_irq_chip_data(data);
414
415 if (gpio_lock_as_irq(&adnp->gpio, data->hwirq)) {
416 dev_err(adnp->gpio.dev,
417 "unable to lock HW IRQ %lu for IRQ\n",
418 data->hwirq);
419 return -EINVAL;
420 }
421 return 0;
422}
423
424static void adnp_irq_relres(struct irq_data *data)
425{
426 struct adnp *adnp = irq_data_get_irq_chip_data(data);
427
428 gpio_unlock_as_irq(&adnp->gpio, data->hwirq);
429}
430
431static struct irq_chip adnp_irq_chip = { 413static struct irq_chip adnp_irq_chip = {
432 .name = "gpio-adnp", 414 .name = "gpio-adnp",
433 .irq_mask = adnp_irq_mask, 415 .irq_mask = adnp_irq_mask,
@@ -435,29 +417,6 @@ static struct irq_chip adnp_irq_chip = {
435 .irq_set_type = adnp_irq_set_type, 417 .irq_set_type = adnp_irq_set_type,
436 .irq_bus_lock = adnp_irq_bus_lock, 418 .irq_bus_lock = adnp_irq_bus_lock,
437 .irq_bus_sync_unlock = adnp_irq_bus_unlock, 419 .irq_bus_sync_unlock = adnp_irq_bus_unlock,
438 .irq_request_resources = adnp_irq_reqres,
439 .irq_release_resources = adnp_irq_relres,
440};
441
442static int adnp_irq_map(struct irq_domain *domain, unsigned int irq,
443 irq_hw_number_t hwirq)
444{
445 irq_set_chip_data(irq, domain->host_data);
446 irq_set_chip(irq, &adnp_irq_chip);
447 irq_set_nested_thread(irq, true);
448
449#ifdef CONFIG_ARM
450 set_irq_flags(irq, IRQF_VALID);
451#else
452 irq_set_noprobe(irq);
453#endif
454
455 return 0;
456}
457
458static const struct irq_domain_ops adnp_irq_domain_ops = {
459 .map = adnp_irq_map,
460 .xlate = irq_domain_xlate_twocell,
461}; 420};
462 421
463static int adnp_irq_setup(struct adnp *adnp) 422static int adnp_irq_setup(struct adnp *adnp)
@@ -503,35 +462,28 @@ static int adnp_irq_setup(struct adnp *adnp)
503 adnp->irq_enable[i] = 0x00; 462 adnp->irq_enable[i] = 0x00;
504 } 463 }
505 464
506 adnp->domain = irq_domain_add_linear(chip->of_node, chip->ngpio, 465 err = devm_request_threaded_irq(chip->dev, adnp->client->irq,
507 &adnp_irq_domain_ops, adnp); 466 NULL, adnp_irq,
508 467 IRQF_TRIGGER_RISING | IRQF_ONESHOT,
509 err = request_threaded_irq(adnp->client->irq, NULL, adnp_irq, 468 dev_name(chip->dev), adnp);
510 IRQF_TRIGGER_RISING | IRQF_ONESHOT,
511 dev_name(chip->dev), adnp);
512 if (err != 0) { 469 if (err != 0) {
513 dev_err(chip->dev, "can't request IRQ#%d: %d\n", 470 dev_err(chip->dev, "can't request IRQ#%d: %d\n",
514 adnp->client->irq, err); 471 adnp->client->irq, err);
515 return err; 472 return err;
516 } 473 }
517 474
518 chip->to_irq = adnp_gpio_to_irq; 475 err = gpiochip_irqchip_add(chip,
519 return 0; 476 &adnp_irq_chip,
520} 477 0,
521 478 handle_simple_irq,
522static void adnp_irq_teardown(struct adnp *adnp) 479 IRQ_TYPE_NONE);
523{ 480 if (err) {
524 unsigned int irq, i; 481 dev_err(chip->dev,
525 482 "could not connect irqchip to gpiochip\n");
526 free_irq(adnp->client->irq, adnp); 483 return err;
527
528 for (i = 0; i < adnp->gpio.ngpio; i++) {
529 irq = irq_find_mapping(adnp->domain, i);
530 if (irq > 0)
531 irq_dispose_mapping(irq);
532 } 484 }
533 485
534 irq_domain_remove(adnp->domain); 486 return 0;
535} 487}
536 488
537static int adnp_i2c_probe(struct i2c_client *client, 489static int adnp_i2c_probe(struct i2c_client *client,
@@ -558,45 +510,25 @@ static int adnp_i2c_probe(struct i2c_client *client,
558 adnp->client = client; 510 adnp->client = client;
559 511
560 err = adnp_gpio_setup(adnp, num_gpios); 512 err = adnp_gpio_setup(adnp, num_gpios);
561 if (err < 0) 513 if (err)
562 return err; 514 return err;
563 515
564 if (of_find_property(np, "interrupt-controller", NULL)) { 516 if (of_find_property(np, "interrupt-controller", NULL)) {
565 err = adnp_irq_setup(adnp); 517 err = adnp_irq_setup(adnp);
566 if (err < 0) 518 if (err)
567 goto teardown; 519 return err;
568 } 520 }
569 521
570 err = gpiochip_add(&adnp->gpio);
571 if (err < 0)
572 goto teardown;
573
574 i2c_set_clientdata(client, adnp); 522 i2c_set_clientdata(client, adnp);
575 return 0;
576
577teardown:
578 if (of_find_property(np, "interrupt-controller", NULL))
579 adnp_irq_teardown(adnp);
580 523
581 return err; 524 return 0;
582} 525}
583 526
584static int adnp_i2c_remove(struct i2c_client *client) 527static int adnp_i2c_remove(struct i2c_client *client)
585{ 528{
586 struct adnp *adnp = i2c_get_clientdata(client); 529 struct adnp *adnp = i2c_get_clientdata(client);
587 struct device_node *np = client->dev.of_node;
588 int err;
589
590 err = gpiochip_remove(&adnp->gpio);
591 if (err < 0) {
592 dev_err(&client->dev, "%s failed: %d\n", "gpiochip_remove()",
593 err);
594 return err;
595 }
596
597 if (of_find_property(np, "interrupt-controller", NULL))
598 adnp_irq_teardown(adnp);
599 530
531 gpiochip_remove(&adnp->gpio);
600 return 0; 532 return 0;
601} 533}
602 534
diff --git a/drivers/gpio/gpio-adp5520.c b/drivers/gpio/gpio-adp5520.c
index f1ade8fa3218..b08bd169e568 100644
--- a/drivers/gpio/gpio-adp5520.c
+++ b/drivers/gpio/gpio-adp5520.c
@@ -167,15 +167,9 @@ err:
167static int adp5520_gpio_remove(struct platform_device *pdev) 167static int adp5520_gpio_remove(struct platform_device *pdev)
168{ 168{
169 struct adp5520_gpio *dev; 169 struct adp5520_gpio *dev;
170 int ret;
171 170
172 dev = platform_get_drvdata(pdev); 171 dev = platform_get_drvdata(pdev);
173 ret = gpiochip_remove(&dev->gpio_chip); 172 gpiochip_remove(&dev->gpio_chip);
174 if (ret) {
175 dev_err(&pdev->dev, "%s failed, %d\n",
176 "gpiochip_remove()", ret);
177 return ret;
178 }
179 173
180 return 0; 174 return 0;
181} 175}
diff --git a/drivers/gpio/gpio-adp5588.c b/drivers/gpio/gpio-adp5588.c
index ef19bc33f2bd..3beed6ea8c65 100644
--- a/drivers/gpio/gpio-adp5588.c
+++ b/drivers/gpio/gpio-adp5588.c
@@ -470,11 +470,7 @@ static int adp5588_gpio_remove(struct i2c_client *client)
470 if (dev->irq_base) 470 if (dev->irq_base)
471 free_irq(dev->client->irq, dev); 471 free_irq(dev->client->irq, dev);
472 472
473 ret = gpiochip_remove(&dev->gpio_chip); 473 gpiochip_remove(&dev->gpio_chip);
474 if (ret) {
475 dev_err(&client->dev, "gpiochip_remove failed %d\n", ret);
476 return ret;
477 }
478 474
479 kfree(dev); 475 kfree(dev);
480 return 0; 476 return 0;
diff --git a/drivers/gpio/gpio-amd8111.c b/drivers/gpio/gpio-amd8111.c
index 94e9992f8904..3c09f1a6872a 100644
--- a/drivers/gpio/gpio-amd8111.c
+++ b/drivers/gpio/gpio-amd8111.c
@@ -232,8 +232,7 @@ out:
232 232
233static void __exit amd_gpio_exit(void) 233static void __exit amd_gpio_exit(void)
234{ 234{
235 int err = gpiochip_remove(&gp.chip); 235 gpiochip_remove(&gp.chip);
236 WARN_ON(err);
237 ioport_unmap(gp.pm); 236 ioport_unmap(gp.pm);
238 release_region(gp.pmbase + PMBASE_OFFSET, PMBASE_SIZE); 237 release_region(gp.pmbase + PMBASE_OFFSET, PMBASE_SIZE);
239} 238}
diff --git a/drivers/gpio/gpio-arizona.c b/drivers/gpio/gpio-arizona.c
index 29bdff558981..fe369f5c7fa6 100644
--- a/drivers/gpio/gpio-arizona.c
+++ b/drivers/gpio/gpio-arizona.c
@@ -149,7 +149,8 @@ static int arizona_gpio_remove(struct platform_device *pdev)
149{ 149{
150 struct arizona_gpio *arizona_gpio = platform_get_drvdata(pdev); 150 struct arizona_gpio *arizona_gpio = platform_get_drvdata(pdev);
151 151
152 return gpiochip_remove(&arizona_gpio->gpio_chip); 152 gpiochip_remove(&arizona_gpio->gpio_chip);
153 return 0;
153} 154}
154 155
155static struct platform_driver arizona_gpio_driver = { 156static struct platform_driver arizona_gpio_driver = {
diff --git a/drivers/gpio/gpio-bcm-kona.c b/drivers/gpio/gpio-bcm-kona.c
index 3f6b33ce9bd4..de0801e9767a 100644
--- a/drivers/gpio/gpio-bcm-kona.c
+++ b/drivers/gpio/gpio-bcm-kona.c
@@ -496,7 +496,7 @@ static struct irq_chip bcm_gpio_irq_chip = {
496 .irq_release_resources = bcm_kona_gpio_irq_relres, 496 .irq_release_resources = bcm_kona_gpio_irq_relres,
497}; 497};
498 498
499static struct __initconst of_device_id bcm_kona_gpio_of_match[] = { 499static struct of_device_id const bcm_kona_gpio_of_match[] = {
500 { .compatible = "brcm,kona-gpio" }, 500 { .compatible = "brcm,kona-gpio" },
501 {} 501 {}
502}; 502};
diff --git a/drivers/gpio/gpio-bt8xx.c b/drivers/gpio/gpio-bt8xx.c
index 6557147d9331..7e4c43c18960 100644
--- a/drivers/gpio/gpio-bt8xx.c
+++ b/drivers/gpio/gpio-bt8xx.c
@@ -241,9 +241,6 @@ static void bt8xxgpio_remove(struct pci_dev *pdev)
241 bgwrite(~0x0, BT848_INT_STAT); 241 bgwrite(~0x0, BT848_INT_STAT);
242 bgwrite(0x0, BT848_GPIO_OUT_EN); 242 bgwrite(0x0, BT848_GPIO_OUT_EN);
243 243
244 iounmap(bg->mmio);
245 release_mem_region(pci_resource_start(pdev, 0),
246 pci_resource_len(pdev, 0));
247 pci_disable_device(pdev); 244 pci_disable_device(pdev);
248} 245}
249 246
diff --git a/drivers/gpio/gpio-crystalcove.c b/drivers/gpio/gpio-crystalcove.c
new file mode 100644
index 000000000000..bbfe7f508502
--- /dev/null
+++ b/drivers/gpio/gpio-crystalcove.c
@@ -0,0 +1,390 @@
1/*
2 * gpio-crystalcove.c - Intel Crystal Cove GPIO Driver
3 *
4 * Copyright (C) 2012, 2014 Intel Corporation. All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License version
8 * 2 as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * Author: Yang, Bin <bin.yang@intel.com>
16 */
17
18#include <linux/interrupt.h>
19#include <linux/platform_device.h>
20#include <linux/gpio.h>
21#include <linux/seq_file.h>
22#include <linux/bitops.h>
23#include <linux/regmap.h>
24#include <linux/mfd/intel_soc_pmic.h>
25
26#define CRYSTALCOVE_GPIO_NUM 16
27#define CRYSTALCOVE_VGPIO_NUM 94
28
29#define UPDATE_IRQ_TYPE BIT(0)
30#define UPDATE_IRQ_MASK BIT(1)
31
32#define GPIO0IRQ 0x0b
33#define GPIO1IRQ 0x0c
34#define MGPIO0IRQS0 0x19
35#define MGPIO1IRQS0 0x1a
36#define MGPIO0IRQSX 0x1b
37#define MGPIO1IRQSX 0x1c
38#define GPIO0P0CTLO 0x2b
39#define GPIO0P0CTLI 0x33
40#define GPIO1P0CTLO 0x3b
41#define GPIO1P0CTLI 0x43
42
43#define CTLI_INTCNT_DIS (0)
44#define CTLI_INTCNT_NE (1 << 1)
45#define CTLI_INTCNT_PE (2 << 1)
46#define CTLI_INTCNT_BE (3 << 1)
47
48#define CTLO_DIR_IN (0)
49#define CTLO_DIR_OUT (1 << 5)
50
51#define CTLO_DRV_CMOS (0)
52#define CTLO_DRV_OD (1 << 4)
53
54#define CTLO_DRV_REN (1 << 3)
55
56#define CTLO_RVAL_2KDW (0)
57#define CTLO_RVAL_2KUP (1 << 1)
58#define CTLO_RVAL_50KDW (2 << 1)
59#define CTLO_RVAL_50KUP (3 << 1)
60
61#define CTLO_INPUT_SET (CTLO_DRV_CMOS | CTLO_DRV_REN | CTLO_RVAL_2KUP)
62#define CTLO_OUTPUT_SET (CTLO_DIR_OUT | CTLO_INPUT_SET)
63
64enum ctrl_register {
65 CTRL_IN,
66 CTRL_OUT,
67};
68
69/**
70 * struct crystalcove_gpio - Crystal Cove GPIO controller
71 * @buslock: for bus lock/sync and unlock.
72 * @chip: the abstract gpio_chip structure.
73 * @regmap: the regmap from the parent device.
74 * @update: pending IRQ setting update, to be written to the chip upon unlock.
75 * @intcnt_value: the Interrupt Detect value to be written.
76 * @set_irq_mask: true if the IRQ mask needs to be set, false to clear.
77 */
78struct crystalcove_gpio {
79 struct mutex buslock; /* irq_bus_lock */
80 struct gpio_chip chip;
81 struct regmap *regmap;
82 int update;
83 int intcnt_value;
84 bool set_irq_mask;
85};
86
87static inline struct crystalcove_gpio *to_cg(struct gpio_chip *gc)
88{
89 return container_of(gc, struct crystalcove_gpio, chip);
90}
91
92static inline int to_reg(int gpio, enum ctrl_register reg_type)
93{
94 int reg;
95
96 if (reg_type == CTRL_IN) {
97 if (gpio < 8)
98 reg = GPIO0P0CTLI;
99 else
100 reg = GPIO1P0CTLI;
101 } else {
102 if (gpio < 8)
103 reg = GPIO0P0CTLO;
104 else
105 reg = GPIO1P0CTLO;
106 }
107
108 return reg + gpio % 8;
109}
110
111static void crystalcove_update_irq_mask(struct crystalcove_gpio *cg,
112 int gpio)
113{
114 u8 mirqs0 = gpio < 8 ? MGPIO0IRQS0 : MGPIO1IRQS0;
115 int mask = BIT(gpio % 8);
116
117 if (cg->set_irq_mask)
118 regmap_update_bits(cg->regmap, mirqs0, mask, mask);
119 else
120 regmap_update_bits(cg->regmap, mirqs0, mask, 0);
121}
122
123static void crystalcove_update_irq_ctrl(struct crystalcove_gpio *cg, int gpio)
124{
125 int reg = to_reg(gpio, CTRL_IN);
126
127 regmap_update_bits(cg->regmap, reg, CTLI_INTCNT_BE, cg->intcnt_value);
128}
129
130static int crystalcove_gpio_dir_in(struct gpio_chip *chip, unsigned gpio)
131{
132 struct crystalcove_gpio *cg = to_cg(chip);
133
134 if (gpio > CRYSTALCOVE_VGPIO_NUM)
135 return 0;
136
137 return regmap_write(cg->regmap, to_reg(gpio, CTRL_OUT),
138 CTLO_INPUT_SET);
139}
140
141static int crystalcove_gpio_dir_out(struct gpio_chip *chip, unsigned gpio,
142 int value)
143{
144 struct crystalcove_gpio *cg = to_cg(chip);
145
146 if (gpio > CRYSTALCOVE_VGPIO_NUM)
147 return 0;
148
149 return regmap_write(cg->regmap, to_reg(gpio, CTRL_OUT),
150 CTLO_OUTPUT_SET | value);
151}
152
153static int crystalcove_gpio_get(struct gpio_chip *chip, unsigned gpio)
154{
155 struct crystalcove_gpio *cg = to_cg(chip);
156 int ret;
157 unsigned int val;
158
159 if (gpio > CRYSTALCOVE_VGPIO_NUM)
160 return 0;
161
162 ret = regmap_read(cg->regmap, to_reg(gpio, CTRL_IN), &val);
163 if (ret)
164 return ret;
165
166 return val & 0x1;
167}
168
169static void crystalcove_gpio_set(struct gpio_chip *chip,
170 unsigned gpio, int value)
171{
172 struct crystalcove_gpio *cg = to_cg(chip);
173
174 if (gpio > CRYSTALCOVE_VGPIO_NUM)
175 return;
176
177 if (value)
178 regmap_update_bits(cg->regmap, to_reg(gpio, CTRL_OUT), 1, 1);
179 else
180 regmap_update_bits(cg->regmap, to_reg(gpio, CTRL_OUT), 1, 0);
181}
182
183static int crystalcove_irq_type(struct irq_data *data, unsigned type)
184{
185 struct crystalcove_gpio *cg = to_cg(irq_data_get_irq_chip_data(data));
186
187 switch (type) {
188 case IRQ_TYPE_NONE:
189 cg->intcnt_value = CTLI_INTCNT_DIS;
190 break;
191 case IRQ_TYPE_EDGE_BOTH:
192 cg->intcnt_value = CTLI_INTCNT_BE;
193 break;
194 case IRQ_TYPE_EDGE_RISING:
195 cg->intcnt_value = CTLI_INTCNT_PE;
196 break;
197 case IRQ_TYPE_EDGE_FALLING:
198 cg->intcnt_value = CTLI_INTCNT_NE;
199 break;
200 default:
201 return -EINVAL;
202 }
203
204 cg->update |= UPDATE_IRQ_TYPE;
205
206 return 0;
207}
208
209static void crystalcove_bus_lock(struct irq_data *data)
210{
211 struct crystalcove_gpio *cg = to_cg(irq_data_get_irq_chip_data(data));
212
213 mutex_lock(&cg->buslock);
214}
215
216static void crystalcove_bus_sync_unlock(struct irq_data *data)
217{
218 struct crystalcove_gpio *cg = to_cg(irq_data_get_irq_chip_data(data));
219 int gpio = data->hwirq;
220
221 if (cg->update & UPDATE_IRQ_TYPE)
222 crystalcove_update_irq_ctrl(cg, gpio);
223 if (cg->update & UPDATE_IRQ_MASK)
224 crystalcove_update_irq_mask(cg, gpio);
225 cg->update = 0;
226
227 mutex_unlock(&cg->buslock);
228}
229
230static void crystalcove_irq_unmask(struct irq_data *data)
231{
232 struct crystalcove_gpio *cg = to_cg(irq_data_get_irq_chip_data(data));
233
234 cg->set_irq_mask = false;
235 cg->update |= UPDATE_IRQ_MASK;
236}
237
238static void crystalcove_irq_mask(struct irq_data *data)
239{
240 struct crystalcove_gpio *cg = to_cg(irq_data_get_irq_chip_data(data));
241
242 cg->set_irq_mask = true;
243 cg->update |= UPDATE_IRQ_MASK;
244}
245
246static struct irq_chip crystalcove_irqchip = {
247 .name = "Crystal Cove",
248 .irq_mask = crystalcove_irq_mask,
249 .irq_unmask = crystalcove_irq_unmask,
250 .irq_set_type = crystalcove_irq_type,
251 .irq_bus_lock = crystalcove_bus_lock,
252 .irq_bus_sync_unlock = crystalcove_bus_sync_unlock,
253};
254
255static irqreturn_t crystalcove_gpio_irq_handler(int irq, void *data)
256{
257 struct crystalcove_gpio *cg = data;
258 unsigned int p0, p1;
259 int pending;
260 int gpio;
261 unsigned int virq;
262
263 if (regmap_read(cg->regmap, GPIO0IRQ, &p0) ||
264 regmap_read(cg->regmap, GPIO1IRQ, &p1))
265 return IRQ_NONE;
266
267 regmap_write(cg->regmap, GPIO0IRQ, p0);
268 regmap_write(cg->regmap, GPIO1IRQ, p1);
269
270 pending = p0 | p1 << 8;
271
272 for (gpio = 0; gpio < CRYSTALCOVE_GPIO_NUM; gpio++) {
273 if (pending & BIT(gpio)) {
274 virq = irq_find_mapping(cg->chip.irqdomain, gpio);
275 generic_handle_irq(virq);
276 }
277 }
278
279 return IRQ_HANDLED;
280}
281
282static void crystalcove_gpio_dbg_show(struct seq_file *s,
283 struct gpio_chip *chip)
284{
285 struct crystalcove_gpio *cg = to_cg(chip);
286 int gpio, offset;
287 unsigned int ctlo, ctli, mirqs0, mirqsx, irq;
288
289 for (gpio = 0; gpio < CRYSTALCOVE_GPIO_NUM; gpio++) {
290 regmap_read(cg->regmap, to_reg(gpio, CTRL_OUT), &ctlo);
291 regmap_read(cg->regmap, to_reg(gpio, CTRL_IN), &ctli);
292 regmap_read(cg->regmap, gpio < 8 ? MGPIO0IRQS0 : MGPIO1IRQS0,
293 &mirqs0);
294 regmap_read(cg->regmap, gpio < 8 ? MGPIO0IRQSX : MGPIO1IRQSX,
295 &mirqsx);
296 regmap_read(cg->regmap, gpio < 8 ? GPIO0IRQ : GPIO1IRQ,
297 &irq);
298
299 offset = gpio % 8;
300 seq_printf(s, " gpio-%-2d %s %s %s %s ctlo=%2x,%s %s %s\n",
301 gpio, ctlo & CTLO_DIR_OUT ? "out" : "in ",
302 ctli & 0x1 ? "hi" : "lo",
303 ctli & CTLI_INTCNT_NE ? "fall" : " ",
304 ctli & CTLI_INTCNT_PE ? "rise" : " ",
305 ctlo,
306 mirqs0 & BIT(offset) ? "s0 mask " : "s0 unmask",
307 mirqsx & BIT(offset) ? "sx mask " : "sx unmask",
308 irq & BIT(offset) ? "pending" : " ");
309 }
310}
311
312static int crystalcove_gpio_probe(struct platform_device *pdev)
313{
314 int irq = platform_get_irq(pdev, 0);
315 struct crystalcove_gpio *cg;
316 int retval;
317 struct device *dev = pdev->dev.parent;
318 struct intel_soc_pmic *pmic = dev_get_drvdata(dev);
319
320 if (irq < 0)
321 return irq;
322
323 cg = devm_kzalloc(&pdev->dev, sizeof(*cg), GFP_KERNEL);
324 if (!cg)
325 return -ENOMEM;
326
327 platform_set_drvdata(pdev, cg);
328
329 mutex_init(&cg->buslock);
330 cg->chip.label = KBUILD_MODNAME;
331 cg->chip.direction_input = crystalcove_gpio_dir_in;
332 cg->chip.direction_output = crystalcove_gpio_dir_out;
333 cg->chip.get = crystalcove_gpio_get;
334 cg->chip.set = crystalcove_gpio_set;
335 cg->chip.base = -1;
336 cg->chip.ngpio = CRYSTALCOVE_VGPIO_NUM;
337 cg->chip.can_sleep = true;
338 cg->chip.dev = dev;
339 cg->chip.dbg_show = crystalcove_gpio_dbg_show;
340 cg->regmap = pmic->regmap;
341
342 retval = gpiochip_add(&cg->chip);
343 if (retval) {
344 dev_warn(&pdev->dev, "add gpio chip error: %d\n", retval);
345 return retval;
346 }
347
348 gpiochip_irqchip_add(&cg->chip, &crystalcove_irqchip, 0,
349 handle_simple_irq, IRQ_TYPE_NONE);
350
351 retval = request_threaded_irq(irq, NULL, crystalcove_gpio_irq_handler,
352 IRQF_ONESHOT, KBUILD_MODNAME, cg);
353
354 if (retval) {
355 dev_warn(&pdev->dev, "request irq failed: %d\n", retval);
356 goto out_remove_gpio;
357 }
358
359 return 0;
360
361out_remove_gpio:
362 gpiochip_remove(&cg->chip);
363 return retval;
364}
365
366static int crystalcove_gpio_remove(struct platform_device *pdev)
367{
368 struct crystalcove_gpio *cg = platform_get_drvdata(pdev);
369 int irq = platform_get_irq(pdev, 0);
370
371 gpiochip_remove(&cg->chip);
372 if (irq >= 0)
373 free_irq(irq, cg);
374 return 0;
375}
376
377static struct platform_driver crystalcove_gpio_driver = {
378 .probe = crystalcove_gpio_probe,
379 .remove = crystalcove_gpio_remove,
380 .driver = {
381 .name = "crystal_cove_gpio",
382 .owner = THIS_MODULE,
383 },
384};
385
386module_platform_driver(crystalcove_gpio_driver);
387
388MODULE_AUTHOR("Yang, Bin <bin.yang@intel.com>");
389MODULE_DESCRIPTION("Intel Crystal Cove GPIO Driver");
390MODULE_LICENSE("GPL v2");
diff --git a/drivers/gpio/gpio-cs5535.c b/drivers/gpio/gpio-cs5535.c
index c0a3aeba6f21..668127fe90ef 100644
--- a/drivers/gpio/gpio-cs5535.c
+++ b/drivers/gpio/gpio-cs5535.c
@@ -201,7 +201,8 @@ EXPORT_SYMBOL_GPL(cs5535_gpio_setup_event);
201 201
202static int chip_gpio_request(struct gpio_chip *c, unsigned offset) 202static int chip_gpio_request(struct gpio_chip *c, unsigned offset)
203{ 203{
204 struct cs5535_gpio_chip *chip = (struct cs5535_gpio_chip *) c; 204 struct cs5535_gpio_chip *chip =
205 container_of(c, struct cs5535_gpio_chip, chip);
205 unsigned long flags; 206 unsigned long flags;
206 207
207 spin_lock_irqsave(&chip->lock, flags); 208 spin_lock_irqsave(&chip->lock, flags);
@@ -241,7 +242,8 @@ static void chip_gpio_set(struct gpio_chip *chip, unsigned offset, int val)
241 242
242static int chip_direction_input(struct gpio_chip *c, unsigned offset) 243static int chip_direction_input(struct gpio_chip *c, unsigned offset)
243{ 244{
244 struct cs5535_gpio_chip *chip = (struct cs5535_gpio_chip *) c; 245 struct cs5535_gpio_chip *chip =
246 container_of(c, struct cs5535_gpio_chip, chip);
245 unsigned long flags; 247 unsigned long flags;
246 248
247 spin_lock_irqsave(&chip->lock, flags); 249 spin_lock_irqsave(&chip->lock, flags);
@@ -254,7 +256,8 @@ static int chip_direction_input(struct gpio_chip *c, unsigned offset)
254 256
255static int chip_direction_output(struct gpio_chip *c, unsigned offset, int val) 257static int chip_direction_output(struct gpio_chip *c, unsigned offset, int val)
256{ 258{
257 struct cs5535_gpio_chip *chip = (struct cs5535_gpio_chip *) c; 259 struct cs5535_gpio_chip *chip =
260 container_of(c, struct cs5535_gpio_chip, chip);
258 unsigned long flags; 261 unsigned long flags;
259 262
260 spin_lock_irqsave(&chip->lock, flags); 263 spin_lock_irqsave(&chip->lock, flags);
@@ -358,14 +361,8 @@ done:
358static int cs5535_gpio_remove(struct platform_device *pdev) 361static int cs5535_gpio_remove(struct platform_device *pdev)
359{ 362{
360 struct resource *r; 363 struct resource *r;
361 int err;
362 364
363 err = gpiochip_remove(&cs5535_gpio_chip.chip); 365 gpiochip_remove(&cs5535_gpio_chip.chip);
364 if (err) {
365 /* uhh? */
366 dev_err(&pdev->dev, "unable to remove gpio_chip?\n");
367 return err;
368 }
369 366
370 r = platform_get_resource(pdev, IORESOURCE_IO, 0); 367 r = platform_get_resource(pdev, IORESOURCE_IO, 0);
371 release_region(r->start, resource_size(r)); 368 release_region(r->start, resource_size(r));
diff --git a/drivers/gpio/gpio-da9052.c b/drivers/gpio/gpio-da9052.c
index 416cdf786b05..c5bccd4dec96 100644
--- a/drivers/gpio/gpio-da9052.c
+++ b/drivers/gpio/gpio-da9052.c
@@ -237,7 +237,8 @@ static int da9052_gpio_remove(struct platform_device *pdev)
237{ 237{
238 struct da9052_gpio *gpio = platform_get_drvdata(pdev); 238 struct da9052_gpio *gpio = platform_get_drvdata(pdev);
239 239
240 return gpiochip_remove(&gpio->gp); 240 gpiochip_remove(&gpio->gp);
241 return 0;
241} 242}
242 243
243static struct platform_driver da9052_gpio_driver = { 244static struct platform_driver da9052_gpio_driver = {
diff --git a/drivers/gpio/gpio-da9055.c b/drivers/gpio/gpio-da9055.c
index f992997bc301..9167c4331081 100644
--- a/drivers/gpio/gpio-da9055.c
+++ b/drivers/gpio/gpio-da9055.c
@@ -174,7 +174,8 @@ static int da9055_gpio_remove(struct platform_device *pdev)
174{ 174{
175 struct da9055_gpio *gpio = platform_get_drvdata(pdev); 175 struct da9055_gpio *gpio = platform_get_drvdata(pdev);
176 176
177 return gpiochip_remove(&gpio->gp); 177 gpiochip_remove(&gpio->gp);
178 return 0;
178} 179}
179 180
180static struct platform_driver da9055_gpio_driver = { 181static struct platform_driver da9055_gpio_driver = {
diff --git a/drivers/gpio/gpio-dwapb.c b/drivers/gpio/gpio-dwapb.c
index cd3b81435274..b43cd84b61f1 100644
--- a/drivers/gpio/gpio-dwapb.c
+++ b/drivers/gpio/gpio-dwapb.c
@@ -21,6 +21,8 @@
21#include <linux/of_irq.h> 21#include <linux/of_irq.h>
22#include <linux/platform_device.h> 22#include <linux/platform_device.h>
23#include <linux/spinlock.h> 23#include <linux/spinlock.h>
24#include <linux/platform_data/gpio-dwapb.h>
25#include <linux/slab.h>
24 26
25#define GPIO_SWPORTA_DR 0x00 27#define GPIO_SWPORTA_DR 0x00
26#define GPIO_SWPORTA_DDR 0x04 28#define GPIO_SWPORTA_DDR 0x04
@@ -35,6 +37,7 @@
35#define GPIO_INTTYPE_LEVEL 0x38 37#define GPIO_INTTYPE_LEVEL 0x38
36#define GPIO_INT_POLARITY 0x3c 38#define GPIO_INT_POLARITY 0x3c
37#define GPIO_INTSTATUS 0x40 39#define GPIO_INTSTATUS 0x40
40#define GPIO_PORTA_DEBOUNCE 0x48
38#define GPIO_PORTA_EOI 0x4c 41#define GPIO_PORTA_EOI 0x4c
39#define GPIO_EXT_PORTA 0x50 42#define GPIO_EXT_PORTA 0x50
40#define GPIO_EXT_PORTB 0x54 43#define GPIO_EXT_PORTB 0x54
@@ -48,10 +51,28 @@
48 51
49struct dwapb_gpio; 52struct dwapb_gpio;
50 53
54#ifdef CONFIG_PM_SLEEP
55/* Store GPIO context across system-wide suspend/resume transitions */
56struct dwapb_context {
57 u32 data;
58 u32 dir;
59 u32 ext;
60 u32 int_en;
61 u32 int_mask;
62 u32 int_type;
63 u32 int_pol;
64 u32 int_deb;
65};
66#endif
67
51struct dwapb_gpio_port { 68struct dwapb_gpio_port {
52 struct bgpio_chip bgc; 69 struct bgpio_chip bgc;
53 bool is_registered; 70 bool is_registered;
54 struct dwapb_gpio *gpio; 71 struct dwapb_gpio *gpio;
72#ifdef CONFIG_PM_SLEEP
73 struct dwapb_context *ctx;
74#endif
75 unsigned int idx;
55}; 76};
56 77
57struct dwapb_gpio { 78struct dwapb_gpio {
@@ -62,11 +83,33 @@ struct dwapb_gpio {
62 struct irq_domain *domain; 83 struct irq_domain *domain;
63}; 84};
64 85
86static inline struct dwapb_gpio_port *
87to_dwapb_gpio_port(struct bgpio_chip *bgc)
88{
89 return container_of(bgc, struct dwapb_gpio_port, bgc);
90}
91
92static inline u32 dwapb_read(struct dwapb_gpio *gpio, unsigned int offset)
93{
94 struct bgpio_chip *bgc = &gpio->ports[0].bgc;
95 void __iomem *reg_base = gpio->regs;
96
97 return bgc->read_reg(reg_base + offset);
98}
99
100static inline void dwapb_write(struct dwapb_gpio *gpio, unsigned int offset,
101 u32 val)
102{
103 struct bgpio_chip *bgc = &gpio->ports[0].bgc;
104 void __iomem *reg_base = gpio->regs;
105
106 bgc->write_reg(reg_base + offset, val);
107}
108
65static int dwapb_gpio_to_irq(struct gpio_chip *gc, unsigned offset) 109static int dwapb_gpio_to_irq(struct gpio_chip *gc, unsigned offset)
66{ 110{
67 struct bgpio_chip *bgc = to_bgpio_chip(gc); 111 struct bgpio_chip *bgc = to_bgpio_chip(gc);
68 struct dwapb_gpio_port *port = container_of(bgc, struct 112 struct dwapb_gpio_port *port = to_dwapb_gpio_port(bgc);
69 dwapb_gpio_port, bgc);
70 struct dwapb_gpio *gpio = port->gpio; 113 struct dwapb_gpio *gpio = port->gpio;
71 114
72 return irq_find_mapping(gpio->domain, offset); 115 return irq_find_mapping(gpio->domain, offset);
@@ -74,21 +117,20 @@ static int dwapb_gpio_to_irq(struct gpio_chip *gc, unsigned offset)
74 117
75static void dwapb_toggle_trigger(struct dwapb_gpio *gpio, unsigned int offs) 118static void dwapb_toggle_trigger(struct dwapb_gpio *gpio, unsigned int offs)
76{ 119{
77 u32 v = readl(gpio->regs + GPIO_INT_POLARITY); 120 u32 v = dwapb_read(gpio, GPIO_INT_POLARITY);
78 121
79 if (gpio_get_value(gpio->ports[0].bgc.gc.base + offs)) 122 if (gpio_get_value(gpio->ports[0].bgc.gc.base + offs))
80 v &= ~BIT(offs); 123 v &= ~BIT(offs);
81 else 124 else
82 v |= BIT(offs); 125 v |= BIT(offs);
83 126
84 writel(v, gpio->regs + GPIO_INT_POLARITY); 127 dwapb_write(gpio, GPIO_INT_POLARITY, v);
85} 128}
86 129
87static void dwapb_irq_handler(u32 irq, struct irq_desc *desc) 130static u32 dwapb_do_irq(struct dwapb_gpio *gpio)
88{ 131{
89 struct dwapb_gpio *gpio = irq_get_handler_data(irq);
90 struct irq_chip *chip = irq_desc_get_chip(desc);
91 u32 irq_status = readl_relaxed(gpio->regs + GPIO_INTSTATUS); 132 u32 irq_status = readl_relaxed(gpio->regs + GPIO_INTSTATUS);
133 u32 ret = irq_status;
92 134
93 while (irq_status) { 135 while (irq_status) {
94 int hwirq = fls(irq_status) - 1; 136 int hwirq = fls(irq_status) - 1;
@@ -102,6 +144,16 @@ static void dwapb_irq_handler(u32 irq, struct irq_desc *desc)
102 dwapb_toggle_trigger(gpio, hwirq); 144 dwapb_toggle_trigger(gpio, hwirq);
103 } 145 }
104 146
147 return ret;
148}
149
150static void dwapb_irq_handler(u32 irq, struct irq_desc *desc)
151{
152 struct dwapb_gpio *gpio = irq_get_handler_data(irq);
153 struct irq_chip *chip = irq_desc_get_chip(desc);
154
155 dwapb_do_irq(gpio);
156
105 if (chip->irq_eoi) 157 if (chip->irq_eoi)
106 chip->irq_eoi(irq_desc_get_irq_data(desc)); 158 chip->irq_eoi(irq_desc_get_irq_data(desc));
107} 159}
@@ -115,9 +167,9 @@ static void dwapb_irq_enable(struct irq_data *d)
115 u32 val; 167 u32 val;
116 168
117 spin_lock_irqsave(&bgc->lock, flags); 169 spin_lock_irqsave(&bgc->lock, flags);
118 val = readl(gpio->regs + GPIO_INTEN); 170 val = dwapb_read(gpio, GPIO_INTEN);
119 val |= BIT(d->hwirq); 171 val |= BIT(d->hwirq);
120 writel(val, gpio->regs + GPIO_INTEN); 172 dwapb_write(gpio, GPIO_INTEN, val);
121 spin_unlock_irqrestore(&bgc->lock, flags); 173 spin_unlock_irqrestore(&bgc->lock, flags);
122} 174}
123 175
@@ -130,9 +182,9 @@ static void dwapb_irq_disable(struct irq_data *d)
130 u32 val; 182 u32 val;
131 183
132 spin_lock_irqsave(&bgc->lock, flags); 184 spin_lock_irqsave(&bgc->lock, flags);
133 val = readl(gpio->regs + GPIO_INTEN); 185 val = dwapb_read(gpio, GPIO_INTEN);
134 val &= ~BIT(d->hwirq); 186 val &= ~BIT(d->hwirq);
135 writel(val, gpio->regs + GPIO_INTEN); 187 dwapb_write(gpio, GPIO_INTEN, val);
136 spin_unlock_irqrestore(&bgc->lock, flags); 188 spin_unlock_irqrestore(&bgc->lock, flags);
137} 189}
138 190
@@ -172,8 +224,8 @@ static int dwapb_irq_set_type(struct irq_data *d, u32 type)
172 return -EINVAL; 224 return -EINVAL;
173 225
174 spin_lock_irqsave(&bgc->lock, flags); 226 spin_lock_irqsave(&bgc->lock, flags);
175 level = readl(gpio->regs + GPIO_INTTYPE_LEVEL); 227 level = dwapb_read(gpio, GPIO_INTTYPE_LEVEL);
176 polarity = readl(gpio->regs + GPIO_INT_POLARITY); 228 polarity = dwapb_read(gpio, GPIO_INT_POLARITY);
177 229
178 switch (type) { 230 switch (type) {
179 case IRQ_TYPE_EDGE_BOTH: 231 case IRQ_TYPE_EDGE_BOTH:
@@ -200,29 +252,55 @@ static int dwapb_irq_set_type(struct irq_data *d, u32 type)
200 252
201 irq_setup_alt_chip(d, type); 253 irq_setup_alt_chip(d, type);
202 254
203 writel(level, gpio->regs + GPIO_INTTYPE_LEVEL); 255 dwapb_write(gpio, GPIO_INTTYPE_LEVEL, level);
204 writel(polarity, gpio->regs + GPIO_INT_POLARITY); 256 dwapb_write(gpio, GPIO_INT_POLARITY, polarity);
257 spin_unlock_irqrestore(&bgc->lock, flags);
258
259 return 0;
260}
261
262static int dwapb_gpio_set_debounce(struct gpio_chip *gc,
263 unsigned offset, unsigned debounce)
264{
265 struct bgpio_chip *bgc = to_bgpio_chip(gc);
266 struct dwapb_gpio_port *port = to_dwapb_gpio_port(bgc);
267 struct dwapb_gpio *gpio = port->gpio;
268 unsigned long flags, val_deb;
269 unsigned long mask = bgc->pin2mask(bgc, offset);
270
271 spin_lock_irqsave(&bgc->lock, flags);
272
273 val_deb = dwapb_read(gpio, GPIO_PORTA_DEBOUNCE);
274 if (debounce)
275 dwapb_write(gpio, GPIO_PORTA_DEBOUNCE, val_deb | mask);
276 else
277 dwapb_write(gpio, GPIO_PORTA_DEBOUNCE, val_deb & ~mask);
278
205 spin_unlock_irqrestore(&bgc->lock, flags); 279 spin_unlock_irqrestore(&bgc->lock, flags);
206 280
207 return 0; 281 return 0;
208} 282}
209 283
284static irqreturn_t dwapb_irq_handler_mfd(int irq, void *dev_id)
285{
286 u32 worked;
287 struct dwapb_gpio *gpio = dev_id;
288
289 worked = dwapb_do_irq(gpio);
290
291 return worked ? IRQ_HANDLED : IRQ_NONE;
292}
293
210static void dwapb_configure_irqs(struct dwapb_gpio *gpio, 294static void dwapb_configure_irqs(struct dwapb_gpio *gpio,
211 struct dwapb_gpio_port *port) 295 struct dwapb_gpio_port *port,
296 struct dwapb_port_property *pp)
212{ 297{
213 struct gpio_chip *gc = &port->bgc.gc; 298 struct gpio_chip *gc = &port->bgc.gc;
214 struct device_node *node = gc->of_node; 299 struct device_node *node = pp->node;
215 struct irq_chip_generic *irq_gc; 300 struct irq_chip_generic *irq_gc = NULL;
216 unsigned int hwirq, ngpio = gc->ngpio; 301 unsigned int hwirq, ngpio = gc->ngpio;
217 struct irq_chip_type *ct; 302 struct irq_chip_type *ct;
218 int err, irq, i; 303 int err, i;
219
220 irq = irq_of_parse_and_map(node, 0);
221 if (!irq) {
222 dev_warn(gpio->dev, "no irq for bank %s\n",
223 port->bgc.gc.of_node->full_name);
224 return;
225 }
226 304
227 gpio->domain = irq_domain_add_linear(node, ngpio, 305 gpio->domain = irq_domain_add_linear(node, ngpio,
228 &irq_generic_chip_ops, gpio); 306 &irq_generic_chip_ops, gpio);
@@ -269,8 +347,24 @@ static void dwapb_configure_irqs(struct dwapb_gpio *gpio,
269 irq_gc->chip_types[1].type = IRQ_TYPE_EDGE_BOTH; 347 irq_gc->chip_types[1].type = IRQ_TYPE_EDGE_BOTH;
270 irq_gc->chip_types[1].handler = handle_edge_irq; 348 irq_gc->chip_types[1].handler = handle_edge_irq;
271 349
272 irq_set_chained_handler(irq, dwapb_irq_handler); 350 if (!pp->irq_shared) {
273 irq_set_handler_data(irq, gpio); 351 irq_set_chained_handler(pp->irq, dwapb_irq_handler);
352 irq_set_handler_data(pp->irq, gpio);
353 } else {
354 /*
355 * Request a shared IRQ since where MFD would have devices
356 * using the same irq pin
357 */
358 err = devm_request_irq(gpio->dev, pp->irq,
359 dwapb_irq_handler_mfd,
360 IRQF_SHARED, "gpio-dwapb-mfd", gpio);
361 if (err) {
362 dev_err(gpio->dev, "error requesting IRQ\n");
363 irq_domain_remove(gpio->domain);
364 gpio->domain = NULL;
365 return;
366 }
367 }
274 368
275 for (hwirq = 0 ; hwirq < ngpio ; hwirq++) 369 for (hwirq = 0 ; hwirq < ngpio ; hwirq++)
276 irq_create_mapping(gpio->domain, hwirq); 370 irq_create_mapping(gpio->domain, hwirq);
@@ -296,57 +390,53 @@ static void dwapb_irq_teardown(struct dwapb_gpio *gpio)
296} 390}
297 391
298static int dwapb_gpio_add_port(struct dwapb_gpio *gpio, 392static int dwapb_gpio_add_port(struct dwapb_gpio *gpio,
299 struct device_node *port_np, 393 struct dwapb_port_property *pp,
300 unsigned int offs) 394 unsigned int offs)
301{ 395{
302 struct dwapb_gpio_port *port; 396 struct dwapb_gpio_port *port;
303 u32 port_idx, ngpio;
304 void __iomem *dat, *set, *dirout; 397 void __iomem *dat, *set, *dirout;
305 int err; 398 int err;
306 399
307 if (of_property_read_u32(port_np, "reg", &port_idx) ||
308 port_idx >= DWAPB_MAX_PORTS) {
309 dev_err(gpio->dev, "missing/invalid port index for %s\n",
310 port_np->full_name);
311 return -EINVAL;
312 }
313
314 port = &gpio->ports[offs]; 400 port = &gpio->ports[offs];
315 port->gpio = gpio; 401 port->gpio = gpio;
402 port->idx = pp->idx;
316 403
317 if (of_property_read_u32(port_np, "snps,nr-gpios", &ngpio)) { 404#ifdef CONFIG_PM_SLEEP
318 dev_info(gpio->dev, "failed to get number of gpios for %s\n", 405 port->ctx = devm_kzalloc(gpio->dev, sizeof(*port->ctx), GFP_KERNEL);
319 port_np->full_name); 406 if (!port->ctx)
320 ngpio = 32; 407 return -ENOMEM;
321 } 408#endif
322 409
323 dat = gpio->regs + GPIO_EXT_PORTA + (port_idx * GPIO_EXT_PORT_SIZE); 410 dat = gpio->regs + GPIO_EXT_PORTA + (pp->idx * GPIO_EXT_PORT_SIZE);
324 set = gpio->regs + GPIO_SWPORTA_DR + (port_idx * GPIO_SWPORT_DR_SIZE); 411 set = gpio->regs + GPIO_SWPORTA_DR + (pp->idx * GPIO_SWPORT_DR_SIZE);
325 dirout = gpio->regs + GPIO_SWPORTA_DDR + 412 dirout = gpio->regs + GPIO_SWPORTA_DDR +
326 (port_idx * GPIO_SWPORT_DDR_SIZE); 413 (pp->idx * GPIO_SWPORT_DDR_SIZE);
327 414
328 err = bgpio_init(&port->bgc, gpio->dev, 4, dat, set, NULL, dirout, 415 err = bgpio_init(&port->bgc, gpio->dev, 4, dat, set, NULL, dirout,
329 NULL, false); 416 NULL, false);
330 if (err) { 417 if (err) {
331 dev_err(gpio->dev, "failed to init gpio chip for %s\n", 418 dev_err(gpio->dev, "failed to init gpio chip for %s\n",
332 port_np->full_name); 419 pp->name);
333 return err; 420 return err;
334 } 421 }
335 422
336 port->bgc.gc.ngpio = ngpio; 423#ifdef CONFIG_OF_GPIO
337 port->bgc.gc.of_node = port_np; 424 port->bgc.gc.of_node = pp->node;
425#endif
426 port->bgc.gc.ngpio = pp->ngpio;
427 port->bgc.gc.base = pp->gpio_base;
338 428
339 /* 429 /* Only port A support debounce */
340 * Only port A can provide interrupts in all configurations of the IP. 430 if (pp->idx == 0)
341 */ 431 port->bgc.gc.set_debounce = dwapb_gpio_set_debounce;
342 if (port_idx == 0 && 432
343 of_property_read_bool(port_np, "interrupt-controller")) 433 if (pp->irq)
344 dwapb_configure_irqs(gpio, port); 434 dwapb_configure_irqs(gpio, port, pp);
345 435
346 err = gpiochip_add(&port->bgc.gc); 436 err = gpiochip_add(&port->bgc.gc);
347 if (err) 437 if (err)
348 dev_err(gpio->dev, "failed to register gpiochip for %s\n", 438 dev_err(gpio->dev, "failed to register gpiochip for %s\n",
349 port_np->full_name); 439 pp->name);
350 else 440 else
351 port->is_registered = true; 441 port->is_registered = true;
352 442
@@ -359,28 +449,119 @@ static void dwapb_gpio_unregister(struct dwapb_gpio *gpio)
359 449
360 for (m = 0; m < gpio->nr_ports; ++m) 450 for (m = 0; m < gpio->nr_ports; ++m)
361 if (gpio->ports[m].is_registered) 451 if (gpio->ports[m].is_registered)
362 WARN_ON(gpiochip_remove(&gpio->ports[m].bgc.gc)); 452 gpiochip_remove(&gpio->ports[m].bgc.gc);
453}
454
455static struct dwapb_platform_data *
456dwapb_gpio_get_pdata_of(struct device *dev)
457{
458 struct device_node *node, *port_np;
459 struct dwapb_platform_data *pdata;
460 struct dwapb_port_property *pp;
461 int nports;
462 int i;
463
464 node = dev->of_node;
465 if (!IS_ENABLED(CONFIG_OF_GPIO) || !node)
466 return ERR_PTR(-ENODEV);
467
468 nports = of_get_child_count(node);
469 if (nports == 0)
470 return ERR_PTR(-ENODEV);
471
472 pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
473 if (!pdata)
474 return ERR_PTR(-ENOMEM);
475
476 pdata->properties = kcalloc(nports, sizeof(*pp), GFP_KERNEL);
477 if (!pdata->properties) {
478 kfree(pdata);
479 return ERR_PTR(-ENOMEM);
480 }
481
482 pdata->nports = nports;
483
484 i = 0;
485 for_each_child_of_node(node, port_np) {
486 pp = &pdata->properties[i++];
487 pp->node = port_np;
488
489 if (of_property_read_u32(port_np, "reg", &pp->idx) ||
490 pp->idx >= DWAPB_MAX_PORTS) {
491 dev_err(dev, "missing/invalid port index for %s\n",
492 port_np->full_name);
493 kfree(pdata->properties);
494 kfree(pdata);
495 return ERR_PTR(-EINVAL);
496 }
497
498 if (of_property_read_u32(port_np, "snps,nr-gpios",
499 &pp->ngpio)) {
500 dev_info(dev, "failed to get number of gpios for %s\n",
501 port_np->full_name);
502 pp->ngpio = 32;
503 }
504
505 /*
506 * Only port A can provide interrupts in all configurations of
507 * the IP.
508 */
509 if (pp->idx == 0 &&
510 of_property_read_bool(port_np, "interrupt-controller")) {
511 pp->irq = irq_of_parse_and_map(port_np, 0);
512 if (!pp->irq) {
513 dev_warn(dev, "no irq for bank %s\n",
514 port_np->full_name);
515 }
516 }
517
518 pp->irq_shared = false;
519 pp->gpio_base = -1;
520 pp->name = port_np->full_name;
521 }
522
523 return pdata;
524}
525
526static inline void dwapb_free_pdata_of(struct dwapb_platform_data *pdata)
527{
528 if (!IS_ENABLED(CONFIG_OF_GPIO) || !pdata)
529 return;
530
531 kfree(pdata->properties);
532 kfree(pdata);
363} 533}
364 534
365static int dwapb_gpio_probe(struct platform_device *pdev) 535static int dwapb_gpio_probe(struct platform_device *pdev)
366{ 536{
537 unsigned int i;
367 struct resource *res; 538 struct resource *res;
368 struct dwapb_gpio *gpio; 539 struct dwapb_gpio *gpio;
369 struct device_node *np;
370 int err; 540 int err;
371 unsigned int offs = 0; 541 struct device *dev = &pdev->dev;
542 struct dwapb_platform_data *pdata = dev_get_platdata(dev);
543 bool is_pdata_alloc = !pdata;
544
545 if (is_pdata_alloc) {
546 pdata = dwapb_gpio_get_pdata_of(dev);
547 if (IS_ERR(pdata))
548 return PTR_ERR(pdata);
549 }
372 550
373 gpio = devm_kzalloc(&pdev->dev, sizeof(*gpio), GFP_KERNEL); 551 if (!pdata->nports) {
374 if (!gpio) 552 err = -ENODEV;
375 return -ENOMEM; 553 goto out_err;
376 gpio->dev = &pdev->dev; 554 }
377 555
378 gpio->nr_ports = of_get_child_count(pdev->dev.of_node); 556 gpio = devm_kzalloc(&pdev->dev, sizeof(*gpio), GFP_KERNEL);
379 if (!gpio->nr_ports) { 557 if (!gpio) {
380 err = -EINVAL; 558 err = -ENOMEM;
381 goto out_err; 559 goto out_err;
382 } 560 }
383 gpio->ports = devm_kzalloc(&pdev->dev, gpio->nr_ports * 561 gpio->dev = &pdev->dev;
562 gpio->nr_ports = pdata->nports;
563
564 gpio->ports = devm_kcalloc(&pdev->dev, gpio->nr_ports,
384 sizeof(*gpio->ports), GFP_KERNEL); 565 sizeof(*gpio->ports), GFP_KERNEL);
385 if (!gpio->ports) { 566 if (!gpio->ports) {
386 err = -ENOMEM; 567 err = -ENOMEM;
@@ -394,20 +575,23 @@ static int dwapb_gpio_probe(struct platform_device *pdev)
394 goto out_err; 575 goto out_err;
395 } 576 }
396 577
397 for_each_child_of_node(pdev->dev.of_node, np) { 578 for (i = 0; i < gpio->nr_ports; i++) {
398 err = dwapb_gpio_add_port(gpio, np, offs++); 579 err = dwapb_gpio_add_port(gpio, &pdata->properties[i], i);
399 if (err) 580 if (err)
400 goto out_unregister; 581 goto out_unregister;
401 } 582 }
402 platform_set_drvdata(pdev, gpio); 583 platform_set_drvdata(pdev, gpio);
403 584
404 return 0; 585 goto out_err;
405 586
406out_unregister: 587out_unregister:
407 dwapb_gpio_unregister(gpio); 588 dwapb_gpio_unregister(gpio);
408 dwapb_irq_teardown(gpio); 589 dwapb_irq_teardown(gpio);
409 590
410out_err: 591out_err:
592 if (is_pdata_alloc)
593 dwapb_free_pdata_of(pdata);
594
411 return err; 595 return err;
412} 596}
413 597
@@ -427,10 +611,100 @@ static const struct of_device_id dwapb_of_match[] = {
427}; 611};
428MODULE_DEVICE_TABLE(of, dwapb_of_match); 612MODULE_DEVICE_TABLE(of, dwapb_of_match);
429 613
614#ifdef CONFIG_PM_SLEEP
615static int dwapb_gpio_suspend(struct device *dev)
616{
617 struct platform_device *pdev = to_platform_device(dev);
618 struct dwapb_gpio *gpio = platform_get_drvdata(pdev);
619 struct bgpio_chip *bgc = &gpio->ports[0].bgc;
620 unsigned long flags;
621 int i;
622
623 spin_lock_irqsave(&bgc->lock, flags);
624 for (i = 0; i < gpio->nr_ports; i++) {
625 unsigned int offset;
626 unsigned int idx = gpio->ports[i].idx;
627 struct dwapb_context *ctx = gpio->ports[i].ctx;
628
629 BUG_ON(!ctx);
630
631 offset = GPIO_SWPORTA_DDR + idx * GPIO_SWPORT_DDR_SIZE;
632 ctx->dir = dwapb_read(gpio, offset);
633
634 offset = GPIO_SWPORTA_DR + idx * GPIO_SWPORT_DR_SIZE;
635 ctx->data = dwapb_read(gpio, offset);
636
637 offset = GPIO_EXT_PORTA + idx * GPIO_EXT_PORT_SIZE;
638 ctx->ext = dwapb_read(gpio, offset);
639
640 /* Only port A can provide interrupts */
641 if (idx == 0) {
642 ctx->int_mask = dwapb_read(gpio, GPIO_INTMASK);
643 ctx->int_en = dwapb_read(gpio, GPIO_INTEN);
644 ctx->int_pol = dwapb_read(gpio, GPIO_INT_POLARITY);
645 ctx->int_type = dwapb_read(gpio, GPIO_INTTYPE_LEVEL);
646 ctx->int_deb = dwapb_read(gpio, GPIO_PORTA_DEBOUNCE);
647
648 /* Mask out interrupts */
649 dwapb_write(gpio, GPIO_INTMASK, 0xffffffff);
650 }
651 }
652 spin_unlock_irqrestore(&bgc->lock, flags);
653
654 return 0;
655}
656
657static int dwapb_gpio_resume(struct device *dev)
658{
659 struct platform_device *pdev = to_platform_device(dev);
660 struct dwapb_gpio *gpio = platform_get_drvdata(pdev);
661 struct bgpio_chip *bgc = &gpio->ports[0].bgc;
662 unsigned long flags;
663 int i;
664
665 spin_lock_irqsave(&bgc->lock, flags);
666 for (i = 0; i < gpio->nr_ports; i++) {
667 unsigned int offset;
668 unsigned int idx = gpio->ports[i].idx;
669 struct dwapb_context *ctx = gpio->ports[i].ctx;
670
671 BUG_ON(!ctx);
672
673 offset = GPIO_SWPORTA_DR + idx * GPIO_SWPORT_DR_SIZE;
674 dwapb_write(gpio, offset, ctx->data);
675
676 offset = GPIO_SWPORTA_DDR + idx * GPIO_SWPORT_DDR_SIZE;
677 dwapb_write(gpio, offset, ctx->dir);
678
679 offset = GPIO_EXT_PORTA + idx * GPIO_EXT_PORT_SIZE;
680 dwapb_write(gpio, offset, ctx->ext);
681
682 /* Only port A can provide interrupts */
683 if (idx == 0) {
684 dwapb_write(gpio, GPIO_INTTYPE_LEVEL, ctx->int_type);
685 dwapb_write(gpio, GPIO_INT_POLARITY, ctx->int_pol);
686 dwapb_write(gpio, GPIO_PORTA_DEBOUNCE, ctx->int_deb);
687 dwapb_write(gpio, GPIO_INTEN, ctx->int_en);
688 dwapb_write(gpio, GPIO_INTMASK, ctx->int_mask);
689
690 /* Clear out spurious interrupts */
691 dwapb_write(gpio, GPIO_PORTA_EOI, 0xffffffff);
692 }
693 }
694 spin_unlock_irqrestore(&bgc->lock, flags);
695
696 return 0;
697}
698#endif
699
700static SIMPLE_DEV_PM_OPS(dwapb_gpio_pm_ops, dwapb_gpio_suspend,
701 dwapb_gpio_resume);
702
430static struct platform_driver dwapb_gpio_driver = { 703static struct platform_driver dwapb_gpio_driver = {
431 .driver = { 704 .driver = {
432 .name = "gpio-dwapb", 705 .name = "gpio-dwapb",
433 .owner = THIS_MODULE, 706 .owner = THIS_MODULE,
707 .pm = &dwapb_gpio_pm_ops,
434 .of_match_table = of_match_ptr(dwapb_of_match), 708 .of_match_table = of_match_ptr(dwapb_of_match),
435 }, 709 },
436 .probe = dwapb_gpio_probe, 710 .probe = dwapb_gpio_probe,
diff --git a/drivers/gpio/gpio-em.c b/drivers/gpio/gpio-em.c
index cde36054c387..fe49ec3cdb7d 100644
--- a/drivers/gpio/gpio-em.c
+++ b/drivers/gpio/gpio-em.c
@@ -409,11 +409,8 @@ err0:
409static int em_gio_remove(struct platform_device *pdev) 409static int em_gio_remove(struct platform_device *pdev)
410{ 410{
411 struct em_gio_priv *p = platform_get_drvdata(pdev); 411 struct em_gio_priv *p = platform_get_drvdata(pdev);
412 int ret;
413 412
414 ret = gpiochip_remove(&p->gpio_chip); 413 gpiochip_remove(&p->gpio_chip);
415 if (ret)
416 return ret;
417 414
418 irq_domain_remove(p->irq_domain); 415 irq_domain_remove(p->irq_domain);
419 return 0; 416 return 0;
diff --git a/drivers/gpio/gpio-f7188x.c b/drivers/gpio/gpio-f7188x.c
index 8f73ee093739..fd3202f968ff 100644
--- a/drivers/gpio/gpio-f7188x.c
+++ b/drivers/gpio/gpio-f7188x.c
@@ -317,13 +317,7 @@ static int f7188x_gpio_probe(struct platform_device *pdev)
317err_gpiochip: 317err_gpiochip:
318 for (i = i - 1; i >= 0; i--) { 318 for (i = i - 1; i >= 0; i--) {
319 struct f7188x_gpio_bank *bank = &data->bank[i]; 319 struct f7188x_gpio_bank *bank = &data->bank[i];
320 int tmp; 320 gpiochip_remove(&bank->chip);
321
322 tmp = gpiochip_remove(&bank->chip);
323 if (tmp < 0)
324 dev_err(&pdev->dev,
325 "Failed to remove gpiochip %d: %d\n",
326 i, tmp);
327 } 321 }
328 322
329 return err; 323 return err;
@@ -331,20 +325,12 @@ err_gpiochip:
331 325
332static int f7188x_gpio_remove(struct platform_device *pdev) 326static int f7188x_gpio_remove(struct platform_device *pdev)
333{ 327{
334 int err;
335 int i; 328 int i;
336 struct f7188x_gpio_data *data = platform_get_drvdata(pdev); 329 struct f7188x_gpio_data *data = platform_get_drvdata(pdev);
337 330
338 for (i = 0; i < data->nr_bank; i++) { 331 for (i = 0; i < data->nr_bank; i++) {
339 struct f7188x_gpio_bank *bank = &data->bank[i]; 332 struct f7188x_gpio_bank *bank = &data->bank[i];
340 333 gpiochip_remove(&bank->chip);
341 err = gpiochip_remove(&bank->chip);
342 if (err) {
343 dev_err(&pdev->dev,
344 "Failed to remove GPIO gpiochip %d: %d\n",
345 i, err);
346 return err;
347 }
348 } 334 }
349 335
350 return 0; 336 return 0;
diff --git a/drivers/gpio/gpio-generic.c b/drivers/gpio/gpio-generic.c
index fea8c82bb8fc..16f6115e5bdb 100644
--- a/drivers/gpio/gpio-generic.c
+++ b/drivers/gpio/gpio-generic.c
@@ -398,7 +398,8 @@ static int bgpio_request(struct gpio_chip *chip, unsigned gpio_pin)
398 398
399int bgpio_remove(struct bgpio_chip *bgc) 399int bgpio_remove(struct bgpio_chip *bgc)
400{ 400{
401 return gpiochip_remove(&bgc->gc); 401 gpiochip_remove(&bgc->gc);
402 return 0;
402} 403}
403EXPORT_SYMBOL_GPL(bgpio_remove); 404EXPORT_SYMBOL_GPL(bgpio_remove);
404 405
diff --git a/drivers/gpio/gpio-grgpio.c b/drivers/gpio/gpio-grgpio.c
index 3c3f515b7916..66ad3df9d9cf 100644
--- a/drivers/gpio/gpio-grgpio.c
+++ b/drivers/gpio/gpio-grgpio.c
@@ -468,9 +468,7 @@ static int grgpio_remove(struct platform_device *ofdev)
468 } 468 }
469 } 469 }
470 470
471 ret = gpiochip_remove(&priv->bgc.gc); 471 gpiochip_remove(&priv->bgc.gc);
472 if (ret)
473 goto out;
474 472
475 if (priv->domain) 473 if (priv->domain)
476 irq_domain_remove(priv->domain); 474 irq_domain_remove(priv->domain);
diff --git a/drivers/gpio/gpio-ich.c b/drivers/gpio/gpio-ich.c
index 70304220a479..3784e81e7762 100644
--- a/drivers/gpio/gpio-ich.c
+++ b/drivers/gpio/gpio-ich.c
@@ -514,14 +514,7 @@ add_err:
514 514
515static int ichx_gpio_remove(struct platform_device *pdev) 515static int ichx_gpio_remove(struct platform_device *pdev)
516{ 516{
517 int err; 517 gpiochip_remove(&ichx_priv.chip);
518
519 err = gpiochip_remove(&ichx_priv.chip);
520 if (err) {
521 dev_err(&pdev->dev, "%s failed, %d\n",
522 "gpiochip_remove()", err);
523 return err;
524 }
525 518
526 ichx_gpio_release_regions(ichx_priv.gpio_base, ichx_priv.use_gpio); 519 ichx_gpio_release_regions(ichx_priv.gpio_base, ichx_priv.use_gpio);
527 if (ichx_priv.pm_base) 520 if (ichx_priv.pm_base)
diff --git a/drivers/gpio/gpio-intel-mid.c b/drivers/gpio/gpio-intel-mid.c
index 118a6bf455d9..aa28c65eb6b4 100644
--- a/drivers/gpio/gpio-intel-mid.c
+++ b/drivers/gpio/gpio-intel-mid.c
@@ -28,12 +28,10 @@
28#include <linux/stddef.h> 28#include <linux/stddef.h>
29#include <linux/interrupt.h> 29#include <linux/interrupt.h>
30#include <linux/init.h> 30#include <linux/init.h>
31#include <linux/irq.h>
32#include <linux/io.h> 31#include <linux/io.h>
33#include <linux/gpio.h> 32#include <linux/gpio/driver.h>
34#include <linux/slab.h> 33#include <linux/slab.h>
35#include <linux/pm_runtime.h> 34#include <linux/pm_runtime.h>
36#include <linux/irqdomain.h>
37 35
38#define INTEL_MID_IRQ_TYPE_EDGE (1 << 0) 36#define INTEL_MID_IRQ_TYPE_EDGE (1 << 0)
39#define INTEL_MID_IRQ_TYPE_LEVEL (1 << 1) 37#define INTEL_MID_IRQ_TYPE_LEVEL (1 << 1)
@@ -78,10 +76,12 @@ struct intel_mid_gpio {
78 void __iomem *reg_base; 76 void __iomem *reg_base;
79 spinlock_t lock; 77 spinlock_t lock;
80 struct pci_dev *pdev; 78 struct pci_dev *pdev;
81 struct irq_domain *domain;
82}; 79};
83 80
84#define to_intel_gpio_priv(chip) container_of(chip, struct intel_mid_gpio, chip) 81static inline struct intel_mid_gpio *to_intel_gpio_priv(struct gpio_chip *gc)
82{
83 return container_of(gc, struct intel_mid_gpio, chip);
84}
85 85
86static void __iomem *gpio_reg(struct gpio_chip *chip, unsigned offset, 86static void __iomem *gpio_reg(struct gpio_chip *chip, unsigned offset,
87 enum GPIO_REG reg_type) 87 enum GPIO_REG reg_type)
@@ -182,15 +182,10 @@ static int intel_gpio_direction_output(struct gpio_chip *chip,
182 return 0; 182 return 0;
183} 183}
184 184
185static int intel_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
186{
187 struct intel_mid_gpio *priv = to_intel_gpio_priv(chip);
188 return irq_create_mapping(priv->domain, offset);
189}
190
191static int intel_mid_irq_type(struct irq_data *d, unsigned type) 185static int intel_mid_irq_type(struct irq_data *d, unsigned type)
192{ 186{
193 struct intel_mid_gpio *priv = irq_data_get_irq_chip_data(d); 187 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
188 struct intel_mid_gpio *priv = to_intel_gpio_priv(gc);
194 u32 gpio = irqd_to_hwirq(d); 189 u32 gpio = irqd_to_hwirq(d);
195 unsigned long flags; 190 unsigned long flags;
196 u32 value; 191 u32 value;
@@ -231,33 +226,11 @@ static void intel_mid_irq_mask(struct irq_data *d)
231{ 226{
232} 227}
233 228
234static int intel_mid_irq_reqres(struct irq_data *d)
235{
236 struct intel_mid_gpio *priv = irq_data_get_irq_chip_data(d);
237
238 if (gpio_lock_as_irq(&priv->chip, irqd_to_hwirq(d))) {
239 dev_err(priv->chip.dev,
240 "unable to lock HW IRQ %lu for IRQ\n",
241 irqd_to_hwirq(d));
242 return -EINVAL;
243 }
244 return 0;
245}
246
247static void intel_mid_irq_relres(struct irq_data *d)
248{
249 struct intel_mid_gpio *priv = irq_data_get_irq_chip_data(d);
250
251 gpio_unlock_as_irq(&priv->chip, irqd_to_hwirq(d));
252}
253
254static struct irq_chip intel_mid_irqchip = { 229static struct irq_chip intel_mid_irqchip = {
255 .name = "INTEL_MID-GPIO", 230 .name = "INTEL_MID-GPIO",
256 .irq_mask = intel_mid_irq_mask, 231 .irq_mask = intel_mid_irq_mask,
257 .irq_unmask = intel_mid_irq_unmask, 232 .irq_unmask = intel_mid_irq_unmask,
258 .irq_set_type = intel_mid_irq_type, 233 .irq_set_type = intel_mid_irq_type,
259 .irq_request_resources = intel_mid_irq_reqres,
260 .irq_release_resources = intel_mid_irq_relres,
261}; 234};
262 235
263static const struct intel_mid_gpio_ddata gpio_lincroft = { 236static const struct intel_mid_gpio_ddata gpio_lincroft = {
@@ -330,8 +303,9 @@ MODULE_DEVICE_TABLE(pci, intel_gpio_ids);
330 303
331static void intel_mid_irq_handler(unsigned irq, struct irq_desc *desc) 304static void intel_mid_irq_handler(unsigned irq, struct irq_desc *desc)
332{ 305{
306 struct gpio_chip *gc = irq_desc_get_handler_data(desc);
307 struct intel_mid_gpio *priv = to_intel_gpio_priv(gc);
333 struct irq_data *data = irq_desc_get_irq_data(desc); 308 struct irq_data *data = irq_desc_get_irq_data(desc);
334 struct intel_mid_gpio *priv = irq_data_get_irq_handler_data(data);
335 struct irq_chip *chip = irq_data_get_irq_chip(data); 309 struct irq_chip *chip = irq_data_get_irq_chip(data);
336 u32 base, gpio, mask; 310 u32 base, gpio, mask;
337 unsigned long pending; 311 unsigned long pending;
@@ -345,7 +319,7 @@ static void intel_mid_irq_handler(unsigned irq, struct irq_desc *desc)
345 mask = BIT(gpio); 319 mask = BIT(gpio);
346 /* Clear before handling so we can't lose an edge */ 320 /* Clear before handling so we can't lose an edge */
347 writel(mask, gedr); 321 writel(mask, gedr);
348 generic_handle_irq(irq_find_mapping(priv->domain, 322 generic_handle_irq(irq_find_mapping(gc->irqdomain,
349 base + gpio)); 323 base + gpio));
350 } 324 }
351 } 325 }
@@ -371,23 +345,6 @@ static void intel_mid_irq_init_hw(struct intel_mid_gpio *priv)
371 } 345 }
372} 346}
373 347
374static int intel_gpio_irq_map(struct irq_domain *d, unsigned int irq,
375 irq_hw_number_t hwirq)
376{
377 struct intel_mid_gpio *priv = d->host_data;
378
379 irq_set_chip_and_handler(irq, &intel_mid_irqchip, handle_simple_irq);
380 irq_set_chip_data(irq, priv);
381 irq_set_irq_type(irq, IRQ_TYPE_NONE);
382
383 return 0;
384}
385
386static const struct irq_domain_ops intel_gpio_irq_ops = {
387 .map = intel_gpio_irq_map,
388 .xlate = irq_domain_xlate_twocell,
389};
390
391static int intel_gpio_runtime_idle(struct device *dev) 348static int intel_gpio_runtime_idle(struct device *dev)
392{ 349{
393 int err = pm_schedule_suspend(dev, 500); 350 int err = pm_schedule_suspend(dev, 500);
@@ -441,7 +398,6 @@ static int intel_gpio_probe(struct pci_dev *pdev,
441 priv->chip.direction_output = intel_gpio_direction_output; 398 priv->chip.direction_output = intel_gpio_direction_output;
442 priv->chip.get = intel_gpio_get; 399 priv->chip.get = intel_gpio_get;
443 priv->chip.set = intel_gpio_set; 400 priv->chip.set = intel_gpio_set;
444 priv->chip.to_irq = intel_gpio_to_irq;
445 priv->chip.base = gpio_base; 401 priv->chip.base = gpio_base;
446 priv->chip.ngpio = ddata->ngpio; 402 priv->chip.ngpio = ddata->ngpio;
447 priv->chip.can_sleep = false; 403 priv->chip.can_sleep = false;
@@ -449,11 +405,6 @@ static int intel_gpio_probe(struct pci_dev *pdev,
449 405
450 spin_lock_init(&priv->lock); 406 spin_lock_init(&priv->lock);
451 407
452 priv->domain = irq_domain_add_simple(pdev->dev.of_node, ddata->ngpio,
453 irq_base, &intel_gpio_irq_ops, priv);
454 if (!priv->domain)
455 return -ENOMEM;
456
457 pci_set_drvdata(pdev, priv); 408 pci_set_drvdata(pdev, priv);
458 retval = gpiochip_add(&priv->chip); 409 retval = gpiochip_add(&priv->chip);
459 if (retval) { 410 if (retval) {
@@ -461,10 +412,23 @@ static int intel_gpio_probe(struct pci_dev *pdev,
461 return retval; 412 return retval;
462 } 413 }
463 414
415 retval = gpiochip_irqchip_add(&priv->chip,
416 &intel_mid_irqchip,
417 irq_base,
418 handle_simple_irq,
419 IRQ_TYPE_NONE);
420 if (retval) {
421 dev_err(&pdev->dev,
422 "could not connect irqchip to gpiochip\n");
423 return retval;
424 }
425
464 intel_mid_irq_init_hw(priv); 426 intel_mid_irq_init_hw(priv);
465 427
466 irq_set_handler_data(pdev->irq, priv); 428 gpiochip_set_chained_irqchip(&priv->chip,
467 irq_set_chained_handler(pdev->irq, intel_mid_irq_handler); 429 &intel_mid_irqchip,
430 pdev->irq,
431 intel_mid_irq_handler);
468 432
469 pm_runtime_put_noidle(&pdev->dev); 433 pm_runtime_put_noidle(&pdev->dev);
470 pm_runtime_allow(&pdev->dev); 434 pm_runtime_allow(&pdev->dev);
diff --git a/drivers/gpio/gpio-it8761e.c b/drivers/gpio/gpio-it8761e.c
index 278b81317010..dadfc245cf09 100644
--- a/drivers/gpio/gpio-it8761e.c
+++ b/drivers/gpio/gpio-it8761e.c
@@ -217,11 +217,7 @@ gpiochip_add_err:
217static void __exit it8761e_gpio_exit(void) 217static void __exit it8761e_gpio_exit(void)
218{ 218{
219 if (gpio_ba) { 219 if (gpio_ba) {
220 int ret = gpiochip_remove(&it8761e_gpio_chip); 220 gpiochip_remove(&it8761e_gpio_chip);
221
222 WARN(ret, "%s(): gpiochip_remove() failed, ret=%d\n",
223 __func__, ret);
224
225 release_region(gpio_ba, GPIO_IOSIZE); 221 release_region(gpio_ba, GPIO_IOSIZE);
226 gpio_ba = 0; 222 gpio_ba = 0;
227 } 223 }
diff --git a/drivers/gpio/gpio-janz-ttl.c b/drivers/gpio/gpio-janz-ttl.c
index 42852eaaf020..29ffe22ad97a 100644
--- a/drivers/gpio/gpio-janz-ttl.c
+++ b/drivers/gpio/gpio-janz-ttl.c
@@ -194,14 +194,8 @@ static int ttl_probe(struct platform_device *pdev)
194static int ttl_remove(struct platform_device *pdev) 194static int ttl_remove(struct platform_device *pdev)
195{ 195{
196 struct ttl_module *mod = platform_get_drvdata(pdev); 196 struct ttl_module *mod = platform_get_drvdata(pdev);
197 struct device *dev = &pdev->dev;
198 int ret;
199 197
200 ret = gpiochip_remove(&mod->gpio); 198 gpiochip_remove(&mod->gpio);
201 if (ret) {
202 dev_err(dev, "unable to remove GPIO chip\n");
203 return ret;
204 }
205 199
206 return 0; 200 return 0;
207} 201}
diff --git a/drivers/gpio/gpio-kempld.c b/drivers/gpio/gpio-kempld.c
index 1e5e51987d31..fd150adeebf9 100644
--- a/drivers/gpio/gpio-kempld.c
+++ b/drivers/gpio/gpio-kempld.c
@@ -199,7 +199,8 @@ static int kempld_gpio_remove(struct platform_device *pdev)
199{ 199{
200 struct kempld_gpio_data *gpio = platform_get_drvdata(pdev); 200 struct kempld_gpio_data *gpio = platform_get_drvdata(pdev);
201 201
202 return gpiochip_remove(&gpio->chip); 202 gpiochip_remove(&gpio->chip);
203 return 0;
203} 204}
204 205
205static struct platform_driver kempld_gpio_driver = { 206static struct platform_driver kempld_gpio_driver = {
diff --git a/drivers/gpio/gpio-ks8695.c b/drivers/gpio/gpio-ks8695.c
index 464a83de0d6a..cc09b237e88c 100644
--- a/drivers/gpio/gpio-ks8695.c
+++ b/drivers/gpio/gpio-ks8695.c
@@ -265,29 +265,27 @@ static int ks8695_gpio_show(struct seq_file *s, void *unused)
265 seq_printf(s, "EXT%i ", i); 265 seq_printf(s, "EXT%i ", i);
266 266
267 switch ((ctrl & intmask[i]) >> (4 * i)) { 267 switch ((ctrl & intmask[i]) >> (4 * i)) {
268 case IOPC_TM_LOW: 268 case IOPC_TM_LOW:
269 seq_printf(s, "(Low)"); break; 269 seq_printf(s, "(Low)"); break;
270 case IOPC_TM_HIGH: 270 case IOPC_TM_HIGH:
271 seq_printf(s, "(High)"); break; 271 seq_printf(s, "(High)"); break;
272 case IOPC_TM_RISING: 272 case IOPC_TM_RISING:
273 seq_printf(s, "(Rising)"); break; 273 seq_printf(s, "(Rising)"); break;
274 case IOPC_TM_FALLING: 274 case IOPC_TM_FALLING:
275 seq_printf(s, "(Falling)"); break; 275 seq_printf(s, "(Falling)"); break;
276 case IOPC_TM_EDGE: 276 case IOPC_TM_EDGE:
277 seq_printf(s, "(Edges)"); break; 277 seq_printf(s, "(Edges)"); break;
278 } 278 }
279 } 279 } else
280 else
281 seq_printf(s, "GPIO\t"); 280 seq_printf(s, "GPIO\t");
282 } 281 } else if (i <= KS8695_GPIO_5) {
283 else if (i <= KS8695_GPIO_5) {
284 if (ctrl & enable[i]) 282 if (ctrl & enable[i])
285 seq_printf(s, "TOUT%i\t", i - KS8695_GPIO_4); 283 seq_printf(s, "TOUT%i\t", i - KS8695_GPIO_4);
286 else 284 else
287 seq_printf(s, "GPIO\t"); 285 seq_printf(s, "GPIO\t");
288 } 286 } else {
289 else
290 seq_printf(s, "GPIO\t"); 287 seq_printf(s, "GPIO\t");
288 }
291 289
292 seq_printf(s, "\t"); 290 seq_printf(s, "\t");
293 291
diff --git a/drivers/gpio/gpio-lp3943.c b/drivers/gpio/gpio-lp3943.c
index a0341c92bcb4..6bbdad805b78 100644
--- a/drivers/gpio/gpio-lp3943.c
+++ b/drivers/gpio/gpio-lp3943.c
@@ -216,7 +216,8 @@ static int lp3943_gpio_remove(struct platform_device *pdev)
216{ 216{
217 struct lp3943_gpio *lp3943_gpio = platform_get_drvdata(pdev); 217 struct lp3943_gpio *lp3943_gpio = platform_get_drvdata(pdev);
218 218
219 return gpiochip_remove(&lp3943_gpio->chip); 219 gpiochip_remove(&lp3943_gpio->chip);
220 return 0;
220} 221}
221 222
222static const struct of_device_id lp3943_gpio_of_match[] = { 223static const struct of_device_id lp3943_gpio_of_match[] = {
diff --git a/drivers/gpio/gpio-lpc32xx.c b/drivers/gpio/gpio-lpc32xx.c
index 225344d66404..b9b9799b368b 100644
--- a/drivers/gpio/gpio-lpc32xx.c
+++ b/drivers/gpio/gpio-lpc32xx.c
@@ -560,7 +560,7 @@ static int lpc32xx_gpio_probe(struct platform_device *pdev)
560} 560}
561 561
562#ifdef CONFIG_OF 562#ifdef CONFIG_OF
563static struct of_device_id lpc32xx_gpio_of_match[] = { 563static const struct of_device_id lpc32xx_gpio_of_match[] = {
564 { .compatible = "nxp,lpc3220-gpio", }, 564 { .compatible = "nxp,lpc3220-gpio", },
565 { }, 565 { },
566}; 566};
diff --git a/drivers/gpio/gpio-lynxpoint.c b/drivers/gpio/gpio-lynxpoint.c
index 2bea89b72508..fa945ec9ccff 100644
--- a/drivers/gpio/gpio-lynxpoint.c
+++ b/drivers/gpio/gpio-lynxpoint.c
@@ -25,9 +25,7 @@
25#include <linux/types.h> 25#include <linux/types.h>
26#include <linux/bitops.h> 26#include <linux/bitops.h>
27#include <linux/interrupt.h> 27#include <linux/interrupt.h>
28#include <linux/irq.h>
29#include <linux/gpio.h> 28#include <linux/gpio.h>
30#include <linux/irqdomain.h>
31#include <linux/slab.h> 29#include <linux/slab.h>
32#include <linux/acpi.h> 30#include <linux/acpi.h>
33#include <linux/platform_device.h> 31#include <linux/platform_device.h>
@@ -62,7 +60,6 @@
62 60
63struct lp_gpio { 61struct lp_gpio {
64 struct gpio_chip chip; 62 struct gpio_chip chip;
65 struct irq_domain *domain;
66 struct platform_device *pdev; 63 struct platform_device *pdev;
67 spinlock_t lock; 64 spinlock_t lock;
68 unsigned long reg_base; 65 unsigned long reg_base;
@@ -151,7 +148,8 @@ static void lp_gpio_free(struct gpio_chip *chip, unsigned offset)
151 148
152static int lp_irq_type(struct irq_data *d, unsigned type) 149static int lp_irq_type(struct irq_data *d, unsigned type)
153{ 150{
154 struct lp_gpio *lg = irq_data_get_irq_chip_data(d); 151 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
152 struct lp_gpio *lg = container_of(gc, struct lp_gpio, chip);
155 u32 hwirq = irqd_to_hwirq(d); 153 u32 hwirq = irqd_to_hwirq(d);
156 unsigned long flags; 154 unsigned long flags;
157 u32 value; 155 u32 value;
@@ -236,16 +234,11 @@ static int lp_gpio_direction_output(struct gpio_chip *chip,
236 return 0; 234 return 0;
237} 235}
238 236
239static int lp_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
240{
241 struct lp_gpio *lg = container_of(chip, struct lp_gpio, chip);
242 return irq_create_mapping(lg->domain, offset);
243}
244
245static void lp_gpio_irq_handler(unsigned hwirq, struct irq_desc *desc) 237static void lp_gpio_irq_handler(unsigned hwirq, struct irq_desc *desc)
246{ 238{
247 struct irq_data *data = irq_desc_get_irq_data(desc); 239 struct irq_data *data = irq_desc_get_irq_data(desc);
248 struct lp_gpio *lg = irq_data_get_irq_handler_data(data); 240 struct gpio_chip *gc = irq_desc_get_handler_data(desc);
241 struct lp_gpio *lg = container_of(gc, struct lp_gpio, chip);
249 struct irq_chip *chip = irq_data_get_irq_chip(data); 242 struct irq_chip *chip = irq_data_get_irq_chip(data);
250 u32 base, pin, mask; 243 u32 base, pin, mask;
251 unsigned long reg, ena, pending; 244 unsigned long reg, ena, pending;
@@ -262,7 +255,7 @@ static void lp_gpio_irq_handler(unsigned hwirq, struct irq_desc *desc)
262 mask = BIT(pin); 255 mask = BIT(pin);
263 /* Clear before handling so we don't lose an edge */ 256 /* Clear before handling so we don't lose an edge */
264 outl(mask, reg); 257 outl(mask, reg);
265 irq = irq_find_mapping(lg->domain, base + pin); 258 irq = irq_find_mapping(lg->chip.irqdomain, base + pin);
266 generic_handle_irq(irq); 259 generic_handle_irq(irq);
267 } 260 }
268 } 261 }
@@ -279,7 +272,8 @@ static void lp_irq_mask(struct irq_data *d)
279 272
280static void lp_irq_enable(struct irq_data *d) 273static void lp_irq_enable(struct irq_data *d)
281{ 274{
282 struct lp_gpio *lg = irq_data_get_irq_chip_data(d); 275 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
276 struct lp_gpio *lg = container_of(gc, struct lp_gpio, chip);
283 u32 hwirq = irqd_to_hwirq(d); 277 u32 hwirq = irqd_to_hwirq(d);
284 unsigned long reg = lp_gpio_reg(&lg->chip, hwirq, LP_INT_ENABLE); 278 unsigned long reg = lp_gpio_reg(&lg->chip, hwirq, LP_INT_ENABLE);
285 unsigned long flags; 279 unsigned long flags;
@@ -291,7 +285,8 @@ static void lp_irq_enable(struct irq_data *d)
291 285
292static void lp_irq_disable(struct irq_data *d) 286static void lp_irq_disable(struct irq_data *d)
293{ 287{
294 struct lp_gpio *lg = irq_data_get_irq_chip_data(d); 288 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
289 struct lp_gpio *lg = container_of(gc, struct lp_gpio, chip);
295 u32 hwirq = irqd_to_hwirq(d); 290 u32 hwirq = irqd_to_hwirq(d);
296 unsigned long reg = lp_gpio_reg(&lg->chip, hwirq, LP_INT_ENABLE); 291 unsigned long reg = lp_gpio_reg(&lg->chip, hwirq, LP_INT_ENABLE);
297 unsigned long flags; 292 unsigned long flags;
@@ -301,26 +296,6 @@ static void lp_irq_disable(struct irq_data *d)
301 spin_unlock_irqrestore(&lg->lock, flags); 296 spin_unlock_irqrestore(&lg->lock, flags);
302} 297}
303 298
304static int lp_irq_reqres(struct irq_data *d)
305{
306 struct lp_gpio *lg = irq_data_get_irq_chip_data(d);
307
308 if (gpio_lock_as_irq(&lg->chip, irqd_to_hwirq(d))) {
309 dev_err(lg->chip.dev,
310 "unable to lock HW IRQ %lu for IRQ\n",
311 irqd_to_hwirq(d));
312 return -EINVAL;
313 }
314 return 0;
315}
316
317static void lp_irq_relres(struct irq_data *d)
318{
319 struct lp_gpio *lg = irq_data_get_irq_chip_data(d);
320
321 gpio_unlock_as_irq(&lg->chip, irqd_to_hwirq(d));
322}
323
324static struct irq_chip lp_irqchip = { 299static struct irq_chip lp_irqchip = {
325 .name = "LP-GPIO", 300 .name = "LP-GPIO",
326 .irq_mask = lp_irq_mask, 301 .irq_mask = lp_irq_mask,
@@ -328,8 +303,6 @@ static struct irq_chip lp_irqchip = {
328 .irq_enable = lp_irq_enable, 303 .irq_enable = lp_irq_enable,
329 .irq_disable = lp_irq_disable, 304 .irq_disable = lp_irq_disable,
330 .irq_set_type = lp_irq_type, 305 .irq_set_type = lp_irq_type,
331 .irq_request_resources = lp_irq_reqres,
332 .irq_release_resources = lp_irq_relres,
333 .flags = IRQCHIP_SKIP_SET_WAKE, 306 .flags = IRQCHIP_SKIP_SET_WAKE,
334}; 307};
335 308
@@ -348,22 +321,6 @@ static void lp_gpio_irq_init_hw(struct lp_gpio *lg)
348 } 321 }
349} 322}
350 323
351static int lp_gpio_irq_map(struct irq_domain *d, unsigned int irq,
352 irq_hw_number_t hwirq)
353{
354 struct lp_gpio *lg = d->host_data;
355
356 irq_set_chip_and_handler(irq, &lp_irqchip, handle_simple_irq);
357 irq_set_chip_data(irq, lg);
358 irq_set_irq_type(irq, IRQ_TYPE_NONE);
359
360 return 0;
361}
362
363static const struct irq_domain_ops lp_gpio_irq_ops = {
364 .map = lp_gpio_irq_map,
365};
366
367static int lp_gpio_probe(struct platform_device *pdev) 324static int lp_gpio_probe(struct platform_device *pdev)
368{ 325{
369 struct lp_gpio *lg; 326 struct lp_gpio *lg;
@@ -371,7 +328,6 @@ static int lp_gpio_probe(struct platform_device *pdev)
371 struct resource *io_rc, *irq_rc; 328 struct resource *io_rc, *irq_rc;
372 struct device *dev = &pdev->dev; 329 struct device *dev = &pdev->dev;
373 unsigned long reg_len; 330 unsigned long reg_len;
374 unsigned hwirq;
375 int ret = -ENODEV; 331 int ret = -ENODEV;
376 332
377 lg = devm_kzalloc(dev, sizeof(struct lp_gpio), GFP_KERNEL); 333 lg = devm_kzalloc(dev, sizeof(struct lp_gpio), GFP_KERNEL);
@@ -414,27 +370,28 @@ static int lp_gpio_probe(struct platform_device *pdev)
414 gc->can_sleep = false; 370 gc->can_sleep = false;
415 gc->dev = dev; 371 gc->dev = dev;
416 372
373 ret = gpiochip_add(gc);
374 if (ret) {
375 dev_err(dev, "failed adding lp-gpio chip\n");
376 return ret;
377 }
378
417 /* set up interrupts */ 379 /* set up interrupts */
418 if (irq_rc && irq_rc->start) { 380 if (irq_rc && irq_rc->start) {
419 hwirq = irq_rc->start;
420 gc->to_irq = lp_gpio_to_irq;
421
422 lg->domain = irq_domain_add_linear(NULL, LP_NUM_GPIO,
423 &lp_gpio_irq_ops, lg);
424 if (!lg->domain)
425 return -ENXIO;
426
427 lp_gpio_irq_init_hw(lg); 381 lp_gpio_irq_init_hw(lg);
382 ret = gpiochip_irqchip_add(gc, &lp_irqchip, 0,
383 handle_simple_irq, IRQ_TYPE_NONE);
384 if (ret) {
385 dev_err(dev, "failed to add irqchip\n");
386 gpiochip_remove(gc);
387 return ret;
388 }
428 389
429 irq_set_handler_data(hwirq, lg); 390 gpiochip_set_chained_irqchip(gc, &lp_irqchip,
430 irq_set_chained_handler(hwirq, lp_gpio_irq_handler); 391 (unsigned)irq_rc->start,
392 lp_gpio_irq_handler);
431 } 393 }
432 394
433 ret = gpiochip_add(gc);
434 if (ret) {
435 dev_err(dev, "failed adding lp-gpio chip\n");
436 return ret;
437 }
438 pm_runtime_enable(dev); 395 pm_runtime_enable(dev);
439 396
440 return 0; 397 return 0;
@@ -450,9 +407,27 @@ static int lp_gpio_runtime_resume(struct device *dev)
450 return 0; 407 return 0;
451} 408}
452 409
410static int lp_gpio_resume(struct device *dev)
411{
412 struct platform_device *pdev = to_platform_device(dev);
413 struct lp_gpio *lg = platform_get_drvdata(pdev);
414 unsigned long reg;
415 int i;
416
417 /* on some hardware suspend clears input sensing, re-enable it here */
418 for (i = 0; i < lg->chip.ngpio; i++) {
419 if (gpiochip_is_requested(&lg->chip, i) != NULL) {
420 reg = lp_gpio_reg(&lg->chip, i, LP_CONFIG2);
421 outl(inl(reg) & ~GPINDIS_BIT, reg);
422 }
423 }
424 return 0;
425}
426
453static const struct dev_pm_ops lp_gpio_pm_ops = { 427static const struct dev_pm_ops lp_gpio_pm_ops = {
454 .runtime_suspend = lp_gpio_runtime_suspend, 428 .runtime_suspend = lp_gpio_runtime_suspend,
455 .runtime_resume = lp_gpio_runtime_resume, 429 .runtime_resume = lp_gpio_runtime_resume,
430 .resume = lp_gpio_resume,
456}; 431};
457 432
458static const struct acpi_device_id lynxpoint_gpio_acpi_match[] = { 433static const struct acpi_device_id lynxpoint_gpio_acpi_match[] = {
@@ -465,11 +440,8 @@ MODULE_DEVICE_TABLE(acpi, lynxpoint_gpio_acpi_match);
465static int lp_gpio_remove(struct platform_device *pdev) 440static int lp_gpio_remove(struct platform_device *pdev)
466{ 441{
467 struct lp_gpio *lg = platform_get_drvdata(pdev); 442 struct lp_gpio *lg = platform_get_drvdata(pdev);
468 int err;
469 pm_runtime_disable(&pdev->dev); 443 pm_runtime_disable(&pdev->dev);
470 err = gpiochip_remove(&lg->chip); 444 gpiochip_remove(&lg->chip);
471 if (err)
472 dev_warn(&pdev->dev, "failed to remove gpio_chip.\n");
473 return 0; 445 return 0;
474} 446}
475 447
diff --git a/drivers/gpio/gpio-max730x.c b/drivers/gpio/gpio-max730x.c
index 0814584fcdc1..18ab89e20806 100644
--- a/drivers/gpio/gpio-max730x.c
+++ b/drivers/gpio/gpio-max730x.c
@@ -228,21 +228,16 @@ EXPORT_SYMBOL_GPL(__max730x_probe);
228int __max730x_remove(struct device *dev) 228int __max730x_remove(struct device *dev)
229{ 229{
230 struct max7301 *ts = dev_get_drvdata(dev); 230 struct max7301 *ts = dev_get_drvdata(dev);
231 int ret;
232 231
233 if (ts == NULL) 232 if (ts == NULL)
234 return -ENODEV; 233 return -ENODEV;
235 234
236 /* Power down the chip and disable IRQ output */ 235 /* Power down the chip and disable IRQ output */
237 ts->write(dev, 0x04, 0x00); 236 ts->write(dev, 0x04, 0x00);
238 237 gpiochip_remove(&ts->chip);
239 ret = gpiochip_remove(&ts->chip); 238 mutex_destroy(&ts->lock);
240 if (!ret) 239 kfree(ts);
241 mutex_destroy(&ts->lock); 240 return 0;
242 else
243 dev_err(dev, "Failed to remove GPIO controller: %d\n", ret);
244
245 return ret;
246} 241}
247EXPORT_SYMBOL_GPL(__max730x_remove); 242EXPORT_SYMBOL_GPL(__max730x_remove);
248 243
diff --git a/drivers/gpio/gpio-max732x.c b/drivers/gpio/gpio-max732x.c
index 7c36f2b0983d..6c676225b886 100644
--- a/drivers/gpio/gpio-max732x.c
+++ b/drivers/gpio/gpio-max732x.c
@@ -676,12 +676,7 @@ static int max732x_remove(struct i2c_client *client)
676 } 676 }
677 } 677 }
678 678
679 ret = gpiochip_remove(&chip->gpio_chip); 679 gpiochip_remove(&chip->gpio_chip);
680 if (ret) {
681 dev_err(&client->dev, "%s failed, %d\n",
682 "gpiochip_remove()", ret);
683 return ret;
684 }
685 680
686 max732x_irq_teardown(chip); 681 max732x_irq_teardown(chip);
687 682
diff --git a/drivers/gpio/gpio-mc33880.c b/drivers/gpio/gpio-mc33880.c
index 553a80a5eaf3..4e3e160e5db2 100644
--- a/drivers/gpio/gpio-mc33880.c
+++ b/drivers/gpio/gpio-mc33880.c
@@ -149,20 +149,15 @@ exit_destroy:
149static int mc33880_remove(struct spi_device *spi) 149static int mc33880_remove(struct spi_device *spi)
150{ 150{
151 struct mc33880 *mc; 151 struct mc33880 *mc;
152 int ret;
153 152
154 mc = spi_get_drvdata(spi); 153 mc = spi_get_drvdata(spi);
155 if (mc == NULL) 154 if (mc == NULL)
156 return -ENODEV; 155 return -ENODEV;
157 156
158 ret = gpiochip_remove(&mc->chip); 157 gpiochip_remove(&mc->chip);
159 if (!ret) 158 mutex_destroy(&mc->lock);
160 mutex_destroy(&mc->lock);
161 else
162 dev_err(&spi->dev, "Failed to remove the GPIO controller: %d\n",
163 ret);
164 159
165 return ret; 160 return 0;
166} 161}
167 162
168static struct spi_driver mc33880_driver = { 163static struct spi_driver mc33880_driver = {
diff --git a/drivers/gpio/gpio-mc9s08dz60.c b/drivers/gpio/gpio-mc9s08dz60.c
index dce35ff00db7..d62b4f8182bf 100644
--- a/drivers/gpio/gpio-mc9s08dz60.c
+++ b/drivers/gpio/gpio-mc9s08dz60.c
@@ -118,7 +118,8 @@ static int mc9s08dz60_remove(struct i2c_client *client)
118 118
119 mc9s = i2c_get_clientdata(client); 119 mc9s = i2c_get_clientdata(client);
120 120
121 return gpiochip_remove(&mc9s->chip); 121 gpiochip_remove(&mc9s->chip);
122 return 0;
122} 123}
123 124
124static const struct i2c_device_id mc9s08dz60_id[] = { 125static const struct i2c_device_id mc9s08dz60_id[] = {
diff --git a/drivers/gpio/gpio-mcp23s08.c b/drivers/gpio/gpio-mcp23s08.c
index 57adbc90fdad..8488e2fd307c 100644
--- a/drivers/gpio/gpio-mcp23s08.c
+++ b/drivers/gpio/gpio-mcp23s08.c
@@ -479,7 +479,7 @@ static int mcp23s08_irq_setup(struct mcp23s08 *mcp)
479 479
480 mutex_init(&mcp->irq_lock); 480 mutex_init(&mcp->irq_lock);
481 481
482 mcp->irq_domain = irq_domain_add_linear(chip->of_node, chip->ngpio, 482 mcp->irq_domain = irq_domain_add_linear(chip->dev->of_node, chip->ngpio,
483 &irq_domain_simple_ops, mcp); 483 &irq_domain_simple_ops, mcp);
484 if (!mcp->irq_domain) 484 if (!mcp->irq_domain)
485 return -ENODEV; 485 return -ENODEV;
@@ -581,7 +581,7 @@ done:
581 581
582static int mcp23s08_probe_one(struct mcp23s08 *mcp, struct device *dev, 582static int mcp23s08_probe_one(struct mcp23s08 *mcp, struct device *dev,
583 void *data, unsigned addr, unsigned type, 583 void *data, unsigned addr, unsigned type,
584 unsigned base, unsigned pullups) 584 struct mcp23s08_platform_data *pdata, int cs)
585{ 585{
586 int status; 586 int status;
587 bool mirror = false; 587 bool mirror = false;
@@ -635,7 +635,7 @@ static int mcp23s08_probe_one(struct mcp23s08 *mcp, struct device *dev,
635 return -EINVAL; 635 return -EINVAL;
636 } 636 }
637 637
638 mcp->chip.base = base; 638 mcp->chip.base = pdata->base;
639 mcp->chip.can_sleep = true; 639 mcp->chip.can_sleep = true;
640 mcp->chip.dev = dev; 640 mcp->chip.dev = dev;
641 mcp->chip.owner = THIS_MODULE; 641 mcp->chip.owner = THIS_MODULE;
@@ -648,11 +648,9 @@ static int mcp23s08_probe_one(struct mcp23s08 *mcp, struct device *dev,
648 if (status < 0) 648 if (status < 0)
649 goto fail; 649 goto fail;
650 650
651 mcp->irq_controller = of_property_read_bool(mcp->chip.of_node, 651 mcp->irq_controller = pdata->irq_controller;
652 "interrupt-controller");
653 if (mcp->irq && mcp->irq_controller && (type == MCP_TYPE_017)) 652 if (mcp->irq && mcp->irq_controller && (type == MCP_TYPE_017))
654 mirror = of_property_read_bool(mcp->chip.of_node, 653 mirror = pdata->mirror;
655 "microchip,irq-mirror");
656 654
657 if ((status & IOCON_SEQOP) || !(status & IOCON_HAEN) || mirror) { 655 if ((status & IOCON_SEQOP) || !(status & IOCON_HAEN) || mirror) {
658 /* mcp23s17 has IOCON twice, make sure they are in sync */ 656 /* mcp23s17 has IOCON twice, make sure they are in sync */
@@ -668,7 +666,7 @@ static int mcp23s08_probe_one(struct mcp23s08 *mcp, struct device *dev,
668 } 666 }
669 667
670 /* configure ~100K pullups */ 668 /* configure ~100K pullups */
671 status = mcp->ops->write(mcp, MCP_GPPU, pullups); 669 status = mcp->ops->write(mcp, MCP_GPPU, pdata->chip[cs].pullups);
672 if (status < 0) 670 if (status < 0)
673 goto fail; 671 goto fail;
674 672
@@ -768,25 +766,29 @@ MODULE_DEVICE_TABLE(of, mcp23s08_i2c_of_match);
768static int mcp230xx_probe(struct i2c_client *client, 766static int mcp230xx_probe(struct i2c_client *client,
769 const struct i2c_device_id *id) 767 const struct i2c_device_id *id)
770{ 768{
771 struct mcp23s08_platform_data *pdata; 769 struct mcp23s08_platform_data *pdata, local_pdata;
772 struct mcp23s08 *mcp; 770 struct mcp23s08 *mcp;
773 int status, base, pullups; 771 int status;
774 const struct of_device_id *match; 772 const struct of_device_id *match;
775 773
776 match = of_match_device(of_match_ptr(mcp23s08_i2c_of_match), 774 match = of_match_device(of_match_ptr(mcp23s08_i2c_of_match),
777 &client->dev); 775 &client->dev);
778 pdata = dev_get_platdata(&client->dev); 776 if (match) {
779 if (match || !pdata) { 777 pdata = &local_pdata;
780 base = -1; 778 pdata->base = -1;
781 pullups = 0; 779 pdata->chip[0].pullups = 0;
780 pdata->irq_controller = of_property_read_bool(
781 client->dev.of_node,
782 "interrupt-controller");
783 pdata->mirror = of_property_read_bool(client->dev.of_node,
784 "microchip,irq-mirror");
782 client->irq = irq_of_parse_and_map(client->dev.of_node, 0); 785 client->irq = irq_of_parse_and_map(client->dev.of_node, 0);
783 } else { 786 } else {
784 if (!gpio_is_valid(pdata->base)) { 787 pdata = dev_get_platdata(&client->dev);
788 if (!pdata || !gpio_is_valid(pdata->base)) {
785 dev_dbg(&client->dev, "invalid platform data\n"); 789 dev_dbg(&client->dev, "invalid platform data\n");
786 return -EINVAL; 790 return -EINVAL;
787 } 791 }
788 base = pdata->base;
789 pullups = pdata->chip[0].pullups;
790 } 792 }
791 793
792 mcp = kzalloc(sizeof(*mcp), GFP_KERNEL); 794 mcp = kzalloc(sizeof(*mcp), GFP_KERNEL);
@@ -795,7 +797,7 @@ static int mcp230xx_probe(struct i2c_client *client,
795 797
796 mcp->irq = client->irq; 798 mcp->irq = client->irq;
797 status = mcp23s08_probe_one(mcp, &client->dev, client, client->addr, 799 status = mcp23s08_probe_one(mcp, &client->dev, client, client->addr,
798 id->driver_data, base, pullups); 800 id->driver_data, pdata, 0);
799 if (status) 801 if (status)
800 goto fail; 802 goto fail;
801 803
@@ -812,16 +814,14 @@ fail:
812static int mcp230xx_remove(struct i2c_client *client) 814static int mcp230xx_remove(struct i2c_client *client)
813{ 815{
814 struct mcp23s08 *mcp = i2c_get_clientdata(client); 816 struct mcp23s08 *mcp = i2c_get_clientdata(client);
815 int status;
816 817
817 if (client->irq && mcp->irq_controller) 818 if (client->irq && mcp->irq_controller)
818 mcp23s08_irq_teardown(mcp); 819 mcp23s08_irq_teardown(mcp);
819 820
820 status = gpiochip_remove(&mcp->chip); 821 gpiochip_remove(&mcp->chip);
821 if (status == 0) 822 kfree(mcp);
822 kfree(mcp);
823 823
824 return status; 824 return 0;
825} 825}
826 826
827static const struct i2c_device_id mcp230xx_id[] = { 827static const struct i2c_device_id mcp230xx_id[] = {
@@ -865,14 +865,12 @@ static void mcp23s08_i2c_exit(void) { }
865 865
866static int mcp23s08_probe(struct spi_device *spi) 866static int mcp23s08_probe(struct spi_device *spi)
867{ 867{
868 struct mcp23s08_platform_data *pdata; 868 struct mcp23s08_platform_data *pdata, local_pdata;
869 unsigned addr; 869 unsigned addr;
870 int chips = 0; 870 int chips = 0;
871 struct mcp23s08_driver_data *data; 871 struct mcp23s08_driver_data *data;
872 int status, type; 872 int status, type;
873 unsigned base = -1, 873 unsigned ngpio = 0;
874 ngpio = 0,
875 pullups[ARRAY_SIZE(pdata->chip)];
876 const struct of_device_id *match; 874 const struct of_device_id *match;
877 u32 spi_present_mask = 0; 875 u32 spi_present_mask = 0;
878 876
@@ -895,11 +893,18 @@ static int mcp23s08_probe(struct spi_device *spi)
895 return -ENODEV; 893 return -ENODEV;
896 } 894 }
897 895
896 pdata = &local_pdata;
897 pdata->base = -1;
898 for (addr = 0; addr < ARRAY_SIZE(pdata->chip); addr++) { 898 for (addr = 0; addr < ARRAY_SIZE(pdata->chip); addr++) {
899 pullups[addr] = 0; 899 pdata->chip[addr].pullups = 0;
900 if (spi_present_mask & (1 << addr)) 900 if (spi_present_mask & (1 << addr))
901 chips++; 901 chips++;
902 } 902 }
903 pdata->irq_controller = of_property_read_bool(
904 spi->dev.of_node,
905 "interrupt-controller");
906 pdata->mirror = of_property_read_bool(spi->dev.of_node,
907 "microchip,irq-mirror");
903 } else { 908 } else {
904 type = spi_get_device_id(spi)->driver_data; 909 type = spi_get_device_id(spi)->driver_data;
905 pdata = dev_get_platdata(&spi->dev); 910 pdata = dev_get_platdata(&spi->dev);
@@ -919,10 +924,7 @@ static int mcp23s08_probe(struct spi_device *spi)
919 return -EINVAL; 924 return -EINVAL;
920 } 925 }
921 spi_present_mask |= 1 << addr; 926 spi_present_mask |= 1 << addr;
922 pullups[addr] = pdata->chip[addr].pullups;
923 } 927 }
924
925 base = pdata->base;
926 } 928 }
927 929
928 if (!chips) 930 if (!chips)
@@ -940,13 +942,13 @@ static int mcp23s08_probe(struct spi_device *spi)
940 chips--; 942 chips--;
941 data->mcp[addr] = &data->chip[chips]; 943 data->mcp[addr] = &data->chip[chips];
942 status = mcp23s08_probe_one(data->mcp[addr], &spi->dev, spi, 944 status = mcp23s08_probe_one(data->mcp[addr], &spi->dev, spi,
943 0x40 | (addr << 1), type, base, 945 0x40 | (addr << 1), type, pdata,
944 pullups[addr]); 946 addr);
945 if (status < 0) 947 if (status < 0)
946 goto fail; 948 goto fail;
947 949
948 if (base != -1) 950 if (pdata->base != -1)
949 base += (type == MCP_TYPE_S17) ? 16 : 8; 951 pdata->base += (type == MCP_TYPE_S17) ? 16 : 8;
950 ngpio += (type == MCP_TYPE_S17) ? 16 : 8; 952 ngpio += (type == MCP_TYPE_S17) ? 16 : 8;
951 } 953 }
952 data->ngpio = ngpio; 954 data->ngpio = ngpio;
@@ -960,13 +962,10 @@ static int mcp23s08_probe(struct spi_device *spi)
960 962
961fail: 963fail:
962 for (addr = 0; addr < ARRAY_SIZE(data->mcp); addr++) { 964 for (addr = 0; addr < ARRAY_SIZE(data->mcp); addr++) {
963 int tmp;
964 965
965 if (!data->mcp[addr]) 966 if (!data->mcp[addr])
966 continue; 967 continue;
967 tmp = gpiochip_remove(&data->mcp[addr]->chip); 968 gpiochip_remove(&data->mcp[addr]->chip);
968 if (tmp < 0)
969 dev_err(&spi->dev, "%s --> %d\n", "remove", tmp);
970 } 969 }
971 kfree(data); 970 kfree(data);
972 return status; 971 return status;
@@ -976,23 +975,16 @@ static int mcp23s08_remove(struct spi_device *spi)
976{ 975{
977 struct mcp23s08_driver_data *data = spi_get_drvdata(spi); 976 struct mcp23s08_driver_data *data = spi_get_drvdata(spi);
978 unsigned addr; 977 unsigned addr;
979 int status = 0;
980 978
981 for (addr = 0; addr < ARRAY_SIZE(data->mcp); addr++) { 979 for (addr = 0; addr < ARRAY_SIZE(data->mcp); addr++) {
982 int tmp;
983 980
984 if (!data->mcp[addr]) 981 if (!data->mcp[addr])
985 continue; 982 continue;
986 983
987 tmp = gpiochip_remove(&data->mcp[addr]->chip); 984 gpiochip_remove(&data->mcp[addr]->chip);
988 if (tmp < 0) {
989 dev_err(&spi->dev, "%s --> %d\n", "remove", tmp);
990 status = tmp;
991 }
992 } 985 }
993 if (status == 0) 986 kfree(data);
994 kfree(data); 987 return 0;
995 return status;
996} 988}
997 989
998static const struct spi_device_id mcp23s08_ids[] = { 990static const struct spi_device_id mcp23s08_ids[] = {
diff --git a/drivers/gpio/gpio-ml-ioh.c b/drivers/gpio/gpio-ml-ioh.c
index d51329d23d38..5536108aa9db 100644
--- a/drivers/gpio/gpio-ml-ioh.c
+++ b/drivers/gpio/gpio-ml-ioh.c
@@ -497,8 +497,7 @@ err_irq_alloc_descs:
497err_gpiochip_add: 497err_gpiochip_add:
498 while (--i >= 0) { 498 while (--i >= 0) {
499 chip--; 499 chip--;
500 if (gpiochip_remove(&chip->gpio)) 500 gpiochip_remove(&chip->gpio);
501 dev_err(&pdev->dev, "Failed gpiochip_remove(%d)\n", i);
502 } 501 }
503 kfree(chip_save); 502 kfree(chip_save);
504 503
@@ -519,7 +518,6 @@ err_pci_enable:
519 518
520static void ioh_gpio_remove(struct pci_dev *pdev) 519static void ioh_gpio_remove(struct pci_dev *pdev)
521{ 520{
522 int err;
523 int i; 521 int i;
524 struct ioh_gpio *chip = pci_get_drvdata(pdev); 522 struct ioh_gpio *chip = pci_get_drvdata(pdev);
525 void *chip_save; 523 void *chip_save;
@@ -530,9 +528,7 @@ static void ioh_gpio_remove(struct pci_dev *pdev)
530 528
531 for (i = 0; i < 8; i++, chip++) { 529 for (i = 0; i < 8; i++, chip++) {
532 irq_free_descs(chip->irq_base, num_ports[i]); 530 irq_free_descs(chip->irq_base, num_ports[i]);
533 err = gpiochip_remove(&chip->gpio); 531 gpiochip_remove(&chip->gpio);
534 if (err)
535 dev_err(&pdev->dev, "Failed gpiochip_remove\n");
536 } 532 }
537 533
538 chip = chip_save; 534 chip = chip_save;
diff --git a/drivers/gpio/gpio-msm-v2.c b/drivers/gpio/gpio-msm-v2.c
index a3351acd4963..94f57670df9a 100644
--- a/drivers/gpio/gpio-msm-v2.c
+++ b/drivers/gpio/gpio-msm-v2.c
@@ -438,10 +438,7 @@ MODULE_DEVICE_TABLE(of, msm_gpio_of_match);
438 438
439static int msm_gpio_remove(struct platform_device *dev) 439static int msm_gpio_remove(struct platform_device *dev)
440{ 440{
441 int ret = gpiochip_remove(&msm_gpio.gpio_chip); 441 gpiochip_remove(&msm_gpio.gpio_chip);
442
443 if (ret < 0)
444 return ret;
445 442
446 irq_set_handler(msm_gpio.summary_irq, NULL); 443 irq_set_handler(msm_gpio.summary_irq, NULL);
447 444
diff --git a/drivers/gpio/gpio-mxc.c b/drivers/gpio/gpio-mxc.c
index db83b3c0a449..f4e54a92e04a 100644
--- a/drivers/gpio/gpio-mxc.c
+++ b/drivers/gpio/gpio-mxc.c
@@ -485,7 +485,7 @@ static int mxc_gpio_probe(struct platform_device *pdev)
485out_irqdesc_free: 485out_irqdesc_free:
486 irq_free_descs(irq_base, 32); 486 irq_free_descs(irq_base, 32);
487out_gpiochip_remove: 487out_gpiochip_remove:
488 WARN_ON(gpiochip_remove(&port->bgc.gc) < 0); 488 gpiochip_remove(&port->bgc.gc);
489out_bgpio_remove: 489out_bgpio_remove:
490 bgpio_remove(&port->bgc); 490 bgpio_remove(&port->bgc);
491out_bgio: 491out_bgio:
diff --git a/drivers/gpio/gpio-octeon.c b/drivers/gpio/gpio-octeon.c
index dbb08546b9ec..5c5770c99c80 100644
--- a/drivers/gpio/gpio-octeon.c
+++ b/drivers/gpio/gpio-octeon.c
@@ -129,7 +129,8 @@ out:
129static int octeon_gpio_remove(struct platform_device *pdev) 129static int octeon_gpio_remove(struct platform_device *pdev)
130{ 130{
131 struct gpio_chip *chip = pdev->dev.platform_data; 131 struct gpio_chip *chip = pdev->dev.platform_data;
132 return gpiochip_remove(chip); 132 gpiochip_remove(chip);
133 return 0;
133} 134}
134 135
135static struct of_device_id octeon_gpio_match[] = { 136static struct of_device_id octeon_gpio_match[] = {
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index 00f29aa1fb9d..415682f69214 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -24,7 +24,6 @@
24#include <linux/pm.h> 24#include <linux/pm.h>
25#include <linux/of.h> 25#include <linux/of.h>
26#include <linux/of_device.h> 26#include <linux/of_device.h>
27#include <linux/irqchip/chained_irq.h>
28#include <linux/gpio.h> 27#include <linux/gpio.h>
29#include <linux/bitops.h> 28#include <linux/bitops.h>
30#include <linux/platform_data/gpio-omap.h> 29#include <linux/platform_data/gpio-omap.h>
@@ -89,18 +88,19 @@ struct gpio_bank {
89#define BANK_USED(bank) (bank->mod_usage || bank->irq_usage) 88#define BANK_USED(bank) (bank->mod_usage || bank->irq_usage)
90#define LINE_USED(line, offset) (line & (BIT(offset))) 89#define LINE_USED(line, offset) (line & (BIT(offset)))
91 90
92static int irq_to_gpio(struct gpio_bank *bank, unsigned int gpio_irq) 91static int omap_irq_to_gpio(struct gpio_bank *bank, unsigned int gpio_irq)
93{ 92{
94 return bank->chip.base + gpio_irq; 93 return bank->chip.base + gpio_irq;
95} 94}
96 95
97static inline struct gpio_bank *_irq_data_get_bank(struct irq_data *d) 96static inline struct gpio_bank *omap_irq_data_get_bank(struct irq_data *d)
98{ 97{
99 struct gpio_chip *chip = irq_data_get_irq_chip_data(d); 98 struct gpio_chip *chip = irq_data_get_irq_chip_data(d);
100 return container_of(chip, struct gpio_bank, chip); 99 return container_of(chip, struct gpio_bank, chip);
101} 100}
102 101
103static void _set_gpio_direction(struct gpio_bank *bank, int gpio, int is_input) 102static void omap_set_gpio_direction(struct gpio_bank *bank, int gpio,
103 int is_input)
104{ 104{
105 void __iomem *reg = bank->base; 105 void __iomem *reg = bank->base;
106 u32 l; 106 u32 l;
@@ -117,7 +117,8 @@ static void _set_gpio_direction(struct gpio_bank *bank, int gpio, int is_input)
117 117
118 118
119/* set data out value using dedicate set/clear register */ 119/* set data out value using dedicate set/clear register */
120static void _set_gpio_dataout_reg(struct gpio_bank *bank, int gpio, int enable) 120static void omap_set_gpio_dataout_reg(struct gpio_bank *bank, int gpio,
121 int enable)
121{ 122{
122 void __iomem *reg = bank->base; 123 void __iomem *reg = bank->base;
123 u32 l = GPIO_BIT(bank, gpio); 124 u32 l = GPIO_BIT(bank, gpio);
@@ -134,7 +135,8 @@ static void _set_gpio_dataout_reg(struct gpio_bank *bank, int gpio, int enable)
134} 135}
135 136
136/* set data out value using mask register */ 137/* set data out value using mask register */
137static void _set_gpio_dataout_mask(struct gpio_bank *bank, int gpio, int enable) 138static void omap_set_gpio_dataout_mask(struct gpio_bank *bank, int gpio,
139 int enable)
138{ 140{
139 void __iomem *reg = bank->base + bank->regs->dataout; 141 void __iomem *reg = bank->base + bank->regs->dataout;
140 u32 gpio_bit = GPIO_BIT(bank, gpio); 142 u32 gpio_bit = GPIO_BIT(bank, gpio);
@@ -149,21 +151,21 @@ static void _set_gpio_dataout_mask(struct gpio_bank *bank, int gpio, int enable)
149 bank->context.dataout = l; 151 bank->context.dataout = l;
150} 152}
151 153
152static int _get_gpio_datain(struct gpio_bank *bank, int offset) 154static int omap_get_gpio_datain(struct gpio_bank *bank, int offset)
153{ 155{
154 void __iomem *reg = bank->base + bank->regs->datain; 156 void __iomem *reg = bank->base + bank->regs->datain;
155 157
156 return (readl_relaxed(reg) & (BIT(offset))) != 0; 158 return (readl_relaxed(reg) & (BIT(offset))) != 0;
157} 159}
158 160
159static int _get_gpio_dataout(struct gpio_bank *bank, int offset) 161static int omap_get_gpio_dataout(struct gpio_bank *bank, int offset)
160{ 162{
161 void __iomem *reg = bank->base + bank->regs->dataout; 163 void __iomem *reg = bank->base + bank->regs->dataout;
162 164
163 return (readl_relaxed(reg) & (BIT(offset))) != 0; 165 return (readl_relaxed(reg) & (BIT(offset))) != 0;
164} 166}
165 167
166static inline void _gpio_rmw(void __iomem *base, u32 reg, u32 mask, bool set) 168static inline void omap_gpio_rmw(void __iomem *base, u32 reg, u32 mask, bool set)
167{ 169{
168 int l = readl_relaxed(base + reg); 170 int l = readl_relaxed(base + reg);
169 171
@@ -175,7 +177,7 @@ static inline void _gpio_rmw(void __iomem *base, u32 reg, u32 mask, bool set)
175 writel_relaxed(l, base + reg); 177 writel_relaxed(l, base + reg);
176} 178}
177 179
178static inline void _gpio_dbck_enable(struct gpio_bank *bank) 180static inline void omap_gpio_dbck_enable(struct gpio_bank *bank)
179{ 181{
180 if (bank->dbck_enable_mask && !bank->dbck_enabled) { 182 if (bank->dbck_enable_mask && !bank->dbck_enabled) {
181 clk_prepare_enable(bank->dbck); 183 clk_prepare_enable(bank->dbck);
@@ -186,7 +188,7 @@ static inline void _gpio_dbck_enable(struct gpio_bank *bank)
186 } 188 }
187} 189}
188 190
189static inline void _gpio_dbck_disable(struct gpio_bank *bank) 191static inline void omap_gpio_dbck_disable(struct gpio_bank *bank)
190{ 192{
191 if (bank->dbck_enable_mask && bank->dbck_enabled) { 193 if (bank->dbck_enable_mask && bank->dbck_enabled) {
192 /* 194 /*
@@ -202,7 +204,7 @@ static inline void _gpio_dbck_disable(struct gpio_bank *bank)
202} 204}
203 205
204/** 206/**
205 * _set_gpio_debounce - low level gpio debounce time 207 * omap2_set_gpio_debounce - low level gpio debounce time
206 * @bank: the gpio bank we're acting upon 208 * @bank: the gpio bank we're acting upon
207 * @gpio: the gpio number on this @gpio 209 * @gpio: the gpio number on this @gpio
208 * @debounce: debounce time to use 210 * @debounce: debounce time to use
@@ -210,8 +212,8 @@ static inline void _gpio_dbck_disable(struct gpio_bank *bank)
210 * OMAP's debounce time is in 31us steps so we need 212 * OMAP's debounce time is in 31us steps so we need
211 * to convert and round up to the closest unit. 213 * to convert and round up to the closest unit.
212 */ 214 */
213static void _set_gpio_debounce(struct gpio_bank *bank, unsigned gpio, 215static void omap2_set_gpio_debounce(struct gpio_bank *bank, unsigned gpio,
214 unsigned debounce) 216 unsigned debounce)
215{ 217{
216 void __iomem *reg; 218 void __iomem *reg;
217 u32 val; 219 u32 val;
@@ -252,7 +254,7 @@ static void _set_gpio_debounce(struct gpio_bank *bank, unsigned gpio,
252 * used within _gpio_dbck_enable() is still not initialized at 254 * used within _gpio_dbck_enable() is still not initialized at
253 * that point. Therefore we have to enable dbck here. 255 * that point. Therefore we have to enable dbck here.
254 */ 256 */
255 _gpio_dbck_enable(bank); 257 omap_gpio_dbck_enable(bank);
256 if (bank->dbck_enable_mask) { 258 if (bank->dbck_enable_mask) {
257 bank->context.debounce = debounce; 259 bank->context.debounce = debounce;
258 bank->context.debounce_en = val; 260 bank->context.debounce_en = val;
@@ -260,7 +262,7 @@ static void _set_gpio_debounce(struct gpio_bank *bank, unsigned gpio,
260} 262}
261 263
262/** 264/**
263 * _clear_gpio_debounce - clear debounce settings for a gpio 265 * omap_clear_gpio_debounce - clear debounce settings for a gpio
264 * @bank: the gpio bank we're acting upon 266 * @bank: the gpio bank we're acting upon
265 * @gpio: the gpio number on this @gpio 267 * @gpio: the gpio number on this @gpio
266 * 268 *
@@ -269,7 +271,7 @@ static void _set_gpio_debounce(struct gpio_bank *bank, unsigned gpio,
269 * time too. The debounce clock will also be disabled when calling this function 271 * time too. The debounce clock will also be disabled when calling this function
270 * if this is the only gpio in the bank using debounce. 272 * if this is the only gpio in the bank using debounce.
271 */ 273 */
272static void _clear_gpio_debounce(struct gpio_bank *bank, unsigned gpio) 274static void omap_clear_gpio_debounce(struct gpio_bank *bank, unsigned gpio)
273{ 275{
274 u32 gpio_bit = GPIO_BIT(bank, gpio); 276 u32 gpio_bit = GPIO_BIT(bank, gpio);
275 277
@@ -293,20 +295,20 @@ static void _clear_gpio_debounce(struct gpio_bank *bank, unsigned gpio)
293 } 295 }
294} 296}
295 297
296static inline void set_gpio_trigger(struct gpio_bank *bank, int gpio, 298static inline void omap_set_gpio_trigger(struct gpio_bank *bank, int gpio,
297 unsigned trigger) 299 unsigned trigger)
298{ 300{
299 void __iomem *base = bank->base; 301 void __iomem *base = bank->base;
300 u32 gpio_bit = BIT(gpio); 302 u32 gpio_bit = BIT(gpio);
301 303
302 _gpio_rmw(base, bank->regs->leveldetect0, gpio_bit, 304 omap_gpio_rmw(base, bank->regs->leveldetect0, gpio_bit,
303 trigger & IRQ_TYPE_LEVEL_LOW); 305 trigger & IRQ_TYPE_LEVEL_LOW);
304 _gpio_rmw(base, bank->regs->leveldetect1, gpio_bit, 306 omap_gpio_rmw(base, bank->regs->leveldetect1, gpio_bit,
305 trigger & IRQ_TYPE_LEVEL_HIGH); 307 trigger & IRQ_TYPE_LEVEL_HIGH);
306 _gpio_rmw(base, bank->regs->risingdetect, gpio_bit, 308 omap_gpio_rmw(base, bank->regs->risingdetect, gpio_bit,
307 trigger & IRQ_TYPE_EDGE_RISING); 309 trigger & IRQ_TYPE_EDGE_RISING);
308 _gpio_rmw(base, bank->regs->fallingdetect, gpio_bit, 310 omap_gpio_rmw(base, bank->regs->fallingdetect, gpio_bit,
309 trigger & IRQ_TYPE_EDGE_FALLING); 311 trigger & IRQ_TYPE_EDGE_FALLING);
310 312
311 bank->context.leveldetect0 = 313 bank->context.leveldetect0 =
312 readl_relaxed(bank->base + bank->regs->leveldetect0); 314 readl_relaxed(bank->base + bank->regs->leveldetect0);
@@ -318,7 +320,7 @@ static inline void set_gpio_trigger(struct gpio_bank *bank, int gpio,
318 readl_relaxed(bank->base + bank->regs->fallingdetect); 320 readl_relaxed(bank->base + bank->regs->fallingdetect);
319 321
320 if (likely(!(bank->non_wakeup_gpios & gpio_bit))) { 322 if (likely(!(bank->non_wakeup_gpios & gpio_bit))) {
321 _gpio_rmw(base, bank->regs->wkup_en, gpio_bit, trigger != 0); 323 omap_gpio_rmw(base, bank->regs->wkup_en, gpio_bit, trigger != 0);
322 bank->context.wake_en = 324 bank->context.wake_en =
323 readl_relaxed(bank->base + bank->regs->wkup_en); 325 readl_relaxed(bank->base + bank->regs->wkup_en);
324 } 326 }
@@ -354,7 +356,7 @@ exit:
354 * This only applies to chips that can't do both rising and falling edge 356 * This only applies to chips that can't do both rising and falling edge
355 * detection at once. For all other chips, this function is a noop. 357 * detection at once. For all other chips, this function is a noop.
356 */ 358 */
357static void _toggle_gpio_edge_triggering(struct gpio_bank *bank, int gpio) 359static void omap_toggle_gpio_edge_triggering(struct gpio_bank *bank, int gpio)
358{ 360{
359 void __iomem *reg = bank->base; 361 void __iomem *reg = bank->base;
360 u32 l = 0; 362 u32 l = 0;
@@ -373,18 +375,18 @@ static void _toggle_gpio_edge_triggering(struct gpio_bank *bank, int gpio)
373 writel_relaxed(l, reg); 375 writel_relaxed(l, reg);
374} 376}
375#else 377#else
376static void _toggle_gpio_edge_triggering(struct gpio_bank *bank, int gpio) {} 378static void omap_toggle_gpio_edge_triggering(struct gpio_bank *bank, int gpio) {}
377#endif 379#endif
378 380
379static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, 381static int omap_set_gpio_triggering(struct gpio_bank *bank, int gpio,
380 unsigned trigger) 382 unsigned trigger)
381{ 383{
382 void __iomem *reg = bank->base; 384 void __iomem *reg = bank->base;
383 void __iomem *base = bank->base; 385 void __iomem *base = bank->base;
384 u32 l = 0; 386 u32 l = 0;
385 387
386 if (bank->regs->leveldetect0 && bank->regs->wkup_en) { 388 if (bank->regs->leveldetect0 && bank->regs->wkup_en) {
387 set_gpio_trigger(bank, gpio, trigger); 389 omap_set_gpio_trigger(bank, gpio, trigger);
388 } else if (bank->regs->irqctrl) { 390 } else if (bank->regs->irqctrl) {
389 reg += bank->regs->irqctrl; 391 reg += bank->regs->irqctrl;
390 392
@@ -414,7 +416,7 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio,
414 l |= BIT(gpio << 1); 416 l |= BIT(gpio << 1);
415 417
416 /* Enable wake-up during idle for dynamic tick */ 418 /* Enable wake-up during idle for dynamic tick */
417 _gpio_rmw(base, bank->regs->wkup_en, BIT(gpio), trigger); 419 omap_gpio_rmw(base, bank->regs->wkup_en, BIT(gpio), trigger);
418 bank->context.wake_en = 420 bank->context.wake_en =
419 readl_relaxed(bank->base + bank->regs->wkup_en); 421 readl_relaxed(bank->base + bank->regs->wkup_en);
420 writel_relaxed(l, reg); 422 writel_relaxed(l, reg);
@@ -422,7 +424,7 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio,
422 return 0; 424 return 0;
423} 425}
424 426
425static void _enable_gpio_module(struct gpio_bank *bank, unsigned offset) 427static void omap_enable_gpio_module(struct gpio_bank *bank, unsigned offset)
426{ 428{
427 if (bank->regs->pinctrl) { 429 if (bank->regs->pinctrl) {
428 void __iomem *reg = bank->base + bank->regs->pinctrl; 430 void __iomem *reg = bank->base + bank->regs->pinctrl;
@@ -443,7 +445,7 @@ static void _enable_gpio_module(struct gpio_bank *bank, unsigned offset)
443 } 445 }
444} 446}
445 447
446static void _disable_gpio_module(struct gpio_bank *bank, unsigned offset) 448static void omap_disable_gpio_module(struct gpio_bank *bank, unsigned offset)
447{ 449{
448 void __iomem *base = bank->base; 450 void __iomem *base = bank->base;
449 451
@@ -451,7 +453,7 @@ static void _disable_gpio_module(struct gpio_bank *bank, unsigned offset)
451 !LINE_USED(bank->mod_usage, offset) && 453 !LINE_USED(bank->mod_usage, offset) &&
452 !LINE_USED(bank->irq_usage, offset)) { 454 !LINE_USED(bank->irq_usage, offset)) {
453 /* Disable wake-up during idle for dynamic tick */ 455 /* Disable wake-up during idle for dynamic tick */
454 _gpio_rmw(base, bank->regs->wkup_en, BIT(offset), 0); 456 omap_gpio_rmw(base, bank->regs->wkup_en, BIT(offset), 0);
455 bank->context.wake_en = 457 bank->context.wake_en =
456 readl_relaxed(bank->base + bank->regs->wkup_en); 458 readl_relaxed(bank->base + bank->regs->wkup_en);
457 } 459 }
@@ -468,16 +470,16 @@ static void _disable_gpio_module(struct gpio_bank *bank, unsigned offset)
468 } 470 }
469} 471}
470 472
471static int gpio_is_input(struct gpio_bank *bank, int mask) 473static int omap_gpio_is_input(struct gpio_bank *bank, int mask)
472{ 474{
473 void __iomem *reg = bank->base + bank->regs->direction; 475 void __iomem *reg = bank->base + bank->regs->direction;
474 476
475 return readl_relaxed(reg) & mask; 477 return readl_relaxed(reg) & mask;
476} 478}
477 479
478static int gpio_irq_type(struct irq_data *d, unsigned type) 480static int omap_gpio_irq_type(struct irq_data *d, unsigned type)
479{ 481{
480 struct gpio_bank *bank = _irq_data_get_bank(d); 482 struct gpio_bank *bank = omap_irq_data_get_bank(d);
481 unsigned gpio = 0; 483 unsigned gpio = 0;
482 int retval; 484 int retval;
483 unsigned long flags; 485 unsigned long flags;
@@ -492,7 +494,7 @@ static int gpio_irq_type(struct irq_data *d, unsigned type)
492#endif 494#endif
493 495
494 if (!gpio) 496 if (!gpio)
495 gpio = irq_to_gpio(bank, d->hwirq); 497 gpio = omap_irq_to_gpio(bank, d->hwirq);
496 498
497 if (type & ~IRQ_TYPE_SENSE_MASK) 499 if (type & ~IRQ_TYPE_SENSE_MASK)
498 return -EINVAL; 500 return -EINVAL;
@@ -503,11 +505,11 @@ static int gpio_irq_type(struct irq_data *d, unsigned type)
503 505
504 spin_lock_irqsave(&bank->lock, flags); 506 spin_lock_irqsave(&bank->lock, flags);
505 offset = GPIO_INDEX(bank, gpio); 507 offset = GPIO_INDEX(bank, gpio);
506 retval = _set_gpio_triggering(bank, offset, type); 508 retval = omap_set_gpio_triggering(bank, offset, type);
507 if (!LINE_USED(bank->mod_usage, offset)) { 509 if (!LINE_USED(bank->mod_usage, offset)) {
508 _enable_gpio_module(bank, offset); 510 omap_enable_gpio_module(bank, offset);
509 _set_gpio_direction(bank, offset, 1); 511 omap_set_gpio_direction(bank, offset, 1);
510 } else if (!gpio_is_input(bank, BIT(offset))) { 512 } else if (!omap_gpio_is_input(bank, BIT(offset))) {
511 spin_unlock_irqrestore(&bank->lock, flags); 513 spin_unlock_irqrestore(&bank->lock, flags);
512 return -EINVAL; 514 return -EINVAL;
513 } 515 }
@@ -523,7 +525,7 @@ static int gpio_irq_type(struct irq_data *d, unsigned type)
523 return retval; 525 return retval;
524} 526}
525 527
526static void _clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask) 528static void omap_clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask)
527{ 529{
528 void __iomem *reg = bank->base; 530 void __iomem *reg = bank->base;
529 531
@@ -540,12 +542,12 @@ static void _clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask)
540 readl_relaxed(reg); 542 readl_relaxed(reg);
541} 543}
542 544
543static inline void _clear_gpio_irqstatus(struct gpio_bank *bank, int gpio) 545static inline void omap_clear_gpio_irqstatus(struct gpio_bank *bank, int gpio)
544{ 546{
545 _clear_gpio_irqbank(bank, GPIO_BIT(bank, gpio)); 547 omap_clear_gpio_irqbank(bank, GPIO_BIT(bank, gpio));
546} 548}
547 549
548static u32 _get_gpio_irqbank_mask(struct gpio_bank *bank) 550static u32 omap_get_gpio_irqbank_mask(struct gpio_bank *bank)
549{ 551{
550 void __iomem *reg = bank->base; 552 void __iomem *reg = bank->base;
551 u32 l; 553 u32 l;
@@ -559,7 +561,7 @@ static u32 _get_gpio_irqbank_mask(struct gpio_bank *bank)
559 return l; 561 return l;
560} 562}
561 563
562static void _enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask) 564static void omap_enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask)
563{ 565{
564 void __iomem *reg = bank->base; 566 void __iomem *reg = bank->base;
565 u32 l; 567 u32 l;
@@ -581,7 +583,7 @@ static void _enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask)
581 writel_relaxed(l, reg); 583 writel_relaxed(l, reg);
582} 584}
583 585
584static void _disable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask) 586static void omap_disable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask)
585{ 587{
586 void __iomem *reg = bank->base; 588 void __iomem *reg = bank->base;
587 u32 l; 589 u32 l;
@@ -603,12 +605,13 @@ static void _disable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask)
603 writel_relaxed(l, reg); 605 writel_relaxed(l, reg);
604} 606}
605 607
606static inline void _set_gpio_irqenable(struct gpio_bank *bank, int gpio, int enable) 608static inline void omap_set_gpio_irqenable(struct gpio_bank *bank, int gpio,
609 int enable)
607{ 610{
608 if (enable) 611 if (enable)
609 _enable_gpio_irqbank(bank, GPIO_BIT(bank, gpio)); 612 omap_enable_gpio_irqbank(bank, GPIO_BIT(bank, gpio));
610 else 613 else
611 _disable_gpio_irqbank(bank, GPIO_BIT(bank, gpio)); 614 omap_disable_gpio_irqbank(bank, GPIO_BIT(bank, gpio));
612} 615}
613 616
614/* 617/*
@@ -619,7 +622,7 @@ static inline void _set_gpio_irqenable(struct gpio_bank *bank, int gpio, int ena
619 * enabled. When system is suspended, only selected GPIO interrupts need 622 * enabled. When system is suspended, only selected GPIO interrupts need
620 * to have wake-up enabled. 623 * to have wake-up enabled.
621 */ 624 */
622static int _set_gpio_wakeup(struct gpio_bank *bank, int gpio, int enable) 625static int omap_set_gpio_wakeup(struct gpio_bank *bank, int gpio, int enable)
623{ 626{
624 u32 gpio_bit = GPIO_BIT(bank, gpio); 627 u32 gpio_bit = GPIO_BIT(bank, gpio);
625 unsigned long flags; 628 unsigned long flags;
@@ -642,22 +645,22 @@ static int _set_gpio_wakeup(struct gpio_bank *bank, int gpio, int enable)
642 return 0; 645 return 0;
643} 646}
644 647
645static void _reset_gpio(struct gpio_bank *bank, int gpio) 648static void omap_reset_gpio(struct gpio_bank *bank, int gpio)
646{ 649{
647 _set_gpio_direction(bank, GPIO_INDEX(bank, gpio), 1); 650 omap_set_gpio_direction(bank, GPIO_INDEX(bank, gpio), 1);
648 _set_gpio_irqenable(bank, gpio, 0); 651 omap_set_gpio_irqenable(bank, gpio, 0);
649 _clear_gpio_irqstatus(bank, gpio); 652 omap_clear_gpio_irqstatus(bank, gpio);
650 _set_gpio_triggering(bank, GPIO_INDEX(bank, gpio), IRQ_TYPE_NONE); 653 omap_set_gpio_triggering(bank, GPIO_INDEX(bank, gpio), IRQ_TYPE_NONE);
651 _clear_gpio_debounce(bank, gpio); 654 omap_clear_gpio_debounce(bank, gpio);
652} 655}
653 656
654/* Use disable_irq_wake() and enable_irq_wake() functions from drivers */ 657/* Use disable_irq_wake() and enable_irq_wake() functions from drivers */
655static int gpio_wake_enable(struct irq_data *d, unsigned int enable) 658static int omap_gpio_wake_enable(struct irq_data *d, unsigned int enable)
656{ 659{
657 struct gpio_bank *bank = _irq_data_get_bank(d); 660 struct gpio_bank *bank = omap_irq_data_get_bank(d);
658 unsigned int gpio = irq_to_gpio(bank, d->hwirq); 661 unsigned int gpio = omap_irq_to_gpio(bank, d->hwirq);
659 662
660 return _set_gpio_wakeup(bank, gpio, enable); 663 return omap_set_gpio_wakeup(bank, gpio, enable);
661} 664}
662 665
663static int omap_gpio_request(struct gpio_chip *chip, unsigned offset) 666static int omap_gpio_request(struct gpio_chip *chip, unsigned offset)
@@ -678,8 +681,8 @@ static int omap_gpio_request(struct gpio_chip *chip, unsigned offset)
678 * not already been requested. 681 * not already been requested.
679 */ 682 */
680 if (!LINE_USED(bank->irq_usage, offset)) { 683 if (!LINE_USED(bank->irq_usage, offset)) {
681 _set_gpio_triggering(bank, offset, IRQ_TYPE_NONE); 684 omap_set_gpio_triggering(bank, offset, IRQ_TYPE_NONE);
682 _enable_gpio_module(bank, offset); 685 omap_enable_gpio_module(bank, offset);
683 } 686 }
684 bank->mod_usage |= BIT(offset); 687 bank->mod_usage |= BIT(offset);
685 spin_unlock_irqrestore(&bank->lock, flags); 688 spin_unlock_irqrestore(&bank->lock, flags);
@@ -694,8 +697,8 @@ static void omap_gpio_free(struct gpio_chip *chip, unsigned offset)
694 697
695 spin_lock_irqsave(&bank->lock, flags); 698 spin_lock_irqsave(&bank->lock, flags);
696 bank->mod_usage &= ~(BIT(offset)); 699 bank->mod_usage &= ~(BIT(offset));
697 _disable_gpio_module(bank, offset); 700 omap_disable_gpio_module(bank, offset);
698 _reset_gpio(bank, bank->chip.base + offset); 701 omap_reset_gpio(bank, bank->chip.base + offset);
699 spin_unlock_irqrestore(&bank->lock, flags); 702 spin_unlock_irqrestore(&bank->lock, flags);
700 703
701 /* 704 /*
@@ -715,7 +718,7 @@ static void omap_gpio_free(struct gpio_chip *chip, unsigned offset)
715 * line's interrupt handler has been run, we may miss some nested 718 * line's interrupt handler has been run, we may miss some nested
716 * interrupts. 719 * interrupts.
717 */ 720 */
718static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc) 721static void omap_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
719{ 722{
720 void __iomem *isr_reg = NULL; 723 void __iomem *isr_reg = NULL;
721 u32 isr; 724 u32 isr;
@@ -738,7 +741,7 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
738 u32 isr_saved, level_mask = 0; 741 u32 isr_saved, level_mask = 0;
739 u32 enabled; 742 u32 enabled;
740 743
741 enabled = _get_gpio_irqbank_mask(bank); 744 enabled = omap_get_gpio_irqbank_mask(bank);
742 isr_saved = isr = readl_relaxed(isr_reg) & enabled; 745 isr_saved = isr = readl_relaxed(isr_reg) & enabled;
743 746
744 if (bank->level_mask) 747 if (bank->level_mask)
@@ -747,9 +750,9 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
747 /* clear edge sensitive interrupts before handler(s) are 750 /* clear edge sensitive interrupts before handler(s) are
748 called so that we don't miss any interrupt occurred while 751 called so that we don't miss any interrupt occurred while
749 executing them */ 752 executing them */
750 _disable_gpio_irqbank(bank, isr_saved & ~level_mask); 753 omap_disable_gpio_irqbank(bank, isr_saved & ~level_mask);
751 _clear_gpio_irqbank(bank, isr_saved & ~level_mask); 754 omap_clear_gpio_irqbank(bank, isr_saved & ~level_mask);
752 _enable_gpio_irqbank(bank, isr_saved & ~level_mask); 755 omap_enable_gpio_irqbank(bank, isr_saved & ~level_mask);
753 756
754 /* if there is only edge sensitive GPIO pin interrupts 757 /* if there is only edge sensitive GPIO pin interrupts
755 configured, we could unmask GPIO bank interrupt immediately */ 758 configured, we could unmask GPIO bank interrupt immediately */
@@ -773,7 +776,7 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
773 * This will be indicated in the bank toggle_mask. 776 * This will be indicated in the bank toggle_mask.
774 */ 777 */
775 if (bank->toggle_mask & (BIT(bit))) 778 if (bank->toggle_mask & (BIT(bit)))
776 _toggle_gpio_edge_triggering(bank, bit); 779 omap_toggle_gpio_edge_triggering(bank, bit);
777 780
778 generic_handle_irq(irq_find_mapping(bank->chip.irqdomain, 781 generic_handle_irq(irq_find_mapping(bank->chip.irqdomain,
779 bit)); 782 bit));
@@ -789,18 +792,18 @@ exit:
789 pm_runtime_put(bank->dev); 792 pm_runtime_put(bank->dev);
790} 793}
791 794
792static void gpio_irq_shutdown(struct irq_data *d) 795static void omap_gpio_irq_shutdown(struct irq_data *d)
793{ 796{
794 struct gpio_bank *bank = _irq_data_get_bank(d); 797 struct gpio_bank *bank = omap_irq_data_get_bank(d);
795 unsigned int gpio = irq_to_gpio(bank, d->hwirq); 798 unsigned int gpio = omap_irq_to_gpio(bank, d->hwirq);
796 unsigned long flags; 799 unsigned long flags;
797 unsigned offset = GPIO_INDEX(bank, gpio); 800 unsigned offset = GPIO_INDEX(bank, gpio);
798 801
799 spin_lock_irqsave(&bank->lock, flags); 802 spin_lock_irqsave(&bank->lock, flags);
800 gpio_unlock_as_irq(&bank->chip, offset); 803 gpio_unlock_as_irq(&bank->chip, offset);
801 bank->irq_usage &= ~(BIT(offset)); 804 bank->irq_usage &= ~(BIT(offset));
802 _disable_gpio_module(bank, offset); 805 omap_disable_gpio_module(bank, offset);
803 _reset_gpio(bank, gpio); 806 omap_reset_gpio(bank, gpio);
804 spin_unlock_irqrestore(&bank->lock, flags); 807 spin_unlock_irqrestore(&bank->lock, flags);
805 808
806 /* 809 /*
@@ -811,59 +814,49 @@ static void gpio_irq_shutdown(struct irq_data *d)
811 pm_runtime_put(bank->dev); 814 pm_runtime_put(bank->dev);
812} 815}
813 816
814static void gpio_ack_irq(struct irq_data *d) 817static void omap_gpio_ack_irq(struct irq_data *d)
815{ 818{
816 struct gpio_bank *bank = _irq_data_get_bank(d); 819 struct gpio_bank *bank = omap_irq_data_get_bank(d);
817 unsigned int gpio = irq_to_gpio(bank, d->hwirq); 820 unsigned int gpio = omap_irq_to_gpio(bank, d->hwirq);
818 821
819 _clear_gpio_irqstatus(bank, gpio); 822 omap_clear_gpio_irqstatus(bank, gpio);
820} 823}
821 824
822static void gpio_mask_irq(struct irq_data *d) 825static void omap_gpio_mask_irq(struct irq_data *d)
823{ 826{
824 struct gpio_bank *bank = _irq_data_get_bank(d); 827 struct gpio_bank *bank = omap_irq_data_get_bank(d);
825 unsigned int gpio = irq_to_gpio(bank, d->hwirq); 828 unsigned int gpio = omap_irq_to_gpio(bank, d->hwirq);
826 unsigned long flags; 829 unsigned long flags;
827 830
828 spin_lock_irqsave(&bank->lock, flags); 831 spin_lock_irqsave(&bank->lock, flags);
829 _set_gpio_irqenable(bank, gpio, 0); 832 omap_set_gpio_irqenable(bank, gpio, 0);
830 _set_gpio_triggering(bank, GPIO_INDEX(bank, gpio), IRQ_TYPE_NONE); 833 omap_set_gpio_triggering(bank, GPIO_INDEX(bank, gpio), IRQ_TYPE_NONE);
831 spin_unlock_irqrestore(&bank->lock, flags); 834 spin_unlock_irqrestore(&bank->lock, flags);
832} 835}
833 836
834static void gpio_unmask_irq(struct irq_data *d) 837static void omap_gpio_unmask_irq(struct irq_data *d)
835{ 838{
836 struct gpio_bank *bank = _irq_data_get_bank(d); 839 struct gpio_bank *bank = omap_irq_data_get_bank(d);
837 unsigned int gpio = irq_to_gpio(bank, d->hwirq); 840 unsigned int gpio = omap_irq_to_gpio(bank, d->hwirq);
838 unsigned int irq_mask = GPIO_BIT(bank, gpio); 841 unsigned int irq_mask = GPIO_BIT(bank, gpio);
839 u32 trigger = irqd_get_trigger_type(d); 842 u32 trigger = irqd_get_trigger_type(d);
840 unsigned long flags; 843 unsigned long flags;
841 844
842 spin_lock_irqsave(&bank->lock, flags); 845 spin_lock_irqsave(&bank->lock, flags);
843 if (trigger) 846 if (trigger)
844 _set_gpio_triggering(bank, GPIO_INDEX(bank, gpio), trigger); 847 omap_set_gpio_triggering(bank, GPIO_INDEX(bank, gpio), trigger);
845 848
846 /* For level-triggered GPIOs, the clearing must be done after 849 /* For level-triggered GPIOs, the clearing must be done after
847 * the HW source is cleared, thus after the handler has run */ 850 * the HW source is cleared, thus after the handler has run */
848 if (bank->level_mask & irq_mask) { 851 if (bank->level_mask & irq_mask) {
849 _set_gpio_irqenable(bank, gpio, 0); 852 omap_set_gpio_irqenable(bank, gpio, 0);
850 _clear_gpio_irqstatus(bank, gpio); 853 omap_clear_gpio_irqstatus(bank, gpio);
851 } 854 }
852 855
853 _set_gpio_irqenable(bank, gpio, 1); 856 omap_set_gpio_irqenable(bank, gpio, 1);
854 spin_unlock_irqrestore(&bank->lock, flags); 857 spin_unlock_irqrestore(&bank->lock, flags);
855} 858}
856 859
857static struct irq_chip gpio_irq_chip = {
858 .name = "GPIO",
859 .irq_shutdown = gpio_irq_shutdown,
860 .irq_ack = gpio_ack_irq,
861 .irq_mask = gpio_mask_irq,
862 .irq_unmask = gpio_unmask_irq,
863 .irq_set_type = gpio_irq_type,
864 .irq_set_wake = gpio_wake_enable,
865};
866
867/*---------------------------------------------------------------------*/ 860/*---------------------------------------------------------------------*/
868 861
869static int omap_mpuio_suspend_noirq(struct device *dev) 862static int omap_mpuio_suspend_noirq(struct device *dev)
@@ -918,7 +911,7 @@ static struct platform_device omap_mpuio_device = {
918 /* could list the /proc/iomem resources */ 911 /* could list the /proc/iomem resources */
919}; 912};
920 913
921static inline void mpuio_init(struct gpio_bank *bank) 914static inline void omap_mpuio_init(struct gpio_bank *bank)
922{ 915{
923 platform_set_drvdata(&omap_mpuio_device, bank); 916 platform_set_drvdata(&omap_mpuio_device, bank);
924 917
@@ -928,7 +921,7 @@ static inline void mpuio_init(struct gpio_bank *bank)
928 921
929/*---------------------------------------------------------------------*/ 922/*---------------------------------------------------------------------*/
930 923
931static int gpio_get_direction(struct gpio_chip *chip, unsigned offset) 924static int omap_gpio_get_direction(struct gpio_chip *chip, unsigned offset)
932{ 925{
933 struct gpio_bank *bank; 926 struct gpio_bank *bank;
934 unsigned long flags; 927 unsigned long flags;
@@ -943,19 +936,19 @@ static int gpio_get_direction(struct gpio_chip *chip, unsigned offset)
943 return dir; 936 return dir;
944} 937}
945 938
946static int gpio_input(struct gpio_chip *chip, unsigned offset) 939static int omap_gpio_input(struct gpio_chip *chip, unsigned offset)
947{ 940{
948 struct gpio_bank *bank; 941 struct gpio_bank *bank;
949 unsigned long flags; 942 unsigned long flags;
950 943
951 bank = container_of(chip, struct gpio_bank, chip); 944 bank = container_of(chip, struct gpio_bank, chip);
952 spin_lock_irqsave(&bank->lock, flags); 945 spin_lock_irqsave(&bank->lock, flags);
953 _set_gpio_direction(bank, offset, 1); 946 omap_set_gpio_direction(bank, offset, 1);
954 spin_unlock_irqrestore(&bank->lock, flags); 947 spin_unlock_irqrestore(&bank->lock, flags);
955 return 0; 948 return 0;
956} 949}
957 950
958static int gpio_get(struct gpio_chip *chip, unsigned offset) 951static int omap_gpio_get(struct gpio_chip *chip, unsigned offset)
959{ 952{
960 struct gpio_bank *bank; 953 struct gpio_bank *bank;
961 u32 mask; 954 u32 mask;
@@ -963,13 +956,13 @@ static int gpio_get(struct gpio_chip *chip, unsigned offset)
963 bank = container_of(chip, struct gpio_bank, chip); 956 bank = container_of(chip, struct gpio_bank, chip);
964 mask = (BIT(offset)); 957 mask = (BIT(offset));
965 958
966 if (gpio_is_input(bank, mask)) 959 if (omap_gpio_is_input(bank, mask))
967 return _get_gpio_datain(bank, offset); 960 return omap_get_gpio_datain(bank, offset);
968 else 961 else
969 return _get_gpio_dataout(bank, offset); 962 return omap_get_gpio_dataout(bank, offset);
970} 963}
971 964
972static int gpio_output(struct gpio_chip *chip, unsigned offset, int value) 965static int omap_gpio_output(struct gpio_chip *chip, unsigned offset, int value)
973{ 966{
974 struct gpio_bank *bank; 967 struct gpio_bank *bank;
975 unsigned long flags; 968 unsigned long flags;
@@ -977,13 +970,13 @@ static int gpio_output(struct gpio_chip *chip, unsigned offset, int value)
977 bank = container_of(chip, struct gpio_bank, chip); 970 bank = container_of(chip, struct gpio_bank, chip);
978 spin_lock_irqsave(&bank->lock, flags); 971 spin_lock_irqsave(&bank->lock, flags);
979 bank->set_dataout(bank, offset, value); 972 bank->set_dataout(bank, offset, value);
980 _set_gpio_direction(bank, offset, 0); 973 omap_set_gpio_direction(bank, offset, 0);
981 spin_unlock_irqrestore(&bank->lock, flags); 974 spin_unlock_irqrestore(&bank->lock, flags);
982 return 0; 975 return 0;
983} 976}
984 977
985static int gpio_debounce(struct gpio_chip *chip, unsigned offset, 978static int omap_gpio_debounce(struct gpio_chip *chip, unsigned offset,
986 unsigned debounce) 979 unsigned debounce)
987{ 980{
988 struct gpio_bank *bank; 981 struct gpio_bank *bank;
989 unsigned long flags; 982 unsigned long flags;
@@ -991,13 +984,13 @@ static int gpio_debounce(struct gpio_chip *chip, unsigned offset,
991 bank = container_of(chip, struct gpio_bank, chip); 984 bank = container_of(chip, struct gpio_bank, chip);
992 985
993 spin_lock_irqsave(&bank->lock, flags); 986 spin_lock_irqsave(&bank->lock, flags);
994 _set_gpio_debounce(bank, offset, debounce); 987 omap2_set_gpio_debounce(bank, offset, debounce);
995 spin_unlock_irqrestore(&bank->lock, flags); 988 spin_unlock_irqrestore(&bank->lock, flags);
996 989
997 return 0; 990 return 0;
998} 991}
999 992
1000static void gpio_set(struct gpio_chip *chip, unsigned offset, int value) 993static void omap_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
1001{ 994{
1002 struct gpio_bank *bank; 995 struct gpio_bank *bank;
1003 unsigned long flags; 996 unsigned long flags;
@@ -1025,11 +1018,6 @@ static void __init omap_gpio_show_rev(struct gpio_bank *bank)
1025 called = true; 1018 called = true;
1026} 1019}
1027 1020
1028/* This lock class tells lockdep that GPIO irqs are in a different
1029 * category than their parents, so it won't report false recursion.
1030 */
1031static struct lock_class_key gpio_lock_class;
1032
1033static void omap_gpio_mod_init(struct gpio_bank *bank) 1021static void omap_gpio_mod_init(struct gpio_bank *bank)
1034{ 1022{
1035 void __iomem *base = bank->base; 1023 void __iomem *base = bank->base;
@@ -1043,8 +1031,10 @@ static void omap_gpio_mod_init(struct gpio_bank *bank)
1043 return; 1031 return;
1044 } 1032 }
1045 1033
1046 _gpio_rmw(base, bank->regs->irqenable, l, bank->regs->irqenable_inv); 1034 omap_gpio_rmw(base, bank->regs->irqenable, l,
1047 _gpio_rmw(base, bank->regs->irqstatus, l, !bank->regs->irqenable_inv); 1035 bank->regs->irqenable_inv);
1036 omap_gpio_rmw(base, bank->regs->irqstatus, l,
1037 !bank->regs->irqenable_inv);
1048 if (bank->regs->debounce_en) 1038 if (bank->regs->debounce_en)
1049 writel_relaxed(0, base + bank->regs->debounce_en); 1039 writel_relaxed(0, base + bank->regs->debounce_en);
1050 1040
@@ -1078,17 +1068,17 @@ omap_mpuio_alloc_gc(struct gpio_bank *bank, unsigned int irq_start,
1078 /* NOTE: No ack required, reading IRQ status clears it. */ 1068 /* NOTE: No ack required, reading IRQ status clears it. */
1079 ct->chip.irq_mask = irq_gc_mask_set_bit; 1069 ct->chip.irq_mask = irq_gc_mask_set_bit;
1080 ct->chip.irq_unmask = irq_gc_mask_clr_bit; 1070 ct->chip.irq_unmask = irq_gc_mask_clr_bit;
1081 ct->chip.irq_set_type = gpio_irq_type; 1071 ct->chip.irq_set_type = omap_gpio_irq_type;
1082 1072
1083 if (bank->regs->wkup_en) 1073 if (bank->regs->wkup_en)
1084 ct->chip.irq_set_wake = gpio_wake_enable; 1074 ct->chip.irq_set_wake = omap_gpio_wake_enable;
1085 1075
1086 ct->regs.mask = OMAP_MPUIO_GPIO_INT / bank->stride; 1076 ct->regs.mask = OMAP_MPUIO_GPIO_INT / bank->stride;
1087 irq_setup_generic_chip(gc, IRQ_MSK(num), IRQ_GC_INIT_MASK_CACHE, 1077 irq_setup_generic_chip(gc, IRQ_MSK(num), IRQ_GC_INIT_MASK_CACHE,
1088 IRQ_NOREQUEST | IRQ_NOPROBE, 0); 1078 IRQ_NOREQUEST | IRQ_NOPROBE, 0);
1089} 1079}
1090 1080
1091static int omap_gpio_chip_init(struct gpio_bank *bank) 1081static int omap_gpio_chip_init(struct gpio_bank *bank, struct irq_chip *irqc)
1092{ 1082{
1093 int j; 1083 int j;
1094 static int gpio; 1084 static int gpio;
@@ -1101,12 +1091,12 @@ static int omap_gpio_chip_init(struct gpio_bank *bank)
1101 */ 1091 */
1102 bank->chip.request = omap_gpio_request; 1092 bank->chip.request = omap_gpio_request;
1103 bank->chip.free = omap_gpio_free; 1093 bank->chip.free = omap_gpio_free;
1104 bank->chip.get_direction = gpio_get_direction; 1094 bank->chip.get_direction = omap_gpio_get_direction;
1105 bank->chip.direction_input = gpio_input; 1095 bank->chip.direction_input = omap_gpio_input;
1106 bank->chip.get = gpio_get; 1096 bank->chip.get = omap_gpio_get;
1107 bank->chip.direction_output = gpio_output; 1097 bank->chip.direction_output = omap_gpio_output;
1108 bank->chip.set_debounce = gpio_debounce; 1098 bank->chip.set_debounce = omap_gpio_debounce;
1109 bank->chip.set = gpio_set; 1099 bank->chip.set = omap_gpio_set;
1110 if (bank->is_mpuio) { 1100 if (bank->is_mpuio) {
1111 bank->chip.label = "mpuio"; 1101 bank->chip.label = "mpuio";
1112 if (bank->regs->wkup_en) 1102 if (bank->regs->wkup_en)
@@ -1137,22 +1127,21 @@ static int omap_gpio_chip_init(struct gpio_bank *bank)
1137 } 1127 }
1138#endif 1128#endif
1139 1129
1140 ret = gpiochip_irqchip_add(&bank->chip, &gpio_irq_chip, 1130 ret = gpiochip_irqchip_add(&bank->chip, irqc,
1141 irq_base, gpio_irq_handler, 1131 irq_base, omap_gpio_irq_handler,
1142 IRQ_TYPE_NONE); 1132 IRQ_TYPE_NONE);
1143 1133
1144 if (ret) { 1134 if (ret) {
1145 dev_err(bank->dev, "Couldn't add irqchip to gpiochip %d\n", ret); 1135 dev_err(bank->dev, "Couldn't add irqchip to gpiochip %d\n", ret);
1146 ret = gpiochip_remove(&bank->chip); 1136 gpiochip_remove(&bank->chip);
1147 return -ENODEV; 1137 return -ENODEV;
1148 } 1138 }
1149 1139
1150 gpiochip_set_chained_irqchip(&bank->chip, &gpio_irq_chip, 1140 gpiochip_set_chained_irqchip(&bank->chip, irqc,
1151 bank->irq, gpio_irq_handler); 1141 bank->irq, omap_gpio_irq_handler);
1152 1142
1153 for (j = 0; j < bank->width; j++) { 1143 for (j = 0; j < bank->width; j++) {
1154 int irq = irq_find_mapping(bank->chip.irqdomain, j); 1144 int irq = irq_find_mapping(bank->chip.irqdomain, j);
1155 irq_set_lockdep_class(irq, &gpio_lock_class);
1156 if (bank->is_mpuio) { 1145 if (bank->is_mpuio) {
1157 omap_mpuio_alloc_gc(bank, irq, bank->width); 1146 omap_mpuio_alloc_gc(bank, irq, bank->width);
1158 irq_set_chip_and_handler(irq, NULL, NULL); 1147 irq_set_chip_and_handler(irq, NULL, NULL);
@@ -1173,6 +1162,7 @@ static int omap_gpio_probe(struct platform_device *pdev)
1173 const struct omap_gpio_platform_data *pdata; 1162 const struct omap_gpio_platform_data *pdata;
1174 struct resource *res; 1163 struct resource *res;
1175 struct gpio_bank *bank; 1164 struct gpio_bank *bank;
1165 struct irq_chip *irqc;
1176 int ret; 1166 int ret;
1177 1167
1178 match = of_match_device(of_match_ptr(omap_gpio_match), dev); 1168 match = of_match_device(of_match_ptr(omap_gpio_match), dev);
@@ -1187,6 +1177,18 @@ static int omap_gpio_probe(struct platform_device *pdev)
1187 return -ENOMEM; 1177 return -ENOMEM;
1188 } 1178 }
1189 1179
1180 irqc = devm_kzalloc(dev, sizeof(*irqc), GFP_KERNEL);
1181 if (!irqc)
1182 return -ENOMEM;
1183
1184 irqc->irq_shutdown = omap_gpio_irq_shutdown,
1185 irqc->irq_ack = omap_gpio_ack_irq,
1186 irqc->irq_mask = omap_gpio_mask_irq,
1187 irqc->irq_unmask = omap_gpio_unmask_irq,
1188 irqc->irq_set_type = omap_gpio_irq_type,
1189 irqc->irq_set_wake = omap_gpio_wake_enable,
1190 irqc->name = dev_name(&pdev->dev);
1191
1190 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); 1192 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1191 if (unlikely(!res)) { 1193 if (unlikely(!res)) {
1192 dev_err(dev, "Invalid IRQ resource\n"); 1194 dev_err(dev, "Invalid IRQ resource\n");
@@ -1217,9 +1219,9 @@ static int omap_gpio_probe(struct platform_device *pdev)
1217 } 1219 }
1218 1220
1219 if (bank->regs->set_dataout && bank->regs->clr_dataout) 1221 if (bank->regs->set_dataout && bank->regs->clr_dataout)
1220 bank->set_dataout = _set_gpio_dataout_reg; 1222 bank->set_dataout = omap_set_gpio_dataout_reg;
1221 else 1223 else
1222 bank->set_dataout = _set_gpio_dataout_mask; 1224 bank->set_dataout = omap_set_gpio_dataout_mask;
1223 1225
1224 spin_lock_init(&bank->lock); 1226 spin_lock_init(&bank->lock);
1225 1227
@@ -1238,11 +1240,11 @@ static int omap_gpio_probe(struct platform_device *pdev)
1238 pm_runtime_get_sync(bank->dev); 1240 pm_runtime_get_sync(bank->dev);
1239 1241
1240 if (bank->is_mpuio) 1242 if (bank->is_mpuio)
1241 mpuio_init(bank); 1243 omap_mpuio_init(bank);
1242 1244
1243 omap_gpio_mod_init(bank); 1245 omap_gpio_mod_init(bank);
1244 1246
1245 ret = omap_gpio_chip_init(bank); 1247 ret = omap_gpio_chip_init(bank, irqc);
1246 if (ret) 1248 if (ret)
1247 return ret; 1249 return ret;
1248 1250
@@ -1320,7 +1322,7 @@ update_gpio_context_count:
1320 bank->context_loss_count = 1322 bank->context_loss_count =
1321 bank->get_context_loss_count(bank->dev); 1323 bank->get_context_loss_count(bank->dev);
1322 1324
1323 _gpio_dbck_disable(bank); 1325 omap_gpio_dbck_disable(bank);
1324 spin_unlock_irqrestore(&bank->lock, flags); 1326 spin_unlock_irqrestore(&bank->lock, flags);
1325 1327
1326 return 0; 1328 return 0;
@@ -1351,7 +1353,7 @@ static int omap_gpio_runtime_resume(struct device *dev)
1351 bank->get_context_loss_count(bank->dev); 1353 bank->get_context_loss_count(bank->dev);
1352 } 1354 }
1353 1355
1354 _gpio_dbck_enable(bank); 1356 omap_gpio_dbck_enable(bank);
1355 1357
1356 /* 1358 /*
1357 * In ->runtime_suspend(), level-triggered, wakeup-enabled 1359 * In ->runtime_suspend(), level-triggered, wakeup-enabled
diff --git a/drivers/gpio/gpio-palmas.c b/drivers/gpio/gpio-palmas.c
index 86bdbe362068..171a6389f9ce 100644
--- a/drivers/gpio/gpio-palmas.c
+++ b/drivers/gpio/gpio-palmas.c
@@ -210,7 +210,8 @@ static int palmas_gpio_remove(struct platform_device *pdev)
210{ 210{
211 struct palmas_gpio *palmas_gpio = platform_get_drvdata(pdev); 211 struct palmas_gpio *palmas_gpio = platform_get_drvdata(pdev);
212 212
213 return gpiochip_remove(&palmas_gpio->gpio_chip); 213 gpiochip_remove(&palmas_gpio->gpio_chip);
214 return 0;
214} 215}
215 216
216static struct platform_driver palmas_gpio_driver = { 217static struct platform_driver palmas_gpio_driver = {
diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c
index e721a37c3473..e2da64abbccd 100644
--- a/drivers/gpio/gpio-pca953x.c
+++ b/drivers/gpio/gpio-pca953x.c
@@ -520,7 +520,7 @@ static int pca953x_irq_setup(struct pca953x_chip *chip,
520 struct i2c_client *client = chip->client; 520 struct i2c_client *client = chip->client;
521 int ret, i, offset = 0; 521 int ret, i, offset = 0;
522 522
523 if (irq_base != -1 523 if (client->irq && irq_base != -1
524 && (id->driver_data & PCA_INT)) { 524 && (id->driver_data & PCA_INT)) {
525 525
526 switch (chip->chip_type) { 526 switch (chip->chip_type) {
@@ -586,50 +586,6 @@ static int pca953x_irq_setup(struct pca953x_chip *chip,
586} 586}
587#endif 587#endif
588 588
589/*
590 * Handlers for alternative sources of platform_data
591 */
592#ifdef CONFIG_OF_GPIO
593/*
594 * Translate OpenFirmware node properties into platform_data
595 * WARNING: This is DEPRECATED and will be removed eventually!
596 */
597static void
598pca953x_get_alt_pdata(struct i2c_client *client, int *gpio_base, u32 *invert)
599{
600 struct device_node *node;
601 const __be32 *val;
602 int size;
603
604 *gpio_base = -1;
605
606 node = client->dev.of_node;
607 if (node == NULL)
608 return;
609
610 val = of_get_property(node, "linux,gpio-base", &size);
611 WARN(val, "%s: device-tree property 'linux,gpio-base' is deprecated!", __func__);
612 if (val) {
613 if (size != sizeof(*val))
614 dev_warn(&client->dev, "%s: wrong linux,gpio-base\n",
615 node->full_name);
616 else
617 *gpio_base = be32_to_cpup(val);
618 }
619
620 val = of_get_property(node, "polarity", NULL);
621 WARN(val, "%s: device-tree property 'polarity' is deprecated!", __func__);
622 if (val)
623 *invert = *val;
624}
625#else
626static void
627pca953x_get_alt_pdata(struct i2c_client *client, int *gpio_base, u32 *invert)
628{
629 *gpio_base = -1;
630}
631#endif
632
633static int device_pca953x_init(struct pca953x_chip *chip, u32 invert) 589static int device_pca953x_init(struct pca953x_chip *chip, u32 invert)
634{ 590{
635 int ret; 591 int ret;
@@ -704,12 +660,8 @@ static int pca953x_probe(struct i2c_client *client,
704 invert = pdata->invert; 660 invert = pdata->invert;
705 chip->names = pdata->names; 661 chip->names = pdata->names;
706 } else { 662 } else {
707 pca953x_get_alt_pdata(client, &chip->gpio_start, &invert); 663 chip->gpio_start = -1;
708#ifdef CONFIG_OF_GPIO 664 irq_base = 0;
709 /* If I2C node has no interrupts property, disable GPIO interrupts */
710 if (of_find_property(client->dev.of_node, "interrupts", NULL) == NULL)
711 irq_base = -1;
712#endif
713 } 665 }
714 666
715 chip->client = client; 667 chip->client = client;
@@ -765,12 +717,7 @@ static int pca953x_remove(struct i2c_client *client)
765 } 717 }
766 } 718 }
767 719
768 ret = gpiochip_remove(&chip->gpio_chip); 720 gpiochip_remove(&chip->gpio_chip);
769 if (ret) {
770 dev_err(&client->dev, "%s failed, %d\n",
771 "gpiochip_remove()", ret);
772 return ret;
773 }
774 721
775 return 0; 722 return 0;
776} 723}
diff --git a/drivers/gpio/gpio-pcf857x.c b/drivers/gpio/gpio-pcf857x.c
index 27b46751ea7e..236708ad0a5b 100644
--- a/drivers/gpio/gpio-pcf857x.c
+++ b/drivers/gpio/gpio-pcf857x.c
@@ -444,9 +444,7 @@ static int pcf857x_remove(struct i2c_client *client)
444 if (client->irq) 444 if (client->irq)
445 pcf857x_irq_domain_cleanup(gpio); 445 pcf857x_irq_domain_cleanup(gpio);
446 446
447 status = gpiochip_remove(&gpio->chip); 447 gpiochip_remove(&gpio->chip);
448 if (status)
449 dev_err(&client->dev, "%s --> %d\n", "remove", status);
450 return status; 448 return status;
451} 449}
452 450
diff --git a/drivers/gpio/gpio-pch.c b/drivers/gpio/gpio-pch.c
index d6eac9b17db9..2d9a950ca2d4 100644
--- a/drivers/gpio/gpio-pch.c
+++ b/drivers/gpio/gpio-pch.c
@@ -171,6 +171,7 @@ static int pch_gpio_direction_input(struct gpio_chip *gpio, unsigned nr)
171 return 0; 171 return 0;
172} 172}
173 173
174#ifdef CONFIG_PM
174/* 175/*
175 * Save register configuration and disable interrupts. 176 * Save register configuration and disable interrupts.
176 */ 177 */
@@ -206,6 +207,7 @@ static void pch_gpio_restore_reg_conf(struct pch_gpio *chip)
206 iowrite32(chip->pch_gpio_reg.gpio_use_sel_reg, 207 iowrite32(chip->pch_gpio_reg.gpio_use_sel_reg,
207 &chip->reg->gpio_use_sel); 208 &chip->reg->gpio_use_sel);
208} 209}
210#endif
209 211
210static int pch_gpio_to_irq(struct gpio_chip *gpio, unsigned offset) 212static int pch_gpio_to_irq(struct gpio_chip *gpio, unsigned offset)
211{ 213{
@@ -426,9 +428,7 @@ end:
426 428
427err_request_irq: 429err_request_irq:
428 irq_free_descs(irq_base, gpio_pins[chip->ioh]); 430 irq_free_descs(irq_base, gpio_pins[chip->ioh]);
429 431 gpiochip_remove(&chip->gpio);
430 if (gpiochip_remove(&chip->gpio))
431 dev_err(&pdev->dev, "%s gpiochip_remove failed\n", __func__);
432 432
433err_gpiochip_add: 433err_gpiochip_add:
434 pci_iounmap(pdev, chip->base); 434 pci_iounmap(pdev, chip->base);
@@ -447,7 +447,6 @@ err_pci_enable:
447 447
448static void pch_gpio_remove(struct pci_dev *pdev) 448static void pch_gpio_remove(struct pci_dev *pdev)
449{ 449{
450 int err;
451 struct pch_gpio *chip = pci_get_drvdata(pdev); 450 struct pch_gpio *chip = pci_get_drvdata(pdev);
452 451
453 if (chip->irq_base != -1) { 452 if (chip->irq_base != -1) {
@@ -456,10 +455,7 @@ static void pch_gpio_remove(struct pci_dev *pdev)
456 irq_free_descs(chip->irq_base, gpio_pins[chip->ioh]); 455 irq_free_descs(chip->irq_base, gpio_pins[chip->ioh]);
457 } 456 }
458 457
459 err = gpiochip_remove(&chip->gpio); 458 gpiochip_remove(&chip->gpio);
460 if (err)
461 dev_err(&pdev->dev, "Failed gpiochip_remove\n");
462
463 pci_iounmap(pdev, chip->base); 459 pci_iounmap(pdev, chip->base);
464 pci_release_regions(pdev); 460 pci_release_regions(pdev);
465 pci_disable_device(pdev); 461 pci_disable_device(pdev);
diff --git a/drivers/gpio/gpio-pxa.c b/drivers/gpio/gpio-pxa.c
index 42e6e64f2120..ad3feec0075e 100644
--- a/drivers/gpio/gpio-pxa.c
+++ b/drivers/gpio/gpio-pxa.c
@@ -498,7 +498,7 @@ static int pxa_gpio_nums(struct platform_device *pdev)
498} 498}
499 499
500#ifdef CONFIG_OF 500#ifdef CONFIG_OF
501static struct of_device_id pxa_gpio_dt_ids[] = { 501static const struct of_device_id pxa_gpio_dt_ids[] = {
502 { .compatible = "intel,pxa25x-gpio", .data = &pxa25x_id, }, 502 { .compatible = "intel,pxa25x-gpio", .data = &pxa25x_id, },
503 { .compatible = "intel,pxa26x-gpio", .data = &pxa26x_id, }, 503 { .compatible = "intel,pxa26x-gpio", .data = &pxa26x_id, },
504 { .compatible = "intel,pxa27x-gpio", .data = &pxa27x_id, }, 504 { .compatible = "intel,pxa27x-gpio", .data = &pxa27x_id, },
@@ -649,6 +649,11 @@ static int pxa_gpio_probe(struct platform_device *pdev)
649 handle_edge_irq); 649 handle_edge_irq);
650 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 650 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
651 } 651 }
652 } else {
653 if (irq0 > 0)
654 irq_set_chained_handler(irq0, pxa_gpio_demux_handler);
655 if (irq1 > 0)
656 irq_set_chained_handler(irq1, pxa_gpio_demux_handler);
652 } 657 }
653 658
654 irq_set_chained_handler(irq_mux, pxa_gpio_demux_handler); 659 irq_set_chained_handler(irq_mux, pxa_gpio_demux_handler);
diff --git a/drivers/gpio/gpio-rc5t583.c b/drivers/gpio/gpio-rc5t583.c
index 562b0c4d9cc8..769233d2da6d 100644
--- a/drivers/gpio/gpio-rc5t583.c
+++ b/drivers/gpio/gpio-rc5t583.c
@@ -148,7 +148,8 @@ static int rc5t583_gpio_remove(struct platform_device *pdev)
148{ 148{
149 struct rc5t583_gpio *rc5t583_gpio = platform_get_drvdata(pdev); 149 struct rc5t583_gpio *rc5t583_gpio = platform_get_drvdata(pdev);
150 150
151 return gpiochip_remove(&rc5t583_gpio->gpio_chip); 151 gpiochip_remove(&rc5t583_gpio->gpio_chip);
152 return 0;
152} 153}
153 154
154static struct platform_driver rc5t583_gpio_driver = { 155static struct platform_driver rc5t583_gpio_driver = {
diff --git a/drivers/gpio/gpio-rcar.c b/drivers/gpio/gpio-rcar.c
index b6ae89ea8811..bf6c09450fee 100644
--- a/drivers/gpio/gpio-rcar.c
+++ b/drivers/gpio/gpio-rcar.c
@@ -240,9 +240,9 @@ static int gpio_rcar_get(struct gpio_chip *chip, unsigned offset)
240 /* testing on r8a7790 shows that INDT does not show correct pin state 240 /* testing on r8a7790 shows that INDT does not show correct pin state
241 * when configured as output, so use OUTDT in case of output pins */ 241 * when configured as output, so use OUTDT in case of output pins */
242 if (gpio_rcar_read(gpio_to_priv(chip), INOUTSEL) & bit) 242 if (gpio_rcar_read(gpio_to_priv(chip), INOUTSEL) & bit)
243 return (int)(gpio_rcar_read(gpio_to_priv(chip), OUTDT) & bit); 243 return !!(gpio_rcar_read(gpio_to_priv(chip), OUTDT) & bit);
244 else 244 else
245 return (int)(gpio_rcar_read(gpio_to_priv(chip), INDT) & bit); 245 return !!(gpio_rcar_read(gpio_to_priv(chip), INDT) & bit);
246} 246}
247 247
248static void gpio_rcar_set(struct gpio_chip *chip, unsigned offset, int value) 248static void gpio_rcar_set(struct gpio_chip *chip, unsigned offset, int value)
@@ -472,11 +472,8 @@ err0:
472static int gpio_rcar_remove(struct platform_device *pdev) 472static int gpio_rcar_remove(struct platform_device *pdev)
473{ 473{
474 struct gpio_rcar_priv *p = platform_get_drvdata(pdev); 474 struct gpio_rcar_priv *p = platform_get_drvdata(pdev);
475 int ret;
476 475
477 ret = gpiochip_remove(&p->gpio_chip); 476 gpiochip_remove(&p->gpio_chip);
478 if (ret)
479 return ret;
480 477
481 irq_domain_remove(p->irq_domain); 478 irq_domain_remove(p->irq_domain);
482 pm_runtime_put(&pdev->dev); 479 pm_runtime_put(&pdev->dev);
diff --git a/drivers/gpio/gpio-rdc321x.c b/drivers/gpio/gpio-rdc321x.c
index 9fa7e53331c9..d729bc8a554d 100644
--- a/drivers/gpio/gpio-rdc321x.c
+++ b/drivers/gpio/gpio-rdc321x.c
@@ -199,14 +199,11 @@ static int rdc321x_gpio_probe(struct platform_device *pdev)
199 199
200static int rdc321x_gpio_remove(struct platform_device *pdev) 200static int rdc321x_gpio_remove(struct platform_device *pdev)
201{ 201{
202 int ret;
203 struct rdc321x_gpio *rdc321x_gpio_dev = platform_get_drvdata(pdev); 202 struct rdc321x_gpio *rdc321x_gpio_dev = platform_get_drvdata(pdev);
204 203
205 ret = gpiochip_remove(&rdc321x_gpio_dev->chip); 204 gpiochip_remove(&rdc321x_gpio_dev->chip);
206 if (ret)
207 dev_err(&pdev->dev, "failed to unregister chip\n");
208 205
209 return ret; 206 return 0;
210} 207}
211 208
212static struct platform_driver rdc321x_gpio_driver = { 209static struct platform_driver rdc321x_gpio_driver = {
diff --git a/drivers/gpio/gpio-samsung.c b/drivers/gpio/gpio-samsung.c
index 07105ee5c9ae..7c288ba4dc87 100644
--- a/drivers/gpio/gpio-samsung.c
+++ b/drivers/gpio/gpio-samsung.c
@@ -32,10 +32,7 @@
32 32
33#include <mach/map.h> 33#include <mach/map.h>
34#include <mach/regs-gpio.h> 34#include <mach/regs-gpio.h>
35
36#if defined(CONFIG_ARCH_S3C24XX) || defined(CONFIG_ARCH_S3C64XX)
37#include <mach/gpio-samsung.h> 35#include <mach/gpio-samsung.h>
38#endif
39 36
40#include <plat/cpu.h> 37#include <plat/cpu.h>
41#include <plat/gpio-core.h> 38#include <plat/gpio-core.h>
@@ -358,47 +355,6 @@ static unsigned s3c24xx_gpio_getcfg_abank(struct samsung_gpio_chip *chip,
358} 355}
359#endif 356#endif
360 357
361#if defined(CONFIG_CPU_S5P6440) || defined(CONFIG_CPU_S5P6450)
362static int s5p64x0_gpio_setcfg_rbank(struct samsung_gpio_chip *chip,
363 unsigned int off, unsigned int cfg)
364{
365 void __iomem *reg = chip->base;
366 unsigned int shift;
367 u32 con;
368
369 switch (off) {
370 case 0:
371 case 1:
372 case 2:
373 case 3:
374 case 4:
375 case 5:
376 shift = (off & 7) * 4;
377 reg -= 4;
378 break;
379 case 6:
380 shift = ((off + 1) & 7) * 4;
381 reg -= 4;
382 break;
383 default:
384 shift = ((off + 1) & 7) * 4;
385 break;
386 }
387
388 if (samsung_gpio_is_cfg_special(cfg)) {
389 cfg &= 0xf;
390 cfg <<= shift;
391 }
392
393 con = __raw_readl(reg);
394 con &= ~(0xf << shift);
395 con |= cfg;
396 __raw_writel(con, reg);
397
398 return 0;
399}
400#endif
401
402static void __init samsung_gpiolib_set_cfg(struct samsung_gpio_cfg *chipcfg, 358static void __init samsung_gpiolib_set_cfg(struct samsung_gpio_cfg *chipcfg,
403 int nr_chips) 359 int nr_chips)
404{ 360{
@@ -426,16 +382,6 @@ static struct samsung_gpio_cfg s3c24xx_gpiocfg_banka = {
426}; 382};
427#endif 383#endif
428 384
429#if defined(CONFIG_CPU_S5P6440) || defined(CONFIG_CPU_S5P6450)
430static struct samsung_gpio_cfg s5p64x0_gpio_cfg_rbank = {
431 .cfg_eint = 0x3,
432 .set_config = s5p64x0_gpio_setcfg_rbank,
433 .get_config = samsung_gpio_getcfg_4bit,
434 .set_pull = samsung_gpio_setpull_updown,
435 .get_pull = samsung_gpio_getpull_updown,
436};
437#endif
438
439static struct samsung_gpio_cfg samsung_gpio_cfgs[] = { 385static struct samsung_gpio_cfg samsung_gpio_cfgs[] = {
440 [0] = { 386 [0] = {
441 .cfg_eint = 0x0, 387 .cfg_eint = 0x0,
@@ -708,91 +654,6 @@ static int s3c24xx_gpiolib_banka_output(struct gpio_chip *chip,
708} 654}
709#endif 655#endif
710 656
711/* The next set of routines are for the case of s5p64x0 bank r */
712
713static int s5p64x0_gpiolib_rbank_input(struct gpio_chip *chip,
714 unsigned int offset)
715{
716 struct samsung_gpio_chip *ourchip = to_samsung_gpio(chip);
717 void __iomem *base = ourchip->base;
718 void __iomem *regcon = base;
719 unsigned long con;
720 unsigned long flags;
721
722 switch (offset) {
723 case 6:
724 offset += 1;
725 case 0:
726 case 1:
727 case 2:
728 case 3:
729 case 4:
730 case 5:
731 regcon -= 4;
732 break;
733 default:
734 offset -= 7;
735 break;
736 }
737
738 samsung_gpio_lock(ourchip, flags);
739
740 con = __raw_readl(regcon);
741 con &= ~(0xf << con_4bit_shift(offset));
742 __raw_writel(con, regcon);
743
744 samsung_gpio_unlock(ourchip, flags);
745
746 return 0;
747}
748
749static int s5p64x0_gpiolib_rbank_output(struct gpio_chip *chip,
750 unsigned int offset, int value)
751{
752 struct samsung_gpio_chip *ourchip = to_samsung_gpio(chip);
753 void __iomem *base = ourchip->base;
754 void __iomem *regcon = base;
755 unsigned long con;
756 unsigned long dat;
757 unsigned long flags;
758 unsigned con_offset = offset;
759
760 switch (con_offset) {
761 case 6:
762 con_offset += 1;
763 case 0:
764 case 1:
765 case 2:
766 case 3:
767 case 4:
768 case 5:
769 regcon -= 4;
770 break;
771 default:
772 con_offset -= 7;
773 break;
774 }
775
776 samsung_gpio_lock(ourchip, flags);
777
778 con = __raw_readl(regcon);
779 con &= ~(0xf << con_4bit_shift(con_offset));
780 con |= 0x1 << con_4bit_shift(con_offset);
781
782 dat = __raw_readl(base + GPIODAT_OFF);
783 if (value)
784 dat |= 1 << offset;
785 else
786 dat &= ~(1 << offset);
787
788 __raw_writel(con, regcon);
789 __raw_writel(dat, base + GPIODAT_OFF);
790
791 samsung_gpio_unlock(ourchip, flags);
792
793 return 0;
794}
795
796static void samsung_gpiolib_set(struct gpio_chip *chip, 657static void samsung_gpiolib_set(struct gpio_chip *chip,
797 unsigned offset, int value) 658 unsigned offset, int value)
798{ 659{
@@ -999,20 +860,6 @@ static void __init samsung_gpiolib_add_4bit2_chips(struct samsung_gpio_chip *chi
999 } 860 }
1000} 861}
1001 862
1002static void __init s5p64x0_gpiolib_add_rbank(struct samsung_gpio_chip *chip,
1003 int nr_chips)
1004{
1005 for (; nr_chips > 0; nr_chips--, chip++) {
1006 chip->chip.direction_input = s5p64x0_gpiolib_rbank_input;
1007 chip->chip.direction_output = s5p64x0_gpiolib_rbank_output;
1008
1009 if (!chip->pm)
1010 chip->pm = __gpio_pm(&samsung_gpio_pm_4bit);
1011
1012 samsung_gpiolib_add(chip);
1013 }
1014}
1015
1016int samsung_gpiolib_to_irq(struct gpio_chip *chip, unsigned int offset) 863int samsung_gpiolib_to_irq(struct gpio_chip *chip, unsigned int offset)
1017{ 864{
1018 struct samsung_gpio_chip *samsung_chip = container_of(chip, struct samsung_gpio_chip, chip); 865 struct samsung_gpio_chip *samsung_chip = container_of(chip, struct samsung_gpio_chip, chip);
@@ -1319,773 +1166,9 @@ static struct samsung_gpio_chip s3c64xx_gpios_2bit[] = {
1319#endif 1166#endif
1320}; 1167};
1321 1168
1322/*
1323 * S5P6440 GPIO bank summary:
1324 *
1325 * Bank GPIOs Style SlpCon ExtInt Group
1326 * A 6 4Bit Yes 1
1327 * B 7 4Bit Yes 1
1328 * C 8 4Bit Yes 2
1329 * F 2 2Bit Yes 4 [1]
1330 * G 7 4Bit Yes 5
1331 * H 10 4Bit[2] Yes 6
1332 * I 16 2Bit Yes None
1333 * J 12 2Bit Yes None
1334 * N 16 2Bit No IRQ_EINT
1335 * P 8 2Bit Yes 8
1336 * R 15 4Bit[2] Yes 8
1337 */
1338
1339static struct samsung_gpio_chip s5p6440_gpios_4bit[] = {
1340#ifdef CONFIG_CPU_S5P6440
1341 {
1342 .chip = {
1343 .base = S5P6440_GPA(0),
1344 .ngpio = S5P6440_GPIO_A_NR,
1345 .label = "GPA",
1346 },
1347 }, {
1348 .chip = {
1349 .base = S5P6440_GPB(0),
1350 .ngpio = S5P6440_GPIO_B_NR,
1351 .label = "GPB",
1352 },
1353 }, {
1354 .chip = {
1355 .base = S5P6440_GPC(0),
1356 .ngpio = S5P6440_GPIO_C_NR,
1357 .label = "GPC",
1358 },
1359 }, {
1360 .base = S5P64X0_GPG_BASE,
1361 .chip = {
1362 .base = S5P6440_GPG(0),
1363 .ngpio = S5P6440_GPIO_G_NR,
1364 .label = "GPG",
1365 },
1366 },
1367#endif
1368};
1369
1370static struct samsung_gpio_chip s5p6440_gpios_4bit2[] = {
1371#ifdef CONFIG_CPU_S5P6440
1372 {
1373 .base = S5P64X0_GPH_BASE + 0x4,
1374 .chip = {
1375 .base = S5P6440_GPH(0),
1376 .ngpio = S5P6440_GPIO_H_NR,
1377 .label = "GPH",
1378 },
1379 },
1380#endif
1381};
1382
1383static struct samsung_gpio_chip s5p6440_gpios_rbank[] = {
1384#ifdef CONFIG_CPU_S5P6440
1385 {
1386 .base = S5P64X0_GPR_BASE + 0x4,
1387 .config = &s5p64x0_gpio_cfg_rbank,
1388 .chip = {
1389 .base = S5P6440_GPR(0),
1390 .ngpio = S5P6440_GPIO_R_NR,
1391 .label = "GPR",
1392 },
1393 },
1394#endif
1395};
1396
1397static struct samsung_gpio_chip s5p6440_gpios_2bit[] = {
1398#ifdef CONFIG_CPU_S5P6440
1399 {
1400 .base = S5P64X0_GPF_BASE,
1401 .config = &samsung_gpio_cfgs[6],
1402 .chip = {
1403 .base = S5P6440_GPF(0),
1404 .ngpio = S5P6440_GPIO_F_NR,
1405 .label = "GPF",
1406 },
1407 }, {
1408 .base = S5P64X0_GPI_BASE,
1409 .config = &samsung_gpio_cfgs[4],
1410 .chip = {
1411 .base = S5P6440_GPI(0),
1412 .ngpio = S5P6440_GPIO_I_NR,
1413 .label = "GPI",
1414 },
1415 }, {
1416 .base = S5P64X0_GPJ_BASE,
1417 .config = &samsung_gpio_cfgs[4],
1418 .chip = {
1419 .base = S5P6440_GPJ(0),
1420 .ngpio = S5P6440_GPIO_J_NR,
1421 .label = "GPJ",
1422 },
1423 }, {
1424 .base = S5P64X0_GPN_BASE,
1425 .config = &samsung_gpio_cfgs[5],
1426 .chip = {
1427 .base = S5P6440_GPN(0),
1428 .ngpio = S5P6440_GPIO_N_NR,
1429 .label = "GPN",
1430 },
1431 }, {
1432 .base = S5P64X0_GPP_BASE,
1433 .config = &samsung_gpio_cfgs[6],
1434 .chip = {
1435 .base = S5P6440_GPP(0),
1436 .ngpio = S5P6440_GPIO_P_NR,
1437 .label = "GPP",
1438 },
1439 },
1440#endif
1441};
1442
1443/*
1444 * S5P6450 GPIO bank summary:
1445 *
1446 * Bank GPIOs Style SlpCon ExtInt Group
1447 * A 6 4Bit Yes 1
1448 * B 7 4Bit Yes 1
1449 * C 8 4Bit Yes 2
1450 * D 8 4Bit Yes None
1451 * F 2 2Bit Yes None
1452 * G 14 4Bit[2] Yes 5
1453 * H 10 4Bit[2] Yes 6
1454 * I 16 2Bit Yes None
1455 * J 12 2Bit Yes None
1456 * K 5 4Bit Yes None
1457 * N 16 2Bit No IRQ_EINT
1458 * P 11 2Bit Yes 8
1459 * Q 14 2Bit Yes None
1460 * R 15 4Bit[2] Yes None
1461 * S 8 2Bit Yes None
1462 *
1463 * [1] BANKF pins 14,15 do not form part of the external interrupt sources
1464 * [2] BANK has two control registers, GPxCON0 and GPxCON1
1465 */
1466
1467static struct samsung_gpio_chip s5p6450_gpios_4bit[] = {
1468#ifdef CONFIG_CPU_S5P6450
1469 {
1470 .chip = {
1471 .base = S5P6450_GPA(0),
1472 .ngpio = S5P6450_GPIO_A_NR,
1473 .label = "GPA",
1474 },
1475 }, {
1476 .chip = {
1477 .base = S5P6450_GPB(0),
1478 .ngpio = S5P6450_GPIO_B_NR,
1479 .label = "GPB",
1480 },
1481 }, {
1482 .chip = {
1483 .base = S5P6450_GPC(0),
1484 .ngpio = S5P6450_GPIO_C_NR,
1485 .label = "GPC",
1486 },
1487 }, {
1488 .chip = {
1489 .base = S5P6450_GPD(0),
1490 .ngpio = S5P6450_GPIO_D_NR,
1491 .label = "GPD",
1492 },
1493 }, {
1494 .base = S5P6450_GPK_BASE,
1495 .chip = {
1496 .base = S5P6450_GPK(0),
1497 .ngpio = S5P6450_GPIO_K_NR,
1498 .label = "GPK",
1499 },
1500 },
1501#endif
1502};
1503
1504static struct samsung_gpio_chip s5p6450_gpios_4bit2[] = {
1505#ifdef CONFIG_CPU_S5P6450
1506 {
1507 .base = S5P64X0_GPG_BASE + 0x4,
1508 .chip = {
1509 .base = S5P6450_GPG(0),
1510 .ngpio = S5P6450_GPIO_G_NR,
1511 .label = "GPG",
1512 },
1513 }, {
1514 .base = S5P64X0_GPH_BASE + 0x4,
1515 .chip = {
1516 .base = S5P6450_GPH(0),
1517 .ngpio = S5P6450_GPIO_H_NR,
1518 .label = "GPH",
1519 },
1520 },
1521#endif
1522};
1523
1524static struct samsung_gpio_chip s5p6450_gpios_rbank[] = {
1525#ifdef CONFIG_CPU_S5P6450
1526 {
1527 .base = S5P64X0_GPR_BASE + 0x4,
1528 .config = &s5p64x0_gpio_cfg_rbank,
1529 .chip = {
1530 .base = S5P6450_GPR(0),
1531 .ngpio = S5P6450_GPIO_R_NR,
1532 .label = "GPR",
1533 },
1534 },
1535#endif
1536};
1537
1538static struct samsung_gpio_chip s5p6450_gpios_2bit[] = {
1539#ifdef CONFIG_CPU_S5P6450
1540 {
1541 .base = S5P64X0_GPF_BASE,
1542 .config = &samsung_gpio_cfgs[6],
1543 .chip = {
1544 .base = S5P6450_GPF(0),
1545 .ngpio = S5P6450_GPIO_F_NR,
1546 .label = "GPF",
1547 },
1548 }, {
1549 .base = S5P64X0_GPI_BASE,
1550 .config = &samsung_gpio_cfgs[4],
1551 .chip = {
1552 .base = S5P6450_GPI(0),
1553 .ngpio = S5P6450_GPIO_I_NR,
1554 .label = "GPI",
1555 },
1556 }, {
1557 .base = S5P64X0_GPJ_BASE,
1558 .config = &samsung_gpio_cfgs[4],
1559 .chip = {
1560 .base = S5P6450_GPJ(0),
1561 .ngpio = S5P6450_GPIO_J_NR,
1562 .label = "GPJ",
1563 },
1564 }, {
1565 .base = S5P64X0_GPN_BASE,
1566 .config = &samsung_gpio_cfgs[5],
1567 .chip = {
1568 .base = S5P6450_GPN(0),
1569 .ngpio = S5P6450_GPIO_N_NR,
1570 .label = "GPN",
1571 },
1572 }, {
1573 .base = S5P64X0_GPP_BASE,
1574 .config = &samsung_gpio_cfgs[6],
1575 .chip = {
1576 .base = S5P6450_GPP(0),
1577 .ngpio = S5P6450_GPIO_P_NR,
1578 .label = "GPP",
1579 },
1580 }, {
1581 .base = S5P6450_GPQ_BASE,
1582 .config = &samsung_gpio_cfgs[5],
1583 .chip = {
1584 .base = S5P6450_GPQ(0),
1585 .ngpio = S5P6450_GPIO_Q_NR,
1586 .label = "GPQ",
1587 },
1588 }, {
1589 .base = S5P6450_GPS_BASE,
1590 .config = &samsung_gpio_cfgs[6],
1591 .chip = {
1592 .base = S5P6450_GPS(0),
1593 .ngpio = S5P6450_GPIO_S_NR,
1594 .label = "GPS",
1595 },
1596 },
1597#endif
1598};
1599
1600/*
1601 * S5PC100 GPIO bank summary:
1602 *
1603 * Bank GPIOs Style INT Type
1604 * A0 8 4Bit GPIO_INT0
1605 * A1 5 4Bit GPIO_INT1
1606 * B 8 4Bit GPIO_INT2
1607 * C 5 4Bit GPIO_INT3
1608 * D 7 4Bit GPIO_INT4
1609 * E0 8 4Bit GPIO_INT5
1610 * E1 6 4Bit GPIO_INT6
1611 * F0 8 4Bit GPIO_INT7
1612 * F1 8 4Bit GPIO_INT8
1613 * F2 8 4Bit GPIO_INT9
1614 * F3 4 4Bit GPIO_INT10
1615 * G0 8 4Bit GPIO_INT11
1616 * G1 3 4Bit GPIO_INT12
1617 * G2 7 4Bit GPIO_INT13
1618 * G3 7 4Bit GPIO_INT14
1619 * H0 8 4Bit WKUP_INT
1620 * H1 8 4Bit WKUP_INT
1621 * H2 8 4Bit WKUP_INT
1622 * H3 8 4Bit WKUP_INT
1623 * I 8 4Bit GPIO_INT15
1624 * J0 8 4Bit GPIO_INT16
1625 * J1 5 4Bit GPIO_INT17
1626 * J2 8 4Bit GPIO_INT18
1627 * J3 8 4Bit GPIO_INT19
1628 * J4 4 4Bit GPIO_INT20
1629 * K0 8 4Bit None
1630 * K1 6 4Bit None
1631 * K2 8 4Bit None
1632 * K3 8 4Bit None
1633 * L0 8 4Bit None
1634 * L1 8 4Bit None
1635 * L2 8 4Bit None
1636 * L3 8 4Bit None
1637 */
1638
1639static struct samsung_gpio_chip s5pc100_gpios_4bit[] = {
1640#ifdef CONFIG_CPU_S5PC100
1641 {
1642 .chip = {
1643 .base = S5PC100_GPA0(0),
1644 .ngpio = S5PC100_GPIO_A0_NR,
1645 .label = "GPA0",
1646 },
1647 }, {
1648 .chip = {
1649 .base = S5PC100_GPA1(0),
1650 .ngpio = S5PC100_GPIO_A1_NR,
1651 .label = "GPA1",
1652 },
1653 }, {
1654 .chip = {
1655 .base = S5PC100_GPB(0),
1656 .ngpio = S5PC100_GPIO_B_NR,
1657 .label = "GPB",
1658 },
1659 }, {
1660 .chip = {
1661 .base = S5PC100_GPC(0),
1662 .ngpio = S5PC100_GPIO_C_NR,
1663 .label = "GPC",
1664 },
1665 }, {
1666 .chip = {
1667 .base = S5PC100_GPD(0),
1668 .ngpio = S5PC100_GPIO_D_NR,
1669 .label = "GPD",
1670 },
1671 }, {
1672 .chip = {
1673 .base = S5PC100_GPE0(0),
1674 .ngpio = S5PC100_GPIO_E0_NR,
1675 .label = "GPE0",
1676 },
1677 }, {
1678 .chip = {
1679 .base = S5PC100_GPE1(0),
1680 .ngpio = S5PC100_GPIO_E1_NR,
1681 .label = "GPE1",
1682 },
1683 }, {
1684 .chip = {
1685 .base = S5PC100_GPF0(0),
1686 .ngpio = S5PC100_GPIO_F0_NR,
1687 .label = "GPF0",
1688 },
1689 }, {
1690 .chip = {
1691 .base = S5PC100_GPF1(0),
1692 .ngpio = S5PC100_GPIO_F1_NR,
1693 .label = "GPF1",
1694 },
1695 }, {
1696 .chip = {
1697 .base = S5PC100_GPF2(0),
1698 .ngpio = S5PC100_GPIO_F2_NR,
1699 .label = "GPF2",
1700 },
1701 }, {
1702 .chip = {
1703 .base = S5PC100_GPF3(0),
1704 .ngpio = S5PC100_GPIO_F3_NR,
1705 .label = "GPF3",
1706 },
1707 }, {
1708 .chip = {
1709 .base = S5PC100_GPG0(0),
1710 .ngpio = S5PC100_GPIO_G0_NR,
1711 .label = "GPG0",
1712 },
1713 }, {
1714 .chip = {
1715 .base = S5PC100_GPG1(0),
1716 .ngpio = S5PC100_GPIO_G1_NR,
1717 .label = "GPG1",
1718 },
1719 }, {
1720 .chip = {
1721 .base = S5PC100_GPG2(0),
1722 .ngpio = S5PC100_GPIO_G2_NR,
1723 .label = "GPG2",
1724 },
1725 }, {
1726 .chip = {
1727 .base = S5PC100_GPG3(0),
1728 .ngpio = S5PC100_GPIO_G3_NR,
1729 .label = "GPG3",
1730 },
1731 }, {
1732 .chip = {
1733 .base = S5PC100_GPI(0),
1734 .ngpio = S5PC100_GPIO_I_NR,
1735 .label = "GPI",
1736 },
1737 }, {
1738 .chip = {
1739 .base = S5PC100_GPJ0(0),
1740 .ngpio = S5PC100_GPIO_J0_NR,
1741 .label = "GPJ0",
1742 },
1743 }, {
1744 .chip = {
1745 .base = S5PC100_GPJ1(0),
1746 .ngpio = S5PC100_GPIO_J1_NR,
1747 .label = "GPJ1",
1748 },
1749 }, {
1750 .chip = {
1751 .base = S5PC100_GPJ2(0),
1752 .ngpio = S5PC100_GPIO_J2_NR,
1753 .label = "GPJ2",
1754 },
1755 }, {
1756 .chip = {
1757 .base = S5PC100_GPJ3(0),
1758 .ngpio = S5PC100_GPIO_J3_NR,
1759 .label = "GPJ3",
1760 },
1761 }, {
1762 .chip = {
1763 .base = S5PC100_GPJ4(0),
1764 .ngpio = S5PC100_GPIO_J4_NR,
1765 .label = "GPJ4",
1766 },
1767 }, {
1768 .chip = {
1769 .base = S5PC100_GPK0(0),
1770 .ngpio = S5PC100_GPIO_K0_NR,
1771 .label = "GPK0",
1772 },
1773 }, {
1774 .chip = {
1775 .base = S5PC100_GPK1(0),
1776 .ngpio = S5PC100_GPIO_K1_NR,
1777 .label = "GPK1",
1778 },
1779 }, {
1780 .chip = {
1781 .base = S5PC100_GPK2(0),
1782 .ngpio = S5PC100_GPIO_K2_NR,
1783 .label = "GPK2",
1784 },
1785 }, {
1786 .chip = {
1787 .base = S5PC100_GPK3(0),
1788 .ngpio = S5PC100_GPIO_K3_NR,
1789 .label = "GPK3",
1790 },
1791 }, {
1792 .chip = {
1793 .base = S5PC100_GPL0(0),
1794 .ngpio = S5PC100_GPIO_L0_NR,
1795 .label = "GPL0",
1796 },
1797 }, {
1798 .chip = {
1799 .base = S5PC100_GPL1(0),
1800 .ngpio = S5PC100_GPIO_L1_NR,
1801 .label = "GPL1",
1802 },
1803 }, {
1804 .chip = {
1805 .base = S5PC100_GPL2(0),
1806 .ngpio = S5PC100_GPIO_L2_NR,
1807 .label = "GPL2",
1808 },
1809 }, {
1810 .chip = {
1811 .base = S5PC100_GPL3(0),
1812 .ngpio = S5PC100_GPIO_L3_NR,
1813 .label = "GPL3",
1814 },
1815 }, {
1816 .chip = {
1817 .base = S5PC100_GPL4(0),
1818 .ngpio = S5PC100_GPIO_L4_NR,
1819 .label = "GPL4",
1820 },
1821 }, {
1822 .base = (S5P_VA_GPIO + 0xC00),
1823 .irq_base = IRQ_EINT(0),
1824 .chip = {
1825 .base = S5PC100_GPH0(0),
1826 .ngpio = S5PC100_GPIO_H0_NR,
1827 .label = "GPH0",
1828 .to_irq = samsung_gpiolib_to_irq,
1829 },
1830 }, {
1831 .base = (S5P_VA_GPIO + 0xC20),
1832 .irq_base = IRQ_EINT(8),
1833 .chip = {
1834 .base = S5PC100_GPH1(0),
1835 .ngpio = S5PC100_GPIO_H1_NR,
1836 .label = "GPH1",
1837 .to_irq = samsung_gpiolib_to_irq,
1838 },
1839 }, {
1840 .base = (S5P_VA_GPIO + 0xC40),
1841 .irq_base = IRQ_EINT(16),
1842 .chip = {
1843 .base = S5PC100_GPH2(0),
1844 .ngpio = S5PC100_GPIO_H2_NR,
1845 .label = "GPH2",
1846 .to_irq = samsung_gpiolib_to_irq,
1847 },
1848 }, {
1849 .base = (S5P_VA_GPIO + 0xC60),
1850 .irq_base = IRQ_EINT(24),
1851 .chip = {
1852 .base = S5PC100_GPH3(0),
1853 .ngpio = S5PC100_GPIO_H3_NR,
1854 .label = "GPH3",
1855 .to_irq = samsung_gpiolib_to_irq,
1856 },
1857 },
1858#endif
1859};
1860
1861/*
1862 * Followings are the gpio banks in S5PV210/S5PC110
1863 *
1864 * The 'config' member when left to NULL, is initialized to the default
1865 * structure samsung_gpio_cfgs[3] in the init function below.
1866 *
1867 * The 'base' member is also initialized in the init function below.
1868 * Note: The initialization of 'base' member of samsung_gpio_chip structure
1869 * uses the above macro and depends on the banks being listed in order here.
1870 */
1871
1872static struct samsung_gpio_chip s5pv210_gpios_4bit[] = {
1873#ifdef CONFIG_CPU_S5PV210
1874 {
1875 .chip = {
1876 .base = S5PV210_GPA0(0),
1877 .ngpio = S5PV210_GPIO_A0_NR,
1878 .label = "GPA0",
1879 },
1880 }, {
1881 .chip = {
1882 .base = S5PV210_GPA1(0),
1883 .ngpio = S5PV210_GPIO_A1_NR,
1884 .label = "GPA1",
1885 },
1886 }, {
1887 .chip = {
1888 .base = S5PV210_GPB(0),
1889 .ngpio = S5PV210_GPIO_B_NR,
1890 .label = "GPB",
1891 },
1892 }, {
1893 .chip = {
1894 .base = S5PV210_GPC0(0),
1895 .ngpio = S5PV210_GPIO_C0_NR,
1896 .label = "GPC0",
1897 },
1898 }, {
1899 .chip = {
1900 .base = S5PV210_GPC1(0),
1901 .ngpio = S5PV210_GPIO_C1_NR,
1902 .label = "GPC1",
1903 },
1904 }, {
1905 .chip = {
1906 .base = S5PV210_GPD0(0),
1907 .ngpio = S5PV210_GPIO_D0_NR,
1908 .label = "GPD0",
1909 },
1910 }, {
1911 .chip = {
1912 .base = S5PV210_GPD1(0),
1913 .ngpio = S5PV210_GPIO_D1_NR,
1914 .label = "GPD1",
1915 },
1916 }, {
1917 .chip = {
1918 .base = S5PV210_GPE0(0),
1919 .ngpio = S5PV210_GPIO_E0_NR,
1920 .label = "GPE0",
1921 },
1922 }, {
1923 .chip = {
1924 .base = S5PV210_GPE1(0),
1925 .ngpio = S5PV210_GPIO_E1_NR,
1926 .label = "GPE1",
1927 },
1928 }, {
1929 .chip = {
1930 .base = S5PV210_GPF0(0),
1931 .ngpio = S5PV210_GPIO_F0_NR,
1932 .label = "GPF0",
1933 },
1934 }, {
1935 .chip = {
1936 .base = S5PV210_GPF1(0),
1937 .ngpio = S5PV210_GPIO_F1_NR,
1938 .label = "GPF1",
1939 },
1940 }, {
1941 .chip = {
1942 .base = S5PV210_GPF2(0),
1943 .ngpio = S5PV210_GPIO_F2_NR,
1944 .label = "GPF2",
1945 },
1946 }, {
1947 .chip = {
1948 .base = S5PV210_GPF3(0),
1949 .ngpio = S5PV210_GPIO_F3_NR,
1950 .label = "GPF3",
1951 },
1952 }, {
1953 .chip = {
1954 .base = S5PV210_GPG0(0),
1955 .ngpio = S5PV210_GPIO_G0_NR,
1956 .label = "GPG0",
1957 },
1958 }, {
1959 .chip = {
1960 .base = S5PV210_GPG1(0),
1961 .ngpio = S5PV210_GPIO_G1_NR,
1962 .label = "GPG1",
1963 },
1964 }, {
1965 .chip = {
1966 .base = S5PV210_GPG2(0),
1967 .ngpio = S5PV210_GPIO_G2_NR,
1968 .label = "GPG2",
1969 },
1970 }, {
1971 .chip = {
1972 .base = S5PV210_GPG3(0),
1973 .ngpio = S5PV210_GPIO_G3_NR,
1974 .label = "GPG3",
1975 },
1976 }, {
1977 .chip = {
1978 .base = S5PV210_GPI(0),
1979 .ngpio = S5PV210_GPIO_I_NR,
1980 .label = "GPI",
1981 },
1982 }, {
1983 .chip = {
1984 .base = S5PV210_GPJ0(0),
1985 .ngpio = S5PV210_GPIO_J0_NR,
1986 .label = "GPJ0",
1987 },
1988 }, {
1989 .chip = {
1990 .base = S5PV210_GPJ1(0),
1991 .ngpio = S5PV210_GPIO_J1_NR,
1992 .label = "GPJ1",
1993 },
1994 }, {
1995 .chip = {
1996 .base = S5PV210_GPJ2(0),
1997 .ngpio = S5PV210_GPIO_J2_NR,
1998 .label = "GPJ2",
1999 },
2000 }, {
2001 .chip = {
2002 .base = S5PV210_GPJ3(0),
2003 .ngpio = S5PV210_GPIO_J3_NR,
2004 .label = "GPJ3",
2005 },
2006 }, {
2007 .chip = {
2008 .base = S5PV210_GPJ4(0),
2009 .ngpio = S5PV210_GPIO_J4_NR,
2010 .label = "GPJ4",
2011 },
2012 }, {
2013 .chip = {
2014 .base = S5PV210_MP01(0),
2015 .ngpio = S5PV210_GPIO_MP01_NR,
2016 .label = "MP01",
2017 },
2018 }, {
2019 .chip = {
2020 .base = S5PV210_MP02(0),
2021 .ngpio = S5PV210_GPIO_MP02_NR,
2022 .label = "MP02",
2023 },
2024 }, {
2025 .chip = {
2026 .base = S5PV210_MP03(0),
2027 .ngpio = S5PV210_GPIO_MP03_NR,
2028 .label = "MP03",
2029 },
2030 }, {
2031 .chip = {
2032 .base = S5PV210_MP04(0),
2033 .ngpio = S5PV210_GPIO_MP04_NR,
2034 .label = "MP04",
2035 },
2036 }, {
2037 .chip = {
2038 .base = S5PV210_MP05(0),
2039 .ngpio = S5PV210_GPIO_MP05_NR,
2040 .label = "MP05",
2041 },
2042 }, {
2043 .base = (S5P_VA_GPIO + 0xC00),
2044 .irq_base = IRQ_EINT(0),
2045 .chip = {
2046 .base = S5PV210_GPH0(0),
2047 .ngpio = S5PV210_GPIO_H0_NR,
2048 .label = "GPH0",
2049 .to_irq = samsung_gpiolib_to_irq,
2050 },
2051 }, {
2052 .base = (S5P_VA_GPIO + 0xC20),
2053 .irq_base = IRQ_EINT(8),
2054 .chip = {
2055 .base = S5PV210_GPH1(0),
2056 .ngpio = S5PV210_GPIO_H1_NR,
2057 .label = "GPH1",
2058 .to_irq = samsung_gpiolib_to_irq,
2059 },
2060 }, {
2061 .base = (S5P_VA_GPIO + 0xC40),
2062 .irq_base = IRQ_EINT(16),
2063 .chip = {
2064 .base = S5PV210_GPH2(0),
2065 .ngpio = S5PV210_GPIO_H2_NR,
2066 .label = "GPH2",
2067 .to_irq = samsung_gpiolib_to_irq,
2068 },
2069 }, {
2070 .base = (S5P_VA_GPIO + 0xC60),
2071 .irq_base = IRQ_EINT(24),
2072 .chip = {
2073 .base = S5PV210_GPH3(0),
2074 .ngpio = S5PV210_GPIO_H3_NR,
2075 .label = "GPH3",
2076 .to_irq = samsung_gpiolib_to_irq,
2077 },
2078 },
2079#endif
2080};
2081
2082/* TODO: cleanup soc_is_* */ 1169/* TODO: cleanup soc_is_* */
2083static __init int samsung_gpiolib_init(void) 1170static __init int samsung_gpiolib_init(void)
2084{ 1171{
2085 struct samsung_gpio_chip *chip;
2086 int i, nr_chips;
2087 int group = 0;
2088
2089 /* 1172 /*
2090 * Currently there are two drivers that can provide GPIO support for 1173 * Currently there are two drivers that can provide GPIO support for
2091 * Samsung SoCs. For device tree enabled platforms, the new 1174 * Samsung SoCs. For device tree enabled platforms, the new
@@ -2109,54 +1192,6 @@ static __init int samsung_gpiolib_init(void)
2109 S3C64XX_VA_GPIO); 1192 S3C64XX_VA_GPIO);
2110 samsung_gpiolib_add_4bit2_chips(s3c64xx_gpios_4bit2, 1193 samsung_gpiolib_add_4bit2_chips(s3c64xx_gpios_4bit2,
2111 ARRAY_SIZE(s3c64xx_gpios_4bit2)); 1194 ARRAY_SIZE(s3c64xx_gpios_4bit2));
2112 } else if (soc_is_s5p6440()) {
2113 samsung_gpiolib_add_2bit_chips(s5p6440_gpios_2bit,
2114 ARRAY_SIZE(s5p6440_gpios_2bit), NULL, 0x0);
2115 samsung_gpiolib_add_4bit_chips(s5p6440_gpios_4bit,
2116 ARRAY_SIZE(s5p6440_gpios_4bit), S5P_VA_GPIO);
2117 samsung_gpiolib_add_4bit2_chips(s5p6440_gpios_4bit2,
2118 ARRAY_SIZE(s5p6440_gpios_4bit2));
2119 s5p64x0_gpiolib_add_rbank(s5p6440_gpios_rbank,
2120 ARRAY_SIZE(s5p6440_gpios_rbank));
2121 } else if (soc_is_s5p6450()) {
2122 samsung_gpiolib_add_2bit_chips(s5p6450_gpios_2bit,
2123 ARRAY_SIZE(s5p6450_gpios_2bit), NULL, 0x0);
2124 samsung_gpiolib_add_4bit_chips(s5p6450_gpios_4bit,
2125 ARRAY_SIZE(s5p6450_gpios_4bit), S5P_VA_GPIO);
2126 samsung_gpiolib_add_4bit2_chips(s5p6450_gpios_4bit2,
2127 ARRAY_SIZE(s5p6450_gpios_4bit2));
2128 s5p64x0_gpiolib_add_rbank(s5p6450_gpios_rbank,
2129 ARRAY_SIZE(s5p6450_gpios_rbank));
2130 } else if (soc_is_s5pc100()) {
2131 group = 0;
2132 chip = s5pc100_gpios_4bit;
2133 nr_chips = ARRAY_SIZE(s5pc100_gpios_4bit);
2134
2135 for (i = 0; i < nr_chips; i++, chip++) {
2136 if (!chip->config) {
2137 chip->config = &samsung_gpio_cfgs[3];
2138 chip->group = group++;
2139 }
2140 }
2141 samsung_gpiolib_add_4bit_chips(s5pc100_gpios_4bit, nr_chips, S5P_VA_GPIO);
2142#if defined(CONFIG_CPU_S5PC100) && defined(CONFIG_S5P_GPIO_INT)
2143 s5p_register_gpioint_bank(IRQ_GPIOINT, 0, S5P_GPIOINT_GROUP_MAXNR);
2144#endif
2145 } else if (soc_is_s5pv210()) {
2146 group = 0;
2147 chip = s5pv210_gpios_4bit;
2148 nr_chips = ARRAY_SIZE(s5pv210_gpios_4bit);
2149
2150 for (i = 0; i < nr_chips; i++, chip++) {
2151 if (!chip->config) {
2152 chip->config = &samsung_gpio_cfgs[3];
2153 chip->group = group++;
2154 }
2155 }
2156 samsung_gpiolib_add_4bit_chips(s5pv210_gpios_4bit, nr_chips, S5P_VA_GPIO);
2157#if defined(CONFIG_CPU_S5PV210) && defined(CONFIG_S5P_GPIO_INT)
2158 s5p_register_gpioint_bank(IRQ_GPIOINT, 0, S5P_GPIOINT_GROUP_MAXNR);
2159#endif
2160 } else { 1195 } else {
2161 WARN(1, "Unknown SoC in gpio-samsung, no GPIOs added\n"); 1196 WARN(1, "Unknown SoC in gpio-samsung, no GPIOs added\n");
2162 return -ENODEV; 1197 return -ENODEV;
@@ -2274,56 +1309,6 @@ samsung_gpio_pull_t s3c_gpio_getpull(unsigned int pin)
2274} 1309}
2275EXPORT_SYMBOL(s3c_gpio_getpull); 1310EXPORT_SYMBOL(s3c_gpio_getpull);
2276 1311
2277#ifdef CONFIG_S5P_GPIO_DRVSTR
2278s5p_gpio_drvstr_t s5p_gpio_get_drvstr(unsigned int pin)
2279{
2280 struct samsung_gpio_chip *chip = samsung_gpiolib_getchip(pin);
2281 unsigned int off;
2282 void __iomem *reg;
2283 int shift;
2284 u32 drvstr;
2285
2286 if (!chip)
2287 return -EINVAL;
2288
2289 off = pin - chip->chip.base;
2290 shift = off * 2;
2291 reg = chip->base + 0x0C;
2292
2293 drvstr = __raw_readl(reg);
2294 drvstr = drvstr >> shift;
2295 drvstr &= 0x3;
2296
2297 return (__force s5p_gpio_drvstr_t)drvstr;
2298}
2299EXPORT_SYMBOL(s5p_gpio_get_drvstr);
2300
2301int s5p_gpio_set_drvstr(unsigned int pin, s5p_gpio_drvstr_t drvstr)
2302{
2303 struct samsung_gpio_chip *chip = samsung_gpiolib_getchip(pin);
2304 unsigned int off;
2305 void __iomem *reg;
2306 int shift;
2307 u32 tmp;
2308
2309 if (!chip)
2310 return -EINVAL;
2311
2312 off = pin - chip->chip.base;
2313 shift = off * 2;
2314 reg = chip->base + 0x0C;
2315
2316 tmp = __raw_readl(reg);
2317 tmp &= ~(0x3 << shift);
2318 tmp |= drvstr << shift;
2319
2320 __raw_writel(tmp, reg);
2321
2322 return 0;
2323}
2324EXPORT_SYMBOL(s5p_gpio_set_drvstr);
2325#endif /* CONFIG_S5P_GPIO_DRVSTR */
2326
2327#ifdef CONFIG_PLAT_S3C24XX 1312#ifdef CONFIG_PLAT_S3C24XX
2328unsigned int s3c2410_modify_misccr(unsigned int clear, unsigned int change) 1313unsigned int s3c2410_modify_misccr(unsigned int clear, unsigned int change)
2329{ 1314{
diff --git a/drivers/gpio/gpio-sch.c b/drivers/gpio/gpio-sch.c
index a9b1cd16c848..41e91d70301e 100644
--- a/drivers/gpio/gpio-sch.c
+++ b/drivers/gpio/gpio-sch.c
@@ -290,8 +290,7 @@ static int sch_gpio_probe(struct platform_device *pdev)
290 return 0; 290 return 0;
291 291
292err_sch_gpio_resume: 292err_sch_gpio_resume:
293 if (gpiochip_remove(&sch_gpio_core)) 293 gpiochip_remove(&sch_gpio_core);
294 dev_err(&pdev->dev, "%s gpiochip_remove failed\n", __func__);
295 294
296err_sch_gpio_core: 295err_sch_gpio_core:
297 release_region(res->start, resource_size(res)); 296 release_region(res->start, resource_size(res));
@@ -304,23 +303,14 @@ static int sch_gpio_remove(struct platform_device *pdev)
304{ 303{
305 struct resource *res; 304 struct resource *res;
306 if (gpio_ba) { 305 if (gpio_ba) {
307 int err;
308 306
309 err = gpiochip_remove(&sch_gpio_core); 307 gpiochip_remove(&sch_gpio_core);
310 if (err) 308 gpiochip_remove(&sch_gpio_resume);
311 dev_err(&pdev->dev, "%s failed, %d\n",
312 "gpiochip_remove()", err);
313 err = gpiochip_remove(&sch_gpio_resume);
314 if (err)
315 dev_err(&pdev->dev, "%s failed, %d\n",
316 "gpiochip_remove()", err);
317 309
318 res = platform_get_resource(pdev, IORESOURCE_IO, 0); 310 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
319 311
320 release_region(res->start, resource_size(res)); 312 release_region(res->start, resource_size(res));
321 gpio_ba = 0; 313 gpio_ba = 0;
322
323 return err;
324 } 314 }
325 315
326 return 0; 316 return 0;
diff --git a/drivers/gpio/gpio-sch311x.c b/drivers/gpio/gpio-sch311x.c
index f942b80ee403..0cb11413e814 100644
--- a/drivers/gpio/gpio-sch311x.c
+++ b/drivers/gpio/gpio-sch311x.c
@@ -291,14 +291,12 @@ static int sch311x_gpio_remove(struct platform_device *pdev)
291{ 291{
292 struct sch311x_pdev_data *pdata = pdev->dev.platform_data; 292 struct sch311x_pdev_data *pdata = pdev->dev.platform_data;
293 struct sch311x_gpio_priv *priv = platform_get_drvdata(pdev); 293 struct sch311x_gpio_priv *priv = platform_get_drvdata(pdev);
294 int err, i; 294 int i;
295 295
296 release_region(pdata->runtime_reg + GP1, 6); 296 release_region(pdata->runtime_reg + GP1, 6);
297 297
298 for (i = 0; i < ARRAY_SIZE(priv->blocks); i++) { 298 for (i = 0; i < ARRAY_SIZE(priv->blocks); i++) {
299 err = gpiochip_remove(&priv->blocks[i].chip); 299 gpiochip_remove(&priv->blocks[i].chip);
300 if (err)
301 return err;
302 dev_info(&pdev->dev, 300 dev_info(&pdev->dev,
303 "SMSC SCH311x GPIO block %d unregistered.\n", i); 301 "SMSC SCH311x GPIO block %d unregistered.\n", i);
304 } 302 }
diff --git a/drivers/gpio/gpio-sodaville.c b/drivers/gpio/gpio-sodaville.c
index 7c6c518929bc..d8da36cd8123 100644
--- a/drivers/gpio/gpio-sodaville.c
+++ b/drivers/gpio/gpio-sodaville.c
@@ -265,9 +265,7 @@ static void sdv_gpio_remove(struct pci_dev *pdev)
265 free_irq(pdev->irq, sd); 265 free_irq(pdev->irq, sd);
266 irq_free_descs(sd->irq_base, SDV_NUM_PUB_GPIOS); 266 irq_free_descs(sd->irq_base, SDV_NUM_PUB_GPIOS);
267 267
268 if (gpiochip_remove(&sd->bgpio.gc)) 268 gpiochip_remove(&sd->bgpio.gc);
269 dev_err(&pdev->dev, "gpiochip_remove() failed.\n");
270
271 pci_release_region(pdev, GPIO_BAR); 269 pci_release_region(pdev, GPIO_BAR);
272 iounmap(sd->gpio_pub_base); 270 iounmap(sd->gpio_pub_base);
273 pci_disable_device(pdev); 271 pci_disable_device(pdev);
diff --git a/drivers/gpio/gpio-stmpe.c b/drivers/gpio/gpio-stmpe.c
index 628b58494294..85c5b1974294 100644
--- a/drivers/gpio/gpio-stmpe.c
+++ b/drivers/gpio/gpio-stmpe.c
@@ -10,11 +10,10 @@
10#include <linux/platform_device.h> 10#include <linux/platform_device.h>
11#include <linux/slab.h> 11#include <linux/slab.h>
12#include <linux/gpio.h> 12#include <linux/gpio.h>
13#include <linux/irq.h>
14#include <linux/irqdomain.h>
15#include <linux/interrupt.h> 13#include <linux/interrupt.h>
16#include <linux/of.h> 14#include <linux/of.h>
17#include <linux/mfd/stmpe.h> 15#include <linux/mfd/stmpe.h>
16#include <linux/seq_file.h>
18 17
19/* 18/*
20 * These registers are modified under the irq bus lock and cached to avoid 19 * These registers are modified under the irq bus lock and cached to avoid
@@ -31,9 +30,7 @@ struct stmpe_gpio {
31 struct stmpe *stmpe; 30 struct stmpe *stmpe;
32 struct device *dev; 31 struct device *dev;
33 struct mutex irq_lock; 32 struct mutex irq_lock;
34 struct irq_domain *domain;
35 unsigned norequest_mask; 33 unsigned norequest_mask;
36
37 /* Caches of interrupt control registers for bus_lock */ 34 /* Caches of interrupt control registers for bus_lock */
38 u8 regs[CACHE_NR_REGS][CACHE_NR_BANKS]; 35 u8 regs[CACHE_NR_REGS][CACHE_NR_BANKS];
39 u8 oldregs[CACHE_NR_REGS][CACHE_NR_BANKS]; 36 u8 oldregs[CACHE_NR_REGS][CACHE_NR_BANKS];
@@ -101,13 +98,6 @@ static int stmpe_gpio_direction_input(struct gpio_chip *chip,
101 return stmpe_set_bits(stmpe, reg, mask, 0); 98 return stmpe_set_bits(stmpe, reg, mask, 0);
102} 99}
103 100
104static int stmpe_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
105{
106 struct stmpe_gpio *stmpe_gpio = to_stmpe_gpio(chip);
107
108 return irq_create_mapping(stmpe_gpio->domain, offset);
109}
110
111static int stmpe_gpio_request(struct gpio_chip *chip, unsigned offset) 101static int stmpe_gpio_request(struct gpio_chip *chip, unsigned offset)
112{ 102{
113 struct stmpe_gpio *stmpe_gpio = to_stmpe_gpio(chip); 103 struct stmpe_gpio *stmpe_gpio = to_stmpe_gpio(chip);
@@ -126,31 +116,31 @@ static struct gpio_chip template_chip = {
126 .get = stmpe_gpio_get, 116 .get = stmpe_gpio_get,
127 .direction_output = stmpe_gpio_direction_output, 117 .direction_output = stmpe_gpio_direction_output,
128 .set = stmpe_gpio_set, 118 .set = stmpe_gpio_set,
129 .to_irq = stmpe_gpio_to_irq,
130 .request = stmpe_gpio_request, 119 .request = stmpe_gpio_request,
131 .can_sleep = true, 120 .can_sleep = true,
132}; 121};
133 122
134static int stmpe_gpio_irq_set_type(struct irq_data *d, unsigned int type) 123static int stmpe_gpio_irq_set_type(struct irq_data *d, unsigned int type)
135{ 124{
136 struct stmpe_gpio *stmpe_gpio = irq_data_get_irq_chip_data(d); 125 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
126 struct stmpe_gpio *stmpe_gpio = to_stmpe_gpio(gc);
137 int offset = d->hwirq; 127 int offset = d->hwirq;
138 int regoffset = offset / 8; 128 int regoffset = offset / 8;
139 int mask = 1 << (offset % 8); 129 int mask = 1 << (offset % 8);
140 130
141 if (type == IRQ_TYPE_LEVEL_LOW || type == IRQ_TYPE_LEVEL_HIGH) 131 if (type & IRQ_TYPE_LEVEL_LOW || type & IRQ_TYPE_LEVEL_HIGH)
142 return -EINVAL; 132 return -EINVAL;
143 133
144 /* STMPE801 doesn't have RE and FE registers */ 134 /* STMPE801 doesn't have RE and FE registers */
145 if (stmpe_gpio->stmpe->partnum == STMPE801) 135 if (stmpe_gpio->stmpe->partnum == STMPE801)
146 return 0; 136 return 0;
147 137
148 if (type == IRQ_TYPE_EDGE_RISING) 138 if (type & IRQ_TYPE_EDGE_RISING)
149 stmpe_gpio->regs[REG_RE][regoffset] |= mask; 139 stmpe_gpio->regs[REG_RE][regoffset] |= mask;
150 else 140 else
151 stmpe_gpio->regs[REG_RE][regoffset] &= ~mask; 141 stmpe_gpio->regs[REG_RE][regoffset] &= ~mask;
152 142
153 if (type == IRQ_TYPE_EDGE_FALLING) 143 if (type & IRQ_TYPE_EDGE_FALLING)
154 stmpe_gpio->regs[REG_FE][regoffset] |= mask; 144 stmpe_gpio->regs[REG_FE][regoffset] |= mask;
155 else 145 else
156 stmpe_gpio->regs[REG_FE][regoffset] &= ~mask; 146 stmpe_gpio->regs[REG_FE][regoffset] &= ~mask;
@@ -160,14 +150,16 @@ static int stmpe_gpio_irq_set_type(struct irq_data *d, unsigned int type)
160 150
161static void stmpe_gpio_irq_lock(struct irq_data *d) 151static void stmpe_gpio_irq_lock(struct irq_data *d)
162{ 152{
163 struct stmpe_gpio *stmpe_gpio = irq_data_get_irq_chip_data(d); 153 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
154 struct stmpe_gpio *stmpe_gpio = to_stmpe_gpio(gc);
164 155
165 mutex_lock(&stmpe_gpio->irq_lock); 156 mutex_lock(&stmpe_gpio->irq_lock);
166} 157}
167 158
168static void stmpe_gpio_irq_sync_unlock(struct irq_data *d) 159static void stmpe_gpio_irq_sync_unlock(struct irq_data *d)
169{ 160{
170 struct stmpe_gpio *stmpe_gpio = irq_data_get_irq_chip_data(d); 161 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
162 struct stmpe_gpio *stmpe_gpio = to_stmpe_gpio(gc);
171 struct stmpe *stmpe = stmpe_gpio->stmpe; 163 struct stmpe *stmpe = stmpe_gpio->stmpe;
172 int num_banks = DIV_ROUND_UP(stmpe->num_gpios, 8); 164 int num_banks = DIV_ROUND_UP(stmpe->num_gpios, 8);
173 static const u8 regmap[] = { 165 static const u8 regmap[] = {
@@ -200,7 +192,8 @@ static void stmpe_gpio_irq_sync_unlock(struct irq_data *d)
200 192
201static void stmpe_gpio_irq_mask(struct irq_data *d) 193static void stmpe_gpio_irq_mask(struct irq_data *d)
202{ 194{
203 struct stmpe_gpio *stmpe_gpio = irq_data_get_irq_chip_data(d); 195 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
196 struct stmpe_gpio *stmpe_gpio = to_stmpe_gpio(gc);
204 int offset = d->hwirq; 197 int offset = d->hwirq;
205 int regoffset = offset / 8; 198 int regoffset = offset / 8;
206 int mask = 1 << (offset % 8); 199 int mask = 1 << (offset % 8);
@@ -210,7 +203,8 @@ static void stmpe_gpio_irq_mask(struct irq_data *d)
210 203
211static void stmpe_gpio_irq_unmask(struct irq_data *d) 204static void stmpe_gpio_irq_unmask(struct irq_data *d)
212{ 205{
213 struct stmpe_gpio *stmpe_gpio = irq_data_get_irq_chip_data(d); 206 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
207 struct stmpe_gpio *stmpe_gpio = to_stmpe_gpio(gc);
214 int offset = d->hwirq; 208 int offset = d->hwirq;
215 int regoffset = offset / 8; 209 int regoffset = offset / 8;
216 int mask = 1 << (offset % 8); 210 int mask = 1 << (offset % 8);
@@ -218,6 +212,77 @@ static void stmpe_gpio_irq_unmask(struct irq_data *d)
218 stmpe_gpio->regs[REG_IE][regoffset] |= mask; 212 stmpe_gpio->regs[REG_IE][regoffset] |= mask;
219} 213}
220 214
215static void stmpe_dbg_show_one(struct seq_file *s,
216 struct gpio_chip *gc,
217 unsigned offset, unsigned gpio)
218{
219 struct stmpe_gpio *stmpe_gpio = to_stmpe_gpio(gc);
220 struct stmpe *stmpe = stmpe_gpio->stmpe;
221 const char *label = gpiochip_is_requested(gc, offset);
222 int num_banks = DIV_ROUND_UP(stmpe->num_gpios, 8);
223 bool val = !!stmpe_gpio_get(gc, offset);
224 u8 dir_reg = stmpe->regs[STMPE_IDX_GPDR_LSB] - (offset / 8);
225 u8 mask = 1 << (offset % 8);
226 int ret;
227 u8 dir;
228
229 ret = stmpe_reg_read(stmpe, dir_reg);
230 if (ret < 0)
231 return;
232 dir = !!(ret & mask);
233
234 if (dir) {
235 seq_printf(s, " gpio-%-3d (%-20.20s) out %s",
236 gpio, label ?: "(none)",
237 val ? "hi" : "lo");
238 } else {
239 u8 edge_det_reg = stmpe->regs[STMPE_IDX_GPEDR_MSB] + num_banks - 1 - (offset / 8);
240 u8 rise_reg = stmpe->regs[STMPE_IDX_GPRER_LSB] - (offset / 8);
241 u8 fall_reg = stmpe->regs[STMPE_IDX_GPFER_LSB] - (offset / 8);
242 u8 irqen_reg = stmpe->regs[STMPE_IDX_IEGPIOR_LSB] - (offset / 8);
243 bool edge_det;
244 bool rise;
245 bool fall;
246 bool irqen;
247
248 ret = stmpe_reg_read(stmpe, edge_det_reg);
249 if (ret < 0)
250 return;
251 edge_det = !!(ret & mask);
252 ret = stmpe_reg_read(stmpe, rise_reg);
253 if (ret < 0)
254 return;
255 rise = !!(ret & mask);
256 ret = stmpe_reg_read(stmpe, fall_reg);
257 if (ret < 0)
258 return;
259 fall = !!(ret & mask);
260 ret = stmpe_reg_read(stmpe, irqen_reg);
261 if (ret < 0)
262 return;
263 irqen = !!(ret & mask);
264
265 seq_printf(s, " gpio-%-3d (%-20.20s) in %s %s %s%s%s",
266 gpio, label ?: "(none)",
267 val ? "hi" : "lo",
268 edge_det ? "edge-asserted" : "edge-inactive",
269 irqen ? "IRQ-enabled" : "",
270 rise ? " rising-edge-detection" : "",
271 fall ? " falling-edge-detection" : "");
272 }
273}
274
275static void stmpe_dbg_show(struct seq_file *s, struct gpio_chip *gc)
276{
277 unsigned i;
278 unsigned gpio = gc->base;
279
280 for (i = 0; i < gc->ngpio; i++, gpio++) {
281 stmpe_dbg_show_one(s, gc, i, gpio);
282 seq_printf(s, "\n");
283 }
284}
285
221static struct irq_chip stmpe_gpio_irq_chip = { 286static struct irq_chip stmpe_gpio_irq_chip = {
222 .name = "stmpe-gpio", 287 .name = "stmpe-gpio",
223 .irq_bus_lock = stmpe_gpio_irq_lock, 288 .irq_bus_lock = stmpe_gpio_irq_lock,
@@ -253,7 +318,7 @@ static irqreturn_t stmpe_gpio_irq(int irq, void *dev)
253 while (stat) { 318 while (stat) {
254 int bit = __ffs(stat); 319 int bit = __ffs(stat);
255 int line = bank * 8 + bit; 320 int line = bank * 8 + bit;
256 int child_irq = irq_find_mapping(stmpe_gpio->domain, 321 int child_irq = irq_find_mapping(stmpe_gpio->chip.irqdomain,
257 line); 322 line);
258 323
259 handle_nested_irq(child_irq); 324 handle_nested_irq(child_irq);
@@ -271,56 +336,6 @@ static irqreturn_t stmpe_gpio_irq(int irq, void *dev)
271 return IRQ_HANDLED; 336 return IRQ_HANDLED;
272} 337}
273 338
274static int stmpe_gpio_irq_map(struct irq_domain *d, unsigned int irq,
275 irq_hw_number_t hwirq)
276{
277 struct stmpe_gpio *stmpe_gpio = d->host_data;
278
279 if (!stmpe_gpio)
280 return -EINVAL;
281
282 irq_set_chip_data(irq, stmpe_gpio);
283 irq_set_chip_and_handler(irq, &stmpe_gpio_irq_chip,
284 handle_simple_irq);
285 irq_set_nested_thread(irq, 1);
286#ifdef CONFIG_ARM
287 set_irq_flags(irq, IRQF_VALID);
288#else
289 irq_set_noprobe(irq);
290#endif
291
292 return 0;
293}
294
295static void stmpe_gpio_irq_unmap(struct irq_domain *d, unsigned int irq)
296{
297#ifdef CONFIG_ARM
298 set_irq_flags(irq, 0);
299#endif
300 irq_set_chip_and_handler(irq, NULL, NULL);
301 irq_set_chip_data(irq, NULL);
302}
303
304static const struct irq_domain_ops stmpe_gpio_irq_simple_ops = {
305 .unmap = stmpe_gpio_irq_unmap,
306 .map = stmpe_gpio_irq_map,
307 .xlate = irq_domain_xlate_twocell,
308};
309
310static int stmpe_gpio_irq_init(struct stmpe_gpio *stmpe_gpio,
311 struct device_node *np)
312{
313 stmpe_gpio->domain = irq_domain_add_simple(np,
314 stmpe_gpio->chip.ngpio, 0,
315 &stmpe_gpio_irq_simple_ops, stmpe_gpio);
316 if (!stmpe_gpio->domain) {
317 dev_err(stmpe_gpio->dev, "failed to create irqdomain\n");
318 return -ENOSYS;
319 }
320
321 return 0;
322}
323
324static int stmpe_gpio_probe(struct platform_device *pdev) 339static int stmpe_gpio_probe(struct platform_device *pdev)
325{ 340{
326 struct stmpe *stmpe = dev_get_drvdata(pdev->dev.parent); 341 struct stmpe *stmpe = dev_get_drvdata(pdev->dev.parent);
@@ -350,6 +365,9 @@ static int stmpe_gpio_probe(struct platform_device *pdev)
350#endif 365#endif
351 stmpe_gpio->chip.base = -1; 366 stmpe_gpio->chip.base = -1;
352 367
368 if (IS_ENABLED(CONFIG_DEBUG_FS))
369 stmpe_gpio->chip.dbg_show = stmpe_dbg_show;
370
353 if (pdata) 371 if (pdata)
354 stmpe_gpio->norequest_mask = pdata->norequest_mask; 372 stmpe_gpio->norequest_mask = pdata->norequest_mask;
355 else if (np) 373 else if (np)
@@ -358,30 +376,42 @@ static int stmpe_gpio_probe(struct platform_device *pdev)
358 376
359 if (irq < 0) 377 if (irq < 0)
360 dev_info(&pdev->dev, 378 dev_info(&pdev->dev,
361 "device configured in no-irq mode; " 379 "device configured in no-irq mode: "
362 "irqs are not available\n"); 380 "irqs are not available\n");
363 381
364 ret = stmpe_enable(stmpe, STMPE_BLOCK_GPIO); 382 ret = stmpe_enable(stmpe, STMPE_BLOCK_GPIO);
365 if (ret) 383 if (ret)
366 goto out_free; 384 goto out_free;
367 385
368 if (irq >= 0) { 386 ret = gpiochip_add(&stmpe_gpio->chip);
369 ret = stmpe_gpio_irq_init(stmpe_gpio, np); 387 if (ret) {
370 if (ret) 388 dev_err(&pdev->dev, "unable to add gpiochip: %d\n", ret);
371 goto out_disable; 389 goto out_disable;
390 }
372 391
373 ret = request_threaded_irq(irq, NULL, stmpe_gpio_irq, 392 if (irq > 0) {
374 IRQF_ONESHOT, "stmpe-gpio", stmpe_gpio); 393 ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
394 stmpe_gpio_irq, IRQF_ONESHOT,
395 "stmpe-gpio", stmpe_gpio);
375 if (ret) { 396 if (ret) {
376 dev_err(&pdev->dev, "unable to get irq: %d\n", ret); 397 dev_err(&pdev->dev, "unable to get irq: %d\n", ret);
377 goto out_disable; 398 goto out_disable;
378 } 399 }
379 } 400 ret = gpiochip_irqchip_add(&stmpe_gpio->chip,
401 &stmpe_gpio_irq_chip,
402 0,
403 handle_simple_irq,
404 IRQ_TYPE_NONE);
405 if (ret) {
406 dev_err(&pdev->dev,
407 "could not connect irqchip to gpiochip\n");
408 goto out_disable;
409 }
380 410
381 ret = gpiochip_add(&stmpe_gpio->chip); 411 gpiochip_set_chained_irqchip(&stmpe_gpio->chip,
382 if (ret) { 412 &stmpe_gpio_irq_chip,
383 dev_err(&pdev->dev, "unable to add gpiochip: %d\n", ret); 413 irq,
384 goto out_freeirq; 414 NULL);
385 } 415 }
386 416
387 if (pdata && pdata->setup) 417 if (pdata && pdata->setup)
@@ -391,11 +421,9 @@ static int stmpe_gpio_probe(struct platform_device *pdev)
391 421
392 return 0; 422 return 0;
393 423
394out_freeirq:
395 if (irq >= 0)
396 free_irq(irq, stmpe_gpio);
397out_disable: 424out_disable:
398 stmpe_disable(stmpe, STMPE_BLOCK_GPIO); 425 stmpe_disable(stmpe, STMPE_BLOCK_GPIO);
426 gpiochip_remove(&stmpe_gpio->chip);
399out_free: 427out_free:
400 kfree(stmpe_gpio); 428 kfree(stmpe_gpio);
401 return ret; 429 return ret;
@@ -406,24 +434,14 @@ static int stmpe_gpio_remove(struct platform_device *pdev)
406 struct stmpe_gpio *stmpe_gpio = platform_get_drvdata(pdev); 434 struct stmpe_gpio *stmpe_gpio = platform_get_drvdata(pdev);
407 struct stmpe *stmpe = stmpe_gpio->stmpe; 435 struct stmpe *stmpe = stmpe_gpio->stmpe;
408 struct stmpe_gpio_platform_data *pdata = stmpe->pdata->gpio; 436 struct stmpe_gpio_platform_data *pdata = stmpe->pdata->gpio;
409 int irq = platform_get_irq(pdev, 0);
410 int ret;
411 437
412 if (pdata && pdata->remove) 438 if (pdata && pdata->remove)
413 pdata->remove(stmpe, stmpe_gpio->chip.base); 439 pdata->remove(stmpe, stmpe_gpio->chip.base);
414 440
415 ret = gpiochip_remove(&stmpe_gpio->chip); 441 gpiochip_remove(&stmpe_gpio->chip);
416 if (ret < 0) {
417 dev_err(stmpe_gpio->dev,
418 "unable to remove gpiochip: %d\n", ret);
419 return ret;
420 }
421 442
422 stmpe_disable(stmpe, STMPE_BLOCK_GPIO); 443 stmpe_disable(stmpe, STMPE_BLOCK_GPIO);
423 444
424 if (irq >= 0)
425 free_irq(irq, stmpe_gpio);
426
427 kfree(stmpe_gpio); 445 kfree(stmpe_gpio);
428 446
429 return 0; 447 return 0;
diff --git a/drivers/gpio/gpio-stp-xway.c b/drivers/gpio/gpio-stp-xway.c
index 04882a911b65..7e359b7cce1b 100644
--- a/drivers/gpio/gpio-stp-xway.c
+++ b/drivers/gpio/gpio-stp-xway.c
@@ -292,7 +292,7 @@ static struct platform_driver xway_stp_driver = {
292 }, 292 },
293}; 293};
294 294
295int __init xway_stp_init(void) 295static int __init xway_stp_init(void)
296{ 296{
297 return platform_driver_register(&xway_stp_driver); 297 return platform_driver_register(&xway_stp_driver);
298} 298}
diff --git a/drivers/gpio/gpio-sx150x.c b/drivers/gpio/gpio-sx150x.c
index b51ca9f5c140..bce6c6108f20 100644
--- a/drivers/gpio/gpio-sx150x.c
+++ b/drivers/gpio/gpio-sx150x.c
@@ -615,19 +615,16 @@ static int sx150x_probe(struct i2c_client *client,
615 615
616 return 0; 616 return 0;
617probe_fail_post_gpiochip_add: 617probe_fail_post_gpiochip_add:
618 WARN_ON(gpiochip_remove(&chip->gpio_chip) < 0); 618 gpiochip_remove(&chip->gpio_chip);
619 return rc; 619 return rc;
620} 620}
621 621
622static int sx150x_remove(struct i2c_client *client) 622static int sx150x_remove(struct i2c_client *client)
623{ 623{
624 struct sx150x_chip *chip; 624 struct sx150x_chip *chip;
625 int rc;
626 625
627 chip = i2c_get_clientdata(client); 626 chip = i2c_get_clientdata(client);
628 rc = gpiochip_remove(&chip->gpio_chip); 627 gpiochip_remove(&chip->gpio_chip);
629 if (rc < 0)
630 return rc;
631 628
632 if (chip->irq_summary >= 0) 629 if (chip->irq_summary >= 0)
633 sx150x_remove_irq_chip(chip); 630 sx150x_remove_irq_chip(chip);
diff --git a/drivers/gpio/gpio-syscon.c b/drivers/gpio/gpio-syscon.c
index b50fe1297748..e82fde4b6898 100644
--- a/drivers/gpio/gpio-syscon.c
+++ b/drivers/gpio/gpio-syscon.c
@@ -37,6 +37,8 @@
37 * dat_bit_offset: Offset (in bits) to the first GPIO bit. 37 * dat_bit_offset: Offset (in bits) to the first GPIO bit.
38 * dir_bit_offset: Optional offset (in bits) to the first bit to switch 38 * dir_bit_offset: Optional offset (in bits) to the first bit to switch
39 * GPIO direction (Used with GPIO_SYSCON_FEAT_DIR flag). 39 * GPIO direction (Used with GPIO_SYSCON_FEAT_DIR flag).
40 * set: HW specific callback to assigns output value
41 * for signal "offset"
40 */ 42 */
41 43
42struct syscon_gpio_data { 44struct syscon_gpio_data {
@@ -45,12 +47,16 @@ struct syscon_gpio_data {
45 unsigned int bit_count; 47 unsigned int bit_count;
46 unsigned int dat_bit_offset; 48 unsigned int dat_bit_offset;
47 unsigned int dir_bit_offset; 49 unsigned int dir_bit_offset;
50 void (*set)(struct gpio_chip *chip,
51 unsigned offset, int value);
48}; 52};
49 53
50struct syscon_gpio_priv { 54struct syscon_gpio_priv {
51 struct gpio_chip chip; 55 struct gpio_chip chip;
52 struct regmap *syscon; 56 struct regmap *syscon;
53 const struct syscon_gpio_data *data; 57 const struct syscon_gpio_data *data;
58 u32 dreg_offset;
59 u32 dir_reg_offset;
54}; 60};
55 61
56static inline struct syscon_gpio_priv *to_syscon_gpio(struct gpio_chip *chip) 62static inline struct syscon_gpio_priv *to_syscon_gpio(struct gpio_chip *chip)
@@ -61,9 +67,11 @@ static inline struct syscon_gpio_priv *to_syscon_gpio(struct gpio_chip *chip)
61static int syscon_gpio_get(struct gpio_chip *chip, unsigned offset) 67static int syscon_gpio_get(struct gpio_chip *chip, unsigned offset)
62{ 68{
63 struct syscon_gpio_priv *priv = to_syscon_gpio(chip); 69 struct syscon_gpio_priv *priv = to_syscon_gpio(chip);
64 unsigned int val, offs = priv->data->dat_bit_offset + offset; 70 unsigned int val, offs;
65 int ret; 71 int ret;
66 72
73 offs = priv->dreg_offset + priv->data->dat_bit_offset + offset;
74
67 ret = regmap_read(priv->syscon, 75 ret = regmap_read(priv->syscon,
68 (offs / SYSCON_REG_BITS) * SYSCON_REG_SIZE, &val); 76 (offs / SYSCON_REG_BITS) * SYSCON_REG_SIZE, &val);
69 if (ret) 77 if (ret)
@@ -75,7 +83,9 @@ static int syscon_gpio_get(struct gpio_chip *chip, unsigned offset)
75static void syscon_gpio_set(struct gpio_chip *chip, unsigned offset, int val) 83static void syscon_gpio_set(struct gpio_chip *chip, unsigned offset, int val)
76{ 84{
77 struct syscon_gpio_priv *priv = to_syscon_gpio(chip); 85 struct syscon_gpio_priv *priv = to_syscon_gpio(chip);
78 unsigned int offs = priv->data->dat_bit_offset + offset; 86 unsigned int offs;
87
88 offs = priv->dreg_offset + priv->data->dat_bit_offset + offset;
79 89
80 regmap_update_bits(priv->syscon, 90 regmap_update_bits(priv->syscon,
81 (offs / SYSCON_REG_BITS) * SYSCON_REG_SIZE, 91 (offs / SYSCON_REG_BITS) * SYSCON_REG_SIZE,
@@ -88,7 +98,10 @@ static int syscon_gpio_dir_in(struct gpio_chip *chip, unsigned offset)
88 struct syscon_gpio_priv *priv = to_syscon_gpio(chip); 98 struct syscon_gpio_priv *priv = to_syscon_gpio(chip);
89 99
90 if (priv->data->flags & GPIO_SYSCON_FEAT_DIR) { 100 if (priv->data->flags & GPIO_SYSCON_FEAT_DIR) {
91 unsigned int offs = priv->data->dir_bit_offset + offset; 101 unsigned int offs;
102
103 offs = priv->dir_reg_offset +
104 priv->data->dir_bit_offset + offset;
92 105
93 regmap_update_bits(priv->syscon, 106 regmap_update_bits(priv->syscon,
94 (offs / SYSCON_REG_BITS) * SYSCON_REG_SIZE, 107 (offs / SYSCON_REG_BITS) * SYSCON_REG_SIZE,
@@ -103,7 +116,10 @@ static int syscon_gpio_dir_out(struct gpio_chip *chip, unsigned offset, int val)
103 struct syscon_gpio_priv *priv = to_syscon_gpio(chip); 116 struct syscon_gpio_priv *priv = to_syscon_gpio(chip);
104 117
105 if (priv->data->flags & GPIO_SYSCON_FEAT_DIR) { 118 if (priv->data->flags & GPIO_SYSCON_FEAT_DIR) {
106 unsigned int offs = priv->data->dir_bit_offset + offset; 119 unsigned int offs;
120
121 offs = priv->dir_reg_offset +
122 priv->data->dir_bit_offset + offset;
107 123
108 regmap_update_bits(priv->syscon, 124 regmap_update_bits(priv->syscon,
109 (offs / SYSCON_REG_BITS) * SYSCON_REG_SIZE, 125 (offs / SYSCON_REG_BITS) * SYSCON_REG_SIZE,
@@ -111,7 +127,7 @@ static int syscon_gpio_dir_out(struct gpio_chip *chip, unsigned offset, int val)
111 BIT(offs % SYSCON_REG_BITS)); 127 BIT(offs % SYSCON_REG_BITS));
112 } 128 }
113 129
114 syscon_gpio_set(chip, offset, val); 130 priv->data->set(chip, offset, val);
115 131
116 return 0; 132 return 0;
117} 133}
@@ -124,11 +140,46 @@ static const struct syscon_gpio_data clps711x_mctrl_gpio = {
124 .dat_bit_offset = 0x40 * 8 + 8, 140 .dat_bit_offset = 0x40 * 8 + 8,
125}; 141};
126 142
143#define KEYSTONE_LOCK_BIT BIT(0)
144
145static void keystone_gpio_set(struct gpio_chip *chip, unsigned offset, int val)
146{
147 struct syscon_gpio_priv *priv = to_syscon_gpio(chip);
148 unsigned int offs;
149 int ret;
150
151 offs = priv->dreg_offset + priv->data->dat_bit_offset + offset;
152
153 if (!val)
154 return;
155
156 ret = regmap_update_bits(
157 priv->syscon,
158 (offs / SYSCON_REG_BITS) * SYSCON_REG_SIZE,
159 BIT(offs % SYSCON_REG_BITS) | KEYSTONE_LOCK_BIT,
160 BIT(offs % SYSCON_REG_BITS) | KEYSTONE_LOCK_BIT);
161 if (ret < 0)
162 dev_err(chip->dev, "gpio write failed ret(%d)\n", ret);
163}
164
165static const struct syscon_gpio_data keystone_dsp_gpio = {
166 /* ARM Keystone 2 */
167 .compatible = NULL,
168 .flags = GPIO_SYSCON_FEAT_OUT,
169 .bit_count = 28,
170 .dat_bit_offset = 4,
171 .set = keystone_gpio_set,
172};
173
127static const struct of_device_id syscon_gpio_ids[] = { 174static const struct of_device_id syscon_gpio_ids[] = {
128 { 175 {
129 .compatible = "cirrus,clps711x-mctrl-gpio", 176 .compatible = "cirrus,clps711x-mctrl-gpio",
130 .data = &clps711x_mctrl_gpio, 177 .data = &clps711x_mctrl_gpio,
131 }, 178 },
179 {
180 .compatible = "ti,keystone-dsp-gpio",
181 .data = &keystone_dsp_gpio,
182 },
132 { } 183 { }
133}; 184};
134MODULE_DEVICE_TABLE(of, syscon_gpio_ids); 185MODULE_DEVICE_TABLE(of, syscon_gpio_ids);
@@ -138,6 +189,8 @@ static int syscon_gpio_probe(struct platform_device *pdev)
138 struct device *dev = &pdev->dev; 189 struct device *dev = &pdev->dev;
139 const struct of_device_id *of_id = of_match_device(syscon_gpio_ids, dev); 190 const struct of_device_id *of_id = of_match_device(syscon_gpio_ids, dev);
140 struct syscon_gpio_priv *priv; 191 struct syscon_gpio_priv *priv;
192 struct device_node *np = dev->of_node;
193 int ret;
141 194
142 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); 195 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
143 if (!priv) 196 if (!priv)
@@ -145,10 +198,31 @@ static int syscon_gpio_probe(struct platform_device *pdev)
145 198
146 priv->data = of_id->data; 199 priv->data = of_id->data;
147 200
148 priv->syscon = 201 if (priv->data->compatible) {
149 syscon_regmap_lookup_by_compatible(priv->data->compatible); 202 priv->syscon = syscon_regmap_lookup_by_compatible(
150 if (IS_ERR(priv->syscon)) 203 priv->data->compatible);
151 return PTR_ERR(priv->syscon); 204 if (IS_ERR(priv->syscon))
205 return PTR_ERR(priv->syscon);
206 } else {
207 priv->syscon =
208 syscon_regmap_lookup_by_phandle(np, "gpio,syscon-dev");
209 if (IS_ERR(priv->syscon))
210 return PTR_ERR(priv->syscon);
211
212 ret = of_property_read_u32_index(np, "gpio,syscon-dev", 1,
213 &priv->dreg_offset);
214 if (ret)
215 dev_err(dev, "can't read the data register offset!\n");
216
217 priv->dreg_offset <<= 3;
218
219 ret = of_property_read_u32_index(np, "gpio,syscon-dev", 2,
220 &priv->dir_reg_offset);
221 if (ret)
222 dev_err(dev, "can't read the dir register offset!\n");
223
224 priv->dir_reg_offset <<= 3;
225 }
152 226
153 priv->chip.dev = dev; 227 priv->chip.dev = dev;
154 priv->chip.owner = THIS_MODULE; 228 priv->chip.owner = THIS_MODULE;
@@ -159,7 +233,7 @@ static int syscon_gpio_probe(struct platform_device *pdev)
159 if (priv->data->flags & GPIO_SYSCON_FEAT_IN) 233 if (priv->data->flags & GPIO_SYSCON_FEAT_IN)
160 priv->chip.direction_input = syscon_gpio_dir_in; 234 priv->chip.direction_input = syscon_gpio_dir_in;
161 if (priv->data->flags & GPIO_SYSCON_FEAT_OUT) { 235 if (priv->data->flags & GPIO_SYSCON_FEAT_OUT) {
162 priv->chip.set = syscon_gpio_set; 236 priv->chip.set = priv->data->set ? : syscon_gpio_set;
163 priv->chip.direction_output = syscon_gpio_dir_out; 237 priv->chip.direction_output = syscon_gpio_dir_out;
164 } 238 }
165 239
@@ -172,7 +246,8 @@ static int syscon_gpio_remove(struct platform_device *pdev)
172{ 246{
173 struct syscon_gpio_priv *priv = platform_get_drvdata(pdev); 247 struct syscon_gpio_priv *priv = platform_get_drvdata(pdev);
174 248
175 return gpiochip_remove(&priv->chip); 249 gpiochip_remove(&priv->chip);
250 return 0;
176} 251}
177 252
178static struct platform_driver syscon_gpio_driver = { 253static struct platform_driver syscon_gpio_driver = {
diff --git a/drivers/gpio/gpio-tb10x.c b/drivers/gpio/gpio-tb10x.c
index 07bce97647a6..9e615be8032c 100644
--- a/drivers/gpio/gpio-tb10x.c
+++ b/drivers/gpio/gpio-tb10x.c
@@ -291,7 +291,6 @@ fail_ioremap:
291static int __exit tb10x_gpio_remove(struct platform_device *pdev) 291static int __exit tb10x_gpio_remove(struct platform_device *pdev)
292{ 292{
293 struct tb10x_gpio *tb10x_gpio = platform_get_drvdata(pdev); 293 struct tb10x_gpio *tb10x_gpio = platform_get_drvdata(pdev);
294 int ret;
295 294
296 if (tb10x_gpio->gc.to_irq) { 295 if (tb10x_gpio->gc.to_irq) {
297 irq_remove_generic_chip(tb10x_gpio->domain->gc->gc[0], 296 irq_remove_generic_chip(tb10x_gpio->domain->gc->gc[0],
@@ -300,9 +299,7 @@ static int __exit tb10x_gpio_remove(struct platform_device *pdev)
300 irq_domain_remove(tb10x_gpio->domain); 299 irq_domain_remove(tb10x_gpio->domain);
301 free_irq(tb10x_gpio->irq, tb10x_gpio); 300 free_irq(tb10x_gpio->irq, tb10x_gpio);
302 } 301 }
303 ret = gpiochip_remove(&tb10x_gpio->gc); 302 gpiochip_remove(&tb10x_gpio->gc);
304 if (ret)
305 return ret;
306 303
307 return 0; 304 return 0;
308} 305}
diff --git a/drivers/gpio/gpio-tc3589x.c b/drivers/gpio/gpio-tc3589x.c
index 51f7cbd9ff71..ae0f6466eb09 100644
--- a/drivers/gpio/gpio-tc3589x.c
+++ b/drivers/gpio/gpio-tc3589x.c
@@ -300,6 +300,11 @@ static int tc3589x_gpio_probe(struct platform_device *pdev)
300 return ret; 300 return ret;
301 } 301 }
302 302
303 gpiochip_set_chained_irqchip(&tc3589x_gpio->chip,
304 &tc3589x_gpio_irq_chip,
305 irq,
306 NULL);
307
303 if (pdata && pdata->setup) 308 if (pdata && pdata->setup)
304 pdata->setup(tc3589x, tc3589x_gpio->chip.base); 309 pdata->setup(tc3589x, tc3589x_gpio->chip.base);
305 310
@@ -313,17 +318,11 @@ static int tc3589x_gpio_remove(struct platform_device *pdev)
313 struct tc3589x_gpio *tc3589x_gpio = platform_get_drvdata(pdev); 318 struct tc3589x_gpio *tc3589x_gpio = platform_get_drvdata(pdev);
314 struct tc3589x *tc3589x = tc3589x_gpio->tc3589x; 319 struct tc3589x *tc3589x = tc3589x_gpio->tc3589x;
315 struct tc3589x_gpio_platform_data *pdata = tc3589x->pdata->gpio; 320 struct tc3589x_gpio_platform_data *pdata = tc3589x->pdata->gpio;
316 int ret;
317 321
318 if (pdata && pdata->remove) 322 if (pdata && pdata->remove)
319 pdata->remove(tc3589x, tc3589x_gpio->chip.base); 323 pdata->remove(tc3589x, tc3589x_gpio->chip.base);
320 324
321 ret = gpiochip_remove(&tc3589x_gpio->chip); 325 gpiochip_remove(&tc3589x_gpio->chip);
322 if (ret < 0) {
323 dev_err(tc3589x_gpio->dev,
324 "unable to remove gpiochip: %d\n", ret);
325 return ret;
326 }
327 326
328 return 0; 327 return 0;
329} 328}
diff --git a/drivers/gpio/gpio-timberdale.c b/drivers/gpio/gpio-timberdale.c
index efc7c129016d..a685a3cbbc81 100644
--- a/drivers/gpio/gpio-timberdale.c
+++ b/drivers/gpio/gpio-timberdale.c
@@ -307,7 +307,6 @@ static int timbgpio_probe(struct platform_device *pdev)
307 307
308static int timbgpio_remove(struct platform_device *pdev) 308static int timbgpio_remove(struct platform_device *pdev)
309{ 309{
310 int err;
311 struct timbgpio_platform_data *pdata = dev_get_platdata(&pdev->dev); 310 struct timbgpio_platform_data *pdata = dev_get_platdata(&pdev->dev);
312 struct timbgpio *tgpio = platform_get_drvdata(pdev); 311 struct timbgpio *tgpio = platform_get_drvdata(pdev);
313 int irq = platform_get_irq(pdev, 0); 312 int irq = platform_get_irq(pdev, 0);
@@ -323,9 +322,7 @@ static int timbgpio_remove(struct platform_device *pdev)
323 irq_set_handler_data(irq, NULL); 322 irq_set_handler_data(irq, NULL);
324 } 323 }
325 324
326 err = gpiochip_remove(&tgpio->gpio); 325 gpiochip_remove(&tgpio->gpio);
327 if (err)
328 printk(KERN_ERR DRIVER_NAME": failed to remove gpio_chip\n");
329 326
330 return 0; 327 return 0;
331} 328}
diff --git a/drivers/gpio/gpio-tps6586x.c b/drivers/gpio/gpio-tps6586x.c
index a69fbea41253..9c9238e838a9 100644
--- a/drivers/gpio/gpio-tps6586x.c
+++ b/drivers/gpio/gpio-tps6586x.c
@@ -137,7 +137,8 @@ static int tps6586x_gpio_remove(struct platform_device *pdev)
137{ 137{
138 struct tps6586x_gpio *tps6586x_gpio = platform_get_drvdata(pdev); 138 struct tps6586x_gpio *tps6586x_gpio = platform_get_drvdata(pdev);
139 139
140 return gpiochip_remove(&tps6586x_gpio->gpio_chip); 140 gpiochip_remove(&tps6586x_gpio->gpio_chip);
141 return 0;
141} 142}
142 143
143static struct platform_driver tps6586x_gpio_driver = { 144static struct platform_driver tps6586x_gpio_driver = {
diff --git a/drivers/gpio/gpio-tps65910.c b/drivers/gpio/gpio-tps65910.c
index e2f8cda235ea..88f1f5ff4e96 100644
--- a/drivers/gpio/gpio-tps65910.c
+++ b/drivers/gpio/gpio-tps65910.c
@@ -190,7 +190,8 @@ static int tps65910_gpio_remove(struct platform_device *pdev)
190{ 190{
191 struct tps65910_gpio *tps65910_gpio = platform_get_drvdata(pdev); 191 struct tps65910_gpio *tps65910_gpio = platform_get_drvdata(pdev);
192 192
193 return gpiochip_remove(&tps65910_gpio->gpio_chip); 193 gpiochip_remove(&tps65910_gpio->gpio_chip);
194 return 0;
194} 195}
195 196
196static struct platform_driver tps65910_gpio_driver = { 197static struct platform_driver tps65910_gpio_driver = {
diff --git a/drivers/gpio/gpio-tps65912.c b/drivers/gpio/gpio-tps65912.c
index 59ee486cb8b9..22052d84c63b 100644
--- a/drivers/gpio/gpio-tps65912.c
+++ b/drivers/gpio/gpio-tps65912.c
@@ -117,7 +117,8 @@ static int tps65912_gpio_remove(struct platform_device *pdev)
117{ 117{
118 struct tps65912_gpio_data *tps65912_gpio = platform_get_drvdata(pdev); 118 struct tps65912_gpio_data *tps65912_gpio = platform_get_drvdata(pdev);
119 119
120 return gpiochip_remove(&tps65912_gpio->gpio_chip); 120 gpiochip_remove(&tps65912_gpio->gpio_chip);
121 return 0;
121} 122}
122 123
123static struct platform_driver tps65912_gpio_driver = { 124static struct platform_driver tps65912_gpio_driver = {
diff --git a/drivers/gpio/gpio-ts5500.c b/drivers/gpio/gpio-ts5500.c
index 3df3ebdb3e52..de18591ff11e 100644
--- a/drivers/gpio/gpio-ts5500.c
+++ b/drivers/gpio/gpio-ts5500.c
@@ -427,8 +427,7 @@ static int ts5500_dio_probe(struct platform_device *pdev)
427 427
428 return 0; 428 return 0;
429cleanup: 429cleanup:
430 if (gpiochip_remove(&priv->gpio_chip)) 430 gpiochip_remove(&priv->gpio_chip);
431 dev_err(dev, "failed to remove gpio chip\n");
432 return ret; 431 return ret;
433} 432}
434 433
@@ -437,7 +436,8 @@ static int ts5500_dio_remove(struct platform_device *pdev)
437 struct ts5500_priv *priv = platform_get_drvdata(pdev); 436 struct ts5500_priv *priv = platform_get_drvdata(pdev);
438 437
439 ts5500_disable_irq(priv); 438 ts5500_disable_irq(priv);
440 return gpiochip_remove(&priv->gpio_chip); 439 gpiochip_remove(&priv->gpio_chip);
440 return 0;
441} 441}
442 442
443static struct platform_device_id ts5500_dio_ids[] = { 443static struct platform_device_id ts5500_dio_ids[] = {
diff --git a/drivers/gpio/gpio-twl4030.c b/drivers/gpio/gpio-twl4030.c
index 3ebb1a5ff22e..118828b3736f 100644
--- a/drivers/gpio/gpio-twl4030.c
+++ b/drivers/gpio/gpio-twl4030.c
@@ -554,7 +554,7 @@ no_irqs:
554 554
555 platform_set_drvdata(pdev, priv); 555 platform_set_drvdata(pdev, priv);
556 556
557 if (pdata && pdata->setup) { 557 if (pdata->setup) {
558 int status; 558 int status;
559 559
560 status = pdata->setup(&pdev->dev, priv->gpio_chip.base, 560 status = pdata->setup(&pdev->dev, priv->gpio_chip.base,
@@ -583,9 +583,7 @@ static int gpio_twl4030_remove(struct platform_device *pdev)
583 } 583 }
584 } 584 }
585 585
586 status = gpiochip_remove(&priv->gpio_chip); 586 gpiochip_remove(&priv->gpio_chip);
587 if (status < 0)
588 return status;
589 587
590 if (is_module()) 588 if (is_module())
591 return 0; 589 return 0;
diff --git a/drivers/gpio/gpio-twl6040.c b/drivers/gpio/gpio-twl6040.c
index 0caf5cd1b47d..f28e04b88aa9 100644
--- a/drivers/gpio/gpio-twl6040.c
+++ b/drivers/gpio/gpio-twl6040.c
@@ -111,7 +111,8 @@ static int gpo_twl6040_probe(struct platform_device *pdev)
111 111
112static int gpo_twl6040_remove(struct platform_device *pdev) 112static int gpo_twl6040_remove(struct platform_device *pdev)
113{ 113{
114 return gpiochip_remove(&twl6040gpo_chip); 114 gpiochip_remove(&twl6040gpo_chip);
115 return 0;
115} 116}
116 117
117/* Note: this hardware lives inside an I2C-based multi-function device. */ 118/* Note: this hardware lives inside an I2C-based multi-function device. */
diff --git a/drivers/gpio/gpio-ucb1400.c b/drivers/gpio/gpio-ucb1400.c
index 2445fe771179..d502825159b9 100644
--- a/drivers/gpio/gpio-ucb1400.c
+++ b/drivers/gpio/gpio-ucb1400.c
@@ -70,7 +70,7 @@ static int ucb1400_gpio_probe(struct platform_device *dev)
70 if (err) 70 if (err)
71 goto err; 71 goto err;
72 72
73 if (ucb && ucb->gpio_setup) 73 if (ucb->gpio_setup)
74 err = ucb->gpio_setup(&dev->dev, ucb->gc.ngpio); 74 err = ucb->gpio_setup(&dev->dev, ucb->gc.ngpio);
75 75
76err: 76err:
@@ -89,7 +89,7 @@ static int ucb1400_gpio_remove(struct platform_device *dev)
89 return err; 89 return err;
90 } 90 }
91 91
92 err = gpiochip_remove(&ucb->gc); 92 gpiochip_remove(&ucb->gc);
93 return err; 93 return err;
94} 94}
95 95
diff --git a/drivers/gpio/gpio-viperboard.c b/drivers/gpio/gpio-viperboard.c
index 79e3b5836712..e2a11f27807f 100644
--- a/drivers/gpio/gpio-viperboard.c
+++ b/drivers/gpio/gpio-viperboard.c
@@ -446,8 +446,7 @@ static int vprbrd_gpio_probe(struct platform_device *pdev)
446 return ret; 446 return ret;
447 447
448err_gpiob: 448err_gpiob:
449 if (gpiochip_remove(&vb_gpio->gpioa)) 449 gpiochip_remove(&vb_gpio->gpioa);
450 dev_err(&pdev->dev, "%s gpiochip_remove failed\n", __func__);
451 450
452err_gpioa: 451err_gpioa:
453 return ret; 452 return ret;
@@ -456,13 +455,10 @@ err_gpioa:
456static int vprbrd_gpio_remove(struct platform_device *pdev) 455static int vprbrd_gpio_remove(struct platform_device *pdev)
457{ 456{
458 struct vprbrd_gpio *vb_gpio = platform_get_drvdata(pdev); 457 struct vprbrd_gpio *vb_gpio = platform_get_drvdata(pdev);
459 int ret;
460 458
461 ret = gpiochip_remove(&vb_gpio->gpiob); 459 gpiochip_remove(&vb_gpio->gpiob);
462 if (ret == 0)
463 ret = gpiochip_remove(&vb_gpio->gpioa);
464 460
465 return ret; 461 return 0;
466} 462}
467 463
468static struct platform_driver vprbrd_gpio_driver = { 464static struct platform_driver vprbrd_gpio_driver = {
diff --git a/drivers/gpio/gpio-vr41xx.c b/drivers/gpio/gpio-vr41xx.c
index 66cbcc108e62..dbf28fa03f67 100644
--- a/drivers/gpio/gpio-vr41xx.c
+++ b/drivers/gpio/gpio-vr41xx.c
@@ -515,7 +515,7 @@ static int giu_probe(struct platform_device *pdev)
515 struct resource *res; 515 struct resource *res;
516 unsigned int trigger, i, pin; 516 unsigned int trigger, i, pin;
517 struct irq_chip *chip; 517 struct irq_chip *chip;
518 int irq, retval; 518 int irq, ret;
519 519
520 switch (pdev->id) { 520 switch (pdev->id) {
521 case GPIO_50PINS_PULLUPDOWN: 521 case GPIO_50PINS_PULLUPDOWN:
@@ -544,7 +544,11 @@ static int giu_probe(struct platform_device *pdev)
544 544
545 vr41xx_gpio_chip.dev = &pdev->dev; 545 vr41xx_gpio_chip.dev = &pdev->dev;
546 546
547 retval = gpiochip_add(&vr41xx_gpio_chip); 547 ret = gpiochip_add(&vr41xx_gpio_chip);
548 if (!ret) {
549 iounmap(giu_base);
550 return -ENODEV;
551 }
548 552
549 giu_write(GIUINTENL, 0); 553 giu_write(GIUINTENL, 0);
550 giu_write(GIUINTENH, 0); 554 giu_write(GIUINTENH, 0);
diff --git a/drivers/gpio/gpio-vx855.c b/drivers/gpio/gpio-vx855.c
index 0fd23b6a753d..85971d4e23c1 100644
--- a/drivers/gpio/gpio-vx855.c
+++ b/drivers/gpio/gpio-vx855.c
@@ -288,8 +288,7 @@ static int vx855gpio_remove(struct platform_device *pdev)
288 struct vx855_gpio *vg = platform_get_drvdata(pdev); 288 struct vx855_gpio *vg = platform_get_drvdata(pdev);
289 struct resource *res; 289 struct resource *res;
290 290
291 if (gpiochip_remove(&vg->gpio)) 291 gpiochip_remove(&vg->gpio);
292 dev_err(&pdev->dev, "unable to remove gpio_chip?\n");
293 292
294 if (vg->gpi_reserved) { 293 if (vg->gpi_reserved) {
295 res = platform_get_resource(pdev, IORESOURCE_IO, 0); 294 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
diff --git a/drivers/gpio/gpio-wm831x.c b/drivers/gpio/gpio-wm831x.c
index b18a1a26425e..58ce75c188b7 100644
--- a/drivers/gpio/gpio-wm831x.c
+++ b/drivers/gpio/gpio-wm831x.c
@@ -279,7 +279,8 @@ static int wm831x_gpio_remove(struct platform_device *pdev)
279{ 279{
280 struct wm831x_gpio *wm831x_gpio = platform_get_drvdata(pdev); 280 struct wm831x_gpio *wm831x_gpio = platform_get_drvdata(pdev);
281 281
282 return gpiochip_remove(&wm831x_gpio->gpio_chip); 282 gpiochip_remove(&wm831x_gpio->gpio_chip);
283 return 0;
283} 284}
284 285
285static struct platform_driver wm831x_gpio_driver = { 286static struct platform_driver wm831x_gpio_driver = {
diff --git a/drivers/gpio/gpio-wm8350.c b/drivers/gpio/gpio-wm8350.c
index 2487f9d575d3..060b89303bb6 100644
--- a/drivers/gpio/gpio-wm8350.c
+++ b/drivers/gpio/gpio-wm8350.c
@@ -145,7 +145,8 @@ static int wm8350_gpio_remove(struct platform_device *pdev)
145{ 145{
146 struct wm8350_gpio_data *wm8350_gpio = platform_get_drvdata(pdev); 146 struct wm8350_gpio_data *wm8350_gpio = platform_get_drvdata(pdev);
147 147
148 return gpiochip_remove(&wm8350_gpio->gpio_chip); 148 gpiochip_remove(&wm8350_gpio->gpio_chip);
149 return 0;
149} 150}
150 151
151static struct platform_driver wm8350_gpio_driver = { 152static struct platform_driver wm8350_gpio_driver = {
diff --git a/drivers/gpio/gpio-wm8994.c b/drivers/gpio/gpio-wm8994.c
index d93b6b581677..6f5e42db4b9e 100644
--- a/drivers/gpio/gpio-wm8994.c
+++ b/drivers/gpio/gpio-wm8994.c
@@ -285,7 +285,8 @@ static int wm8994_gpio_remove(struct platform_device *pdev)
285{ 285{
286 struct wm8994_gpio *wm8994_gpio = platform_get_drvdata(pdev); 286 struct wm8994_gpio *wm8994_gpio = platform_get_drvdata(pdev);
287 287
288 return gpiochip_remove(&wm8994_gpio->gpio_chip); 288 gpiochip_remove(&wm8994_gpio->gpio_chip);
289 return 0;
289} 290}
290 291
291static struct platform_driver wm8994_gpio_driver = { 292static struct platform_driver wm8994_gpio_driver = {
diff --git a/drivers/gpio/gpio-xgene.c b/drivers/gpio/gpio-xgene.c
new file mode 100644
index 000000000000..7d489221dc1f
--- /dev/null
+++ b/drivers/gpio/gpio-xgene.c
@@ -0,0 +1,244 @@
1/*
2 * AppliedMicro X-Gene SoC GPIO Driver
3 *
4 * Copyright (c) 2014, Applied Micro Circuits Corporation
5 * Author: Feng Kan <fkan@apm.com>.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include <linux/module.h>
21#include <linux/kernel.h>
22#include <linux/init.h>
23#include <linux/io.h>
24#include <linux/spinlock.h>
25#include <linux/platform_device.h>
26#include <linux/gpio/driver.h>
27#include <linux/types.h>
28#include <linux/bitops.h>
29
30#define GPIO_SET_DR_OFFSET 0x0C
31#define GPIO_DATA_OFFSET 0x14
32#define GPIO_BANK_STRIDE 0x0C
33
34#define XGENE_GPIOS_PER_BANK 16
35#define XGENE_MAX_GPIO_BANKS 3
36#define XGENE_MAX_GPIOS (XGENE_GPIOS_PER_BANK * XGENE_MAX_GPIO_BANKS)
37
38#define GPIO_BIT_OFFSET(x) (x % XGENE_GPIOS_PER_BANK)
39#define GPIO_BANK_OFFSET(x) ((x / XGENE_GPIOS_PER_BANK) * GPIO_BANK_STRIDE)
40
41struct xgene_gpio {
42 struct gpio_chip chip;
43 void __iomem *base;
44 spinlock_t lock;
45#ifdef CONFIG_PM
46 u32 set_dr_val[XGENE_MAX_GPIO_BANKS];
47#endif
48};
49
50static inline struct xgene_gpio *to_xgene_gpio(struct gpio_chip *chip)
51{
52 return container_of(chip, struct xgene_gpio, chip);
53}
54
55static int xgene_gpio_get(struct gpio_chip *gc, unsigned int offset)
56{
57 struct xgene_gpio *chip = to_xgene_gpio(gc);
58 unsigned long bank_offset;
59 u32 bit_offset;
60
61 bank_offset = GPIO_DATA_OFFSET + GPIO_BANK_OFFSET(offset);
62 bit_offset = GPIO_BIT_OFFSET(offset);
63 return !!(ioread32(chip->base + bank_offset) & BIT(bit_offset));
64}
65
66static void __xgene_gpio_set(struct gpio_chip *gc, unsigned int offset, int val)
67{
68 struct xgene_gpio *chip = to_xgene_gpio(gc);
69 unsigned long bank_offset;
70 u32 setval, bit_offset;
71
72 bank_offset = GPIO_SET_DR_OFFSET + GPIO_BANK_OFFSET(offset);
73 bit_offset = GPIO_BIT_OFFSET(offset) + XGENE_GPIOS_PER_BANK;
74
75 setval = ioread32(chip->base + bank_offset);
76 if (val)
77 setval |= BIT(bit_offset);
78 else
79 setval &= ~BIT(bit_offset);
80 iowrite32(setval, chip->base + bank_offset);
81}
82
83static void xgene_gpio_set(struct gpio_chip *gc, unsigned int offset, int val)
84{
85 struct xgene_gpio *chip = to_xgene_gpio(gc);
86 unsigned long flags;
87
88 spin_lock_irqsave(&chip->lock, flags);
89 __xgene_gpio_set(gc, offset, val);
90 spin_unlock_irqrestore(&chip->lock, flags);
91}
92
93static int xgene_gpio_dir_in(struct gpio_chip *gc, unsigned int offset)
94{
95 struct xgene_gpio *chip = to_xgene_gpio(gc);
96 unsigned long flags, bank_offset;
97 u32 dirval, bit_offset;
98
99 bank_offset = GPIO_SET_DR_OFFSET + GPIO_BANK_OFFSET(offset);
100 bit_offset = GPIO_BIT_OFFSET(offset);
101
102 spin_lock_irqsave(&chip->lock, flags);
103
104 dirval = ioread32(chip->base + bank_offset);
105 dirval |= BIT(bit_offset);
106 iowrite32(dirval, chip->base + bank_offset);
107
108 spin_unlock_irqrestore(&chip->lock, flags);
109
110 return 0;
111}
112
113static int xgene_gpio_dir_out(struct gpio_chip *gc,
114 unsigned int offset, int val)
115{
116 struct xgene_gpio *chip = to_xgene_gpio(gc);
117 unsigned long flags, bank_offset;
118 u32 dirval, bit_offset;
119
120 bank_offset = GPIO_SET_DR_OFFSET + GPIO_BANK_OFFSET(offset);
121 bit_offset = GPIO_BIT_OFFSET(offset);
122
123 spin_lock_irqsave(&chip->lock, flags);
124
125 dirval = ioread32(chip->base + bank_offset);
126 dirval &= ~BIT(bit_offset);
127 iowrite32(dirval, chip->base + bank_offset);
128 __xgene_gpio_set(gc, offset, val);
129
130 spin_unlock_irqrestore(&chip->lock, flags);
131
132 return 0;
133}
134
135#ifdef CONFIG_PM
136static int xgene_gpio_suspend(struct device *dev)
137{
138 struct xgene_gpio *gpio = dev_get_drvdata(dev);
139 unsigned long bank_offset;
140 unsigned int bank;
141
142 for (bank = 0; bank < XGENE_MAX_GPIO_BANKS; bank++) {
143 bank_offset = GPIO_SET_DR_OFFSET + bank * GPIO_BANK_STRIDE;
144 gpio->set_dr_val[bank] = ioread32(gpio->base + bank_offset);
145 }
146 return 0;
147}
148
149static int xgene_gpio_resume(struct device *dev)
150{
151 struct xgene_gpio *gpio = dev_get_drvdata(dev);
152 unsigned long bank_offset;
153 unsigned int bank;
154
155 for (bank = 0; bank < XGENE_MAX_GPIO_BANKS; bank++) {
156 bank_offset = GPIO_SET_DR_OFFSET + bank * GPIO_BANK_STRIDE;
157 iowrite32(gpio->set_dr_val[bank], gpio->base + bank_offset);
158 }
159 return 0;
160}
161
162static SIMPLE_DEV_PM_OPS(xgene_gpio_pm, xgene_gpio_suspend, xgene_gpio_resume);
163#define XGENE_GPIO_PM_OPS (&xgene_gpio_pm)
164#else
165#define XGENE_GPIO_PM_OPS NULL
166#endif
167
168static int xgene_gpio_probe(struct platform_device *pdev)
169{
170 struct resource *res;
171 struct xgene_gpio *gpio;
172 int err = 0;
173
174 gpio = devm_kzalloc(&pdev->dev, sizeof(*gpio), GFP_KERNEL);
175 if (!gpio) {
176 err = -ENOMEM;
177 goto err;
178 }
179
180 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
181 gpio->base = devm_ioremap_nocache(&pdev->dev, res->start,
182 resource_size(res));
183 if (!gpio->base) {
184 err = -ENOMEM;
185 goto err;
186 }
187
188 gpio->chip.ngpio = XGENE_MAX_GPIOS;
189
190 spin_lock_init(&gpio->lock);
191 gpio->chip.dev = &pdev->dev;
192 gpio->chip.direction_input = xgene_gpio_dir_in;
193 gpio->chip.direction_output = xgene_gpio_dir_out;
194 gpio->chip.get = xgene_gpio_get;
195 gpio->chip.set = xgene_gpio_set;
196 gpio->chip.label = dev_name(&pdev->dev);
197 gpio->chip.base = -1;
198
199 platform_set_drvdata(pdev, gpio);
200
201 err = gpiochip_add(&gpio->chip);
202 if (err) {
203 dev_err(&pdev->dev,
204 "failed to register gpiochip.\n");
205 goto err;
206 }
207
208 dev_info(&pdev->dev, "X-Gene GPIO driver registered.\n");
209 return 0;
210err:
211 dev_err(&pdev->dev, "X-Gene GPIO driver registration failed.\n");
212 return err;
213}
214
215static int xgene_gpio_remove(struct platform_device *pdev)
216{
217 struct xgene_gpio *gpio = platform_get_drvdata(pdev);
218
219 gpiochip_remove(&gpio->chip);
220 return 0;
221}
222
223static const struct of_device_id xgene_gpio_of_match[] = {
224 { .compatible = "apm,xgene-gpio", },
225 {},
226};
227MODULE_DEVICE_TABLE(of, xgene_gpio_of_match);
228
229static struct platform_driver xgene_gpio_driver = {
230 .driver = {
231 .name = "xgene-gpio",
232 .owner = THIS_MODULE,
233 .of_match_table = xgene_gpio_of_match,
234 .pm = XGENE_GPIO_PM_OPS,
235 },
236 .probe = xgene_gpio_probe,
237 .remove = xgene_gpio_remove,
238};
239
240module_platform_driver(xgene_gpio_driver);
241
242MODULE_AUTHOR("Feng Kan <fkan@apm.com>");
243MODULE_DESCRIPTION("APM X-Gene GPIO driver");
244MODULE_LICENSE("GPL");
diff --git a/drivers/gpio/gpio-xilinx.c b/drivers/gpio/gpio-xilinx.c
index 12481867daf1..ba18b06c9a21 100644
--- a/drivers/gpio/gpio-xilinx.c
+++ b/drivers/gpio/gpio-xilinx.c
@@ -197,6 +197,7 @@ static int xgpio_of_probe(struct device_node *np)
197 struct xgpio_instance *chip; 197 struct xgpio_instance *chip;
198 int status = 0; 198 int status = 0;
199 const u32 *tree_info; 199 const u32 *tree_info;
200 u32 ngpio;
200 201
201 chip = kzalloc(sizeof(*chip), GFP_KERNEL); 202 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
202 if (!chip) 203 if (!chip)
@@ -211,12 +212,13 @@ static int xgpio_of_probe(struct device_node *np)
211 /* Update GPIO direction shadow register with default value */ 212 /* Update GPIO direction shadow register with default value */
212 of_property_read_u32(np, "xlnx,tri-default", &chip->gpio_dir); 213 of_property_read_u32(np, "xlnx,tri-default", &chip->gpio_dir);
213 214
214 /* By default assume full GPIO controller */ 215 /*
215 chip->mmchip.gc.ngpio = 32; 216 * Check device node and parent device node for device width
216 217 * and assume default width of 32
217 /* Check device node and parent device node for device width */ 218 */
218 of_property_read_u32(np, "xlnx,gpio-width", 219 if (of_property_read_u32(np, "xlnx,gpio-width", &ngpio))
219 (u32 *)&chip->mmchip.gc.ngpio); 220 ngpio = 32;
221 chip->mmchip.gc.ngpio = (u16)ngpio;
220 222
221 spin_lock_init(&chip->gpio_lock); 223 spin_lock_init(&chip->gpio_lock);
222 224
@@ -258,12 +260,13 @@ static int xgpio_of_probe(struct device_node *np)
258 /* Update GPIO direction shadow register with default value */ 260 /* Update GPIO direction shadow register with default value */
259 of_property_read_u32(np, "xlnx,tri-default-2", &chip->gpio_dir); 261 of_property_read_u32(np, "xlnx,tri-default-2", &chip->gpio_dir);
260 262
261 /* By default assume full GPIO controller */ 263 /*
262 chip->mmchip.gc.ngpio = 32; 264 * Check device node and parent device node for device width
263 265 * and assume default width of 32
264 /* Check device node and parent device node for device width */ 266 */
265 of_property_read_u32(np, "xlnx,gpio2-width", 267 if (of_property_read_u32(np, "xlnx,gpio2-width", &ngpio))
266 (u32 *)&chip->mmchip.gc.ngpio); 268 ngpio = 32;
269 chip->mmchip.gc.ngpio = (u16)ngpio;
267 270
268 spin_lock_init(&chip->gpio_lock); 271 spin_lock_init(&chip->gpio_lock);
269 272
diff --git a/drivers/gpio/gpio-zynq.c b/drivers/gpio/gpio-zynq.c
new file mode 100644
index 000000000000..74cd480bf8de
--- /dev/null
+++ b/drivers/gpio/gpio-zynq.c
@@ -0,0 +1,727 @@
1/*
2 * Xilinx Zynq GPIO device driver
3 *
4 * Copyright (C) 2009 - 2014 Xilinx, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it under
7 * the terms of the GNU General Public License as published by the Free Software
8 * Foundation; either version 2 of the License, or (at your option) any later
9 * version.
10 */
11
12#include <linux/bitops.h>
13#include <linux/clk.h>
14#include <linux/gpio/driver.h>
15#include <linux/init.h>
16#include <linux/interrupt.h>
17#include <linux/io.h>
18#include <linux/module.h>
19#include <linux/platform_device.h>
20#include <linux/pm_runtime.h>
21
22#define DRIVER_NAME "zynq-gpio"
23
24/* Maximum banks */
25#define ZYNQ_GPIO_MAX_BANK 4
26
27#define ZYNQ_GPIO_BANK0_NGPIO 32
28#define ZYNQ_GPIO_BANK1_NGPIO 22
29#define ZYNQ_GPIO_BANK2_NGPIO 32
30#define ZYNQ_GPIO_BANK3_NGPIO 32
31
32#define ZYNQ_GPIO_NR_GPIOS (ZYNQ_GPIO_BANK0_NGPIO + \
33 ZYNQ_GPIO_BANK1_NGPIO + \
34 ZYNQ_GPIO_BANK2_NGPIO + \
35 ZYNQ_GPIO_BANK3_NGPIO)
36
37#define ZYNQ_GPIO_BANK0_PIN_MIN 0
38#define ZYNQ_GPIO_BANK0_PIN_MAX (ZYNQ_GPIO_BANK0_PIN_MIN + \
39 ZYNQ_GPIO_BANK0_NGPIO - 1)
40#define ZYNQ_GPIO_BANK1_PIN_MIN (ZYNQ_GPIO_BANK0_PIN_MAX + 1)
41#define ZYNQ_GPIO_BANK1_PIN_MAX (ZYNQ_GPIO_BANK1_PIN_MIN + \
42 ZYNQ_GPIO_BANK1_NGPIO - 1)
43#define ZYNQ_GPIO_BANK2_PIN_MIN (ZYNQ_GPIO_BANK1_PIN_MAX + 1)
44#define ZYNQ_GPIO_BANK2_PIN_MAX (ZYNQ_GPIO_BANK2_PIN_MIN + \
45 ZYNQ_GPIO_BANK2_NGPIO - 1)
46#define ZYNQ_GPIO_BANK3_PIN_MIN (ZYNQ_GPIO_BANK2_PIN_MAX + 1)
47#define ZYNQ_GPIO_BANK3_PIN_MAX (ZYNQ_GPIO_BANK3_PIN_MIN + \
48 ZYNQ_GPIO_BANK3_NGPIO - 1)
49
50
51/* Register offsets for the GPIO device */
52/* LSW Mask & Data -WO */
53#define ZYNQ_GPIO_DATA_LSW_OFFSET(BANK) (0x000 + (8 * BANK))
54/* MSW Mask & Data -WO */
55#define ZYNQ_GPIO_DATA_MSW_OFFSET(BANK) (0x004 + (8 * BANK))
56/* Data Register-RW */
57#define ZYNQ_GPIO_DATA_RO_OFFSET(BANK) (0x060 + (4 * BANK))
58/* Direction mode reg-RW */
59#define ZYNQ_GPIO_DIRM_OFFSET(BANK) (0x204 + (0x40 * BANK))
60/* Output enable reg-RW */
61#define ZYNQ_GPIO_OUTEN_OFFSET(BANK) (0x208 + (0x40 * BANK))
62/* Interrupt mask reg-RO */
63#define ZYNQ_GPIO_INTMASK_OFFSET(BANK) (0x20C + (0x40 * BANK))
64/* Interrupt enable reg-WO */
65#define ZYNQ_GPIO_INTEN_OFFSET(BANK) (0x210 + (0x40 * BANK))
66/* Interrupt disable reg-WO */
67#define ZYNQ_GPIO_INTDIS_OFFSET(BANK) (0x214 + (0x40 * BANK))
68/* Interrupt status reg-RO */
69#define ZYNQ_GPIO_INTSTS_OFFSET(BANK) (0x218 + (0x40 * BANK))
70/* Interrupt type reg-RW */
71#define ZYNQ_GPIO_INTTYPE_OFFSET(BANK) (0x21C + (0x40 * BANK))
72/* Interrupt polarity reg-RW */
73#define ZYNQ_GPIO_INTPOL_OFFSET(BANK) (0x220 + (0x40 * BANK))
74/* Interrupt on any, reg-RW */
75#define ZYNQ_GPIO_INTANY_OFFSET(BANK) (0x224 + (0x40 * BANK))
76
77/* Disable all interrupts mask */
78#define ZYNQ_GPIO_IXR_DISABLE_ALL 0xFFFFFFFF
79
80/* Mid pin number of a bank */
81#define ZYNQ_GPIO_MID_PIN_NUM 16
82
83/* GPIO upper 16 bit mask */
84#define ZYNQ_GPIO_UPPER_MASK 0xFFFF0000
85
86/**
87 * struct zynq_gpio - gpio device private data structure
88 * @chip: instance of the gpio_chip
89 * @base_addr: base address of the GPIO device
90 * @clk: clock resource for this controller
91 * @irq: interrupt for the GPIO device
92 */
93struct zynq_gpio {
94 struct gpio_chip chip;
95 void __iomem *base_addr;
96 struct clk *clk;
97 int irq;
98};
99
100static struct irq_chip zynq_gpio_level_irqchip;
101static struct irq_chip zynq_gpio_edge_irqchip;
102/**
103 * zynq_gpio_get_bank_pin - Get the bank number and pin number within that bank
104 * for a given pin in the GPIO device
105 * @pin_num: gpio pin number within the device
106 * @bank_num: an output parameter used to return the bank number of the gpio
107 * pin
108 * @bank_pin_num: an output parameter used to return pin number within a bank
109 * for the given gpio pin
110 *
111 * Returns the bank number and pin offset within the bank.
112 */
113static inline void zynq_gpio_get_bank_pin(unsigned int pin_num,
114 unsigned int *bank_num,
115 unsigned int *bank_pin_num)
116{
117 switch (pin_num) {
118 case ZYNQ_GPIO_BANK0_PIN_MIN ... ZYNQ_GPIO_BANK0_PIN_MAX:
119 *bank_num = 0;
120 *bank_pin_num = pin_num;
121 break;
122 case ZYNQ_GPIO_BANK1_PIN_MIN ... ZYNQ_GPIO_BANK1_PIN_MAX:
123 *bank_num = 1;
124 *bank_pin_num = pin_num - ZYNQ_GPIO_BANK1_PIN_MIN;
125 break;
126 case ZYNQ_GPIO_BANK2_PIN_MIN ... ZYNQ_GPIO_BANK2_PIN_MAX:
127 *bank_num = 2;
128 *bank_pin_num = pin_num - ZYNQ_GPIO_BANK2_PIN_MIN;
129 break;
130 case ZYNQ_GPIO_BANK3_PIN_MIN ... ZYNQ_GPIO_BANK3_PIN_MAX:
131 *bank_num = 3;
132 *bank_pin_num = pin_num - ZYNQ_GPIO_BANK3_PIN_MIN;
133 break;
134 default:
135 WARN(true, "invalid GPIO pin number: %u", pin_num);
136 *bank_num = 0;
137 *bank_pin_num = 0;
138 break;
139 }
140}
141
142static const unsigned int zynq_gpio_bank_offset[] = {
143 ZYNQ_GPIO_BANK0_PIN_MIN,
144 ZYNQ_GPIO_BANK1_PIN_MIN,
145 ZYNQ_GPIO_BANK2_PIN_MIN,
146 ZYNQ_GPIO_BANK3_PIN_MIN,
147};
148
149/**
150 * zynq_gpio_get_value - Get the state of the specified pin of GPIO device
151 * @chip: gpio_chip instance to be worked on
152 * @pin: gpio pin number within the device
153 *
154 * This function reads the state of the specified pin of the GPIO device.
155 *
156 * Return: 0 if the pin is low, 1 if pin is high.
157 */
158static int zynq_gpio_get_value(struct gpio_chip *chip, unsigned int pin)
159{
160 u32 data;
161 unsigned int bank_num, bank_pin_num;
162 struct zynq_gpio *gpio = container_of(chip, struct zynq_gpio, chip);
163
164 zynq_gpio_get_bank_pin(pin, &bank_num, &bank_pin_num);
165
166 data = readl_relaxed(gpio->base_addr +
167 ZYNQ_GPIO_DATA_RO_OFFSET(bank_num));
168
169 return (data >> bank_pin_num) & 1;
170}
171
172/**
173 * zynq_gpio_set_value - Modify the state of the pin with specified value
174 * @chip: gpio_chip instance to be worked on
175 * @pin: gpio pin number within the device
176 * @state: value used to modify the state of the specified pin
177 *
178 * This function calculates the register offset (i.e to lower 16 bits or
179 * upper 16 bits) based on the given pin number and sets the state of a
180 * gpio pin to the specified value. The state is either 0 or non-zero.
181 */
182static void zynq_gpio_set_value(struct gpio_chip *chip, unsigned int pin,
183 int state)
184{
185 unsigned int reg_offset, bank_num, bank_pin_num;
186 struct zynq_gpio *gpio = container_of(chip, struct zynq_gpio, chip);
187
188 zynq_gpio_get_bank_pin(pin, &bank_num, &bank_pin_num);
189
190 if (bank_pin_num >= ZYNQ_GPIO_MID_PIN_NUM) {
191 /* only 16 data bits in bit maskable reg */
192 bank_pin_num -= ZYNQ_GPIO_MID_PIN_NUM;
193 reg_offset = ZYNQ_GPIO_DATA_MSW_OFFSET(bank_num);
194 } else {
195 reg_offset = ZYNQ_GPIO_DATA_LSW_OFFSET(bank_num);
196 }
197
198 /*
199 * get the 32 bit value to be written to the mask/data register where
200 * the upper 16 bits is the mask and lower 16 bits is the data
201 */
202 state = !!state;
203 state = ~(1 << (bank_pin_num + ZYNQ_GPIO_MID_PIN_NUM)) &
204 ((state << bank_pin_num) | ZYNQ_GPIO_UPPER_MASK);
205
206 writel_relaxed(state, gpio->base_addr + reg_offset);
207}
208
209/**
210 * zynq_gpio_dir_in - Set the direction of the specified GPIO pin as input
211 * @chip: gpio_chip instance to be worked on
212 * @pin: gpio pin number within the device
213 *
214 * This function uses the read-modify-write sequence to set the direction of
215 * the gpio pin as input.
216 *
217 * Return: 0 always
218 */
219static int zynq_gpio_dir_in(struct gpio_chip *chip, unsigned int pin)
220{
221 u32 reg;
222 unsigned int bank_num, bank_pin_num;
223 struct zynq_gpio *gpio = container_of(chip, struct zynq_gpio, chip);
224
225 zynq_gpio_get_bank_pin(pin, &bank_num, &bank_pin_num);
226
227 /* bank 0 pins 7 and 8 are special and cannot be used as inputs */
228 if (bank_num == 0 && (bank_pin_num == 7 || bank_pin_num == 8))
229 return -EINVAL;
230
231 /* clear the bit in direction mode reg to set the pin as input */
232 reg = readl_relaxed(gpio->base_addr + ZYNQ_GPIO_DIRM_OFFSET(bank_num));
233 reg &= ~BIT(bank_pin_num);
234 writel_relaxed(reg, gpio->base_addr + ZYNQ_GPIO_DIRM_OFFSET(bank_num));
235
236 return 0;
237}
238
239/**
240 * zynq_gpio_dir_out - Set the direction of the specified GPIO pin as output
241 * @chip: gpio_chip instance to be worked on
242 * @pin: gpio pin number within the device
243 * @state: value to be written to specified pin
244 *
245 * This function sets the direction of specified GPIO pin as output, configures
246 * the Output Enable register for the pin and uses zynq_gpio_set to set
247 * the state of the pin to the value specified.
248 *
249 * Return: 0 always
250 */
251static int zynq_gpio_dir_out(struct gpio_chip *chip, unsigned int pin,
252 int state)
253{
254 u32 reg;
255 unsigned int bank_num, bank_pin_num;
256 struct zynq_gpio *gpio = container_of(chip, struct zynq_gpio, chip);
257
258 zynq_gpio_get_bank_pin(pin, &bank_num, &bank_pin_num);
259
260 /* set the GPIO pin as output */
261 reg = readl_relaxed(gpio->base_addr + ZYNQ_GPIO_DIRM_OFFSET(bank_num));
262 reg |= BIT(bank_pin_num);
263 writel_relaxed(reg, gpio->base_addr + ZYNQ_GPIO_DIRM_OFFSET(bank_num));
264
265 /* configure the output enable reg for the pin */
266 reg = readl_relaxed(gpio->base_addr + ZYNQ_GPIO_OUTEN_OFFSET(bank_num));
267 reg |= BIT(bank_pin_num);
268 writel_relaxed(reg, gpio->base_addr + ZYNQ_GPIO_OUTEN_OFFSET(bank_num));
269
270 /* set the state of the pin */
271 zynq_gpio_set_value(chip, pin, state);
272 return 0;
273}
274
275/**
276 * zynq_gpio_irq_mask - Disable the interrupts for a gpio pin
277 * @irq_data: per irq and chip data passed down to chip functions
278 *
279 * This function calculates gpio pin number from irq number and sets the
280 * bit in the Interrupt Disable register of the corresponding bank to disable
281 * interrupts for that pin.
282 */
283static void zynq_gpio_irq_mask(struct irq_data *irq_data)
284{
285 unsigned int device_pin_num, bank_num, bank_pin_num;
286 struct zynq_gpio *gpio = irq_data_get_irq_chip_data(irq_data);
287
288 device_pin_num = irq_data->hwirq;
289 zynq_gpio_get_bank_pin(device_pin_num, &bank_num, &bank_pin_num);
290 writel_relaxed(BIT(bank_pin_num),
291 gpio->base_addr + ZYNQ_GPIO_INTDIS_OFFSET(bank_num));
292}
293
294/**
295 * zynq_gpio_irq_unmask - Enable the interrupts for a gpio pin
296 * @irq_data: irq data containing irq number of gpio pin for the interrupt
297 * to enable
298 *
299 * This function calculates the gpio pin number from irq number and sets the
300 * bit in the Interrupt Enable register of the corresponding bank to enable
301 * interrupts for that pin.
302 */
303static void zynq_gpio_irq_unmask(struct irq_data *irq_data)
304{
305 unsigned int device_pin_num, bank_num, bank_pin_num;
306 struct zynq_gpio *gpio = irq_data_get_irq_chip_data(irq_data);
307
308 device_pin_num = irq_data->hwirq;
309 zynq_gpio_get_bank_pin(device_pin_num, &bank_num, &bank_pin_num);
310 writel_relaxed(BIT(bank_pin_num),
311 gpio->base_addr + ZYNQ_GPIO_INTEN_OFFSET(bank_num));
312}
313
314/**
315 * zynq_gpio_irq_ack - Acknowledge the interrupt of a gpio pin
316 * @irq_data: irq data containing irq number of gpio pin for the interrupt
317 * to ack
318 *
319 * This function calculates gpio pin number from irq number and sets the bit
320 * in the Interrupt Status Register of the corresponding bank, to ACK the irq.
321 */
322static void zynq_gpio_irq_ack(struct irq_data *irq_data)
323{
324 unsigned int device_pin_num, bank_num, bank_pin_num;
325 struct zynq_gpio *gpio = irq_data_get_irq_chip_data(irq_data);
326
327 device_pin_num = irq_data->hwirq;
328 zynq_gpio_get_bank_pin(device_pin_num, &bank_num, &bank_pin_num);
329 writel_relaxed(BIT(bank_pin_num),
330 gpio->base_addr + ZYNQ_GPIO_INTSTS_OFFSET(bank_num));
331}
332
333/**
334 * zynq_gpio_irq_enable - Enable the interrupts for a gpio pin
335 * @irq_data: irq data containing irq number of gpio pin for the interrupt
336 * to enable
337 *
338 * Clears the INTSTS bit and unmasks the given interrrupt.
339 */
340static void zynq_gpio_irq_enable(struct irq_data *irq_data)
341{
342 /*
343 * The Zynq GPIO controller does not disable interrupt detection when
344 * the interrupt is masked and only disables the propagation of the
345 * interrupt. This means when the controller detects an interrupt
346 * condition while the interrupt is logically disabled it will propagate
347 * that interrupt event once the interrupt is enabled. This will cause
348 * the interrupt consumer to see spurious interrupts to prevent this
349 * first make sure that the interrupt is not asserted and then enable
350 * it.
351 */
352 zynq_gpio_irq_ack(irq_data);
353 zynq_gpio_irq_unmask(irq_data);
354}
355
356/**
357 * zynq_gpio_set_irq_type - Set the irq type for a gpio pin
358 * @irq_data: irq data containing irq number of gpio pin
359 * @type: interrupt type that is to be set for the gpio pin
360 *
361 * This function gets the gpio pin number and its bank from the gpio pin number
362 * and configures the INT_TYPE, INT_POLARITY and INT_ANY registers.
363 *
364 * Return: 0, negative error otherwise.
365 * TYPE-EDGE_RISING, INT_TYPE - 1, INT_POLARITY - 1, INT_ANY - 0;
366 * TYPE-EDGE_FALLING, INT_TYPE - 1, INT_POLARITY - 0, INT_ANY - 0;
367 * TYPE-EDGE_BOTH, INT_TYPE - 1, INT_POLARITY - NA, INT_ANY - 1;
368 * TYPE-LEVEL_HIGH, INT_TYPE - 0, INT_POLARITY - 1, INT_ANY - NA;
369 * TYPE-LEVEL_LOW, INT_TYPE - 0, INT_POLARITY - 0, INT_ANY - NA
370 */
371static int zynq_gpio_set_irq_type(struct irq_data *irq_data, unsigned int type)
372{
373 u32 int_type, int_pol, int_any;
374 unsigned int device_pin_num, bank_num, bank_pin_num;
375 struct zynq_gpio *gpio = irq_data_get_irq_chip_data(irq_data);
376
377 device_pin_num = irq_data->hwirq;
378 zynq_gpio_get_bank_pin(device_pin_num, &bank_num, &bank_pin_num);
379
380 int_type = readl_relaxed(gpio->base_addr +
381 ZYNQ_GPIO_INTTYPE_OFFSET(bank_num));
382 int_pol = readl_relaxed(gpio->base_addr +
383 ZYNQ_GPIO_INTPOL_OFFSET(bank_num));
384 int_any = readl_relaxed(gpio->base_addr +
385 ZYNQ_GPIO_INTANY_OFFSET(bank_num));
386
387 /*
388 * based on the type requested, configure the INT_TYPE, INT_POLARITY
389 * and INT_ANY registers
390 */
391 switch (type) {
392 case IRQ_TYPE_EDGE_RISING:
393 int_type |= BIT(bank_pin_num);
394 int_pol |= BIT(bank_pin_num);
395 int_any &= ~BIT(bank_pin_num);
396 break;
397 case IRQ_TYPE_EDGE_FALLING:
398 int_type |= BIT(bank_pin_num);
399 int_pol &= ~BIT(bank_pin_num);
400 int_any &= ~BIT(bank_pin_num);
401 break;
402 case IRQ_TYPE_EDGE_BOTH:
403 int_type |= BIT(bank_pin_num);
404 int_any |= BIT(bank_pin_num);
405 break;
406 case IRQ_TYPE_LEVEL_HIGH:
407 int_type &= ~BIT(bank_pin_num);
408 int_pol |= BIT(bank_pin_num);
409 break;
410 case IRQ_TYPE_LEVEL_LOW:
411 int_type &= ~BIT(bank_pin_num);
412 int_pol &= ~BIT(bank_pin_num);
413 break;
414 default:
415 return -EINVAL;
416 }
417
418 writel_relaxed(int_type,
419 gpio->base_addr + ZYNQ_GPIO_INTTYPE_OFFSET(bank_num));
420 writel_relaxed(int_pol,
421 gpio->base_addr + ZYNQ_GPIO_INTPOL_OFFSET(bank_num));
422 writel_relaxed(int_any,
423 gpio->base_addr + ZYNQ_GPIO_INTANY_OFFSET(bank_num));
424
425 if (type & IRQ_TYPE_LEVEL_MASK) {
426 __irq_set_chip_handler_name_locked(irq_data->irq,
427 &zynq_gpio_level_irqchip, handle_fasteoi_irq, NULL);
428 } else {
429 __irq_set_chip_handler_name_locked(irq_data->irq,
430 &zynq_gpio_edge_irqchip, handle_level_irq, NULL);
431 }
432
433 return 0;
434}
435
436static int zynq_gpio_set_wake(struct irq_data *data, unsigned int on)
437{
438 struct zynq_gpio *gpio = irq_data_get_irq_chip_data(data);
439
440 irq_set_irq_wake(gpio->irq, on);
441
442 return 0;
443}
444
445/* irq chip descriptor */
446static struct irq_chip zynq_gpio_level_irqchip = {
447 .name = DRIVER_NAME,
448 .irq_enable = zynq_gpio_irq_enable,
449 .irq_eoi = zynq_gpio_irq_ack,
450 .irq_mask = zynq_gpio_irq_mask,
451 .irq_unmask = zynq_gpio_irq_unmask,
452 .irq_set_type = zynq_gpio_set_irq_type,
453 .irq_set_wake = zynq_gpio_set_wake,
454 .flags = IRQCHIP_EOI_THREADED | IRQCHIP_EOI_IF_HANDLED |
455 IRQCHIP_MASK_ON_SUSPEND,
456};
457
458static struct irq_chip zynq_gpio_edge_irqchip = {
459 .name = DRIVER_NAME,
460 .irq_enable = zynq_gpio_irq_enable,
461 .irq_ack = zynq_gpio_irq_ack,
462 .irq_mask = zynq_gpio_irq_mask,
463 .irq_unmask = zynq_gpio_irq_unmask,
464 .irq_set_type = zynq_gpio_set_irq_type,
465 .irq_set_wake = zynq_gpio_set_wake,
466 .flags = IRQCHIP_MASK_ON_SUSPEND,
467};
468
469static void zynq_gpio_handle_bank_irq(struct zynq_gpio *gpio,
470 unsigned int bank_num,
471 unsigned long pending)
472{
473 unsigned int bank_offset = zynq_gpio_bank_offset[bank_num];
474 struct irq_domain *irqdomain = gpio->chip.irqdomain;
475 int offset;
476
477 if (!pending)
478 return;
479
480 for_each_set_bit(offset, &pending, 32) {
481 unsigned int gpio_irq;
482
483 gpio_irq = irq_find_mapping(irqdomain, offset + bank_offset);
484 generic_handle_irq(gpio_irq);
485 }
486}
487
488/**
489 * zynq_gpio_irqhandler - IRQ handler for the gpio banks of a gpio device
490 * @irq: irq number of the gpio bank where interrupt has occurred
491 * @desc: irq descriptor instance of the 'irq'
492 *
493 * This function reads the Interrupt Status Register of each bank to get the
494 * gpio pin number which has triggered an interrupt. It then acks the triggered
495 * interrupt and calls the pin specific handler set by the higher layer
496 * application for that pin.
497 * Note: A bug is reported if no handler is set for the gpio pin.
498 */
499static void zynq_gpio_irqhandler(unsigned int irq, struct irq_desc *desc)
500{
501 u32 int_sts, int_enb;
502 unsigned int bank_num;
503 struct zynq_gpio *gpio = irq_get_handler_data(irq);
504 struct irq_chip *irqchip = irq_desc_get_chip(desc);
505
506 chained_irq_enter(irqchip, desc);
507
508 for (bank_num = 0; bank_num < ZYNQ_GPIO_MAX_BANK; bank_num++) {
509 int_sts = readl_relaxed(gpio->base_addr +
510 ZYNQ_GPIO_INTSTS_OFFSET(bank_num));
511 int_enb = readl_relaxed(gpio->base_addr +
512 ZYNQ_GPIO_INTMASK_OFFSET(bank_num));
513 zynq_gpio_handle_bank_irq(gpio, bank_num, int_sts & ~int_enb);
514 }
515
516 chained_irq_exit(irqchip, desc);
517}
518
519static int __maybe_unused zynq_gpio_suspend(struct device *dev)
520{
521 struct platform_device *pdev = to_platform_device(dev);
522 int irq = platform_get_irq(pdev, 0);
523 struct irq_data *data = irq_get_irq_data(irq);
524
525 if (!irqd_is_wakeup_set(data))
526 return pm_runtime_force_suspend(dev);
527
528 return 0;
529}
530
531static int __maybe_unused zynq_gpio_resume(struct device *dev)
532{
533 struct platform_device *pdev = to_platform_device(dev);
534 int irq = platform_get_irq(pdev, 0);
535 struct irq_data *data = irq_get_irq_data(irq);
536
537 if (!irqd_is_wakeup_set(data))
538 return pm_runtime_force_resume(dev);
539
540 return 0;
541}
542
543static int __maybe_unused zynq_gpio_runtime_suspend(struct device *dev)
544{
545 struct platform_device *pdev = to_platform_device(dev);
546 struct zynq_gpio *gpio = platform_get_drvdata(pdev);
547
548 clk_disable_unprepare(gpio->clk);
549
550 return 0;
551}
552
553static int __maybe_unused zynq_gpio_runtime_resume(struct device *dev)
554{
555 struct platform_device *pdev = to_platform_device(dev);
556 struct zynq_gpio *gpio = platform_get_drvdata(pdev);
557
558 return clk_prepare_enable(gpio->clk);
559}
560
561static int zynq_gpio_request(struct gpio_chip *chip, unsigned offset)
562{
563 int ret;
564
565 ret = pm_runtime_get_sync(chip->dev);
566
567 /*
568 * If the device is already active pm_runtime_get() will return 1 on
569 * success, but gpio_request still needs to return 0.
570 */
571 return ret < 0 ? ret : 0;
572}
573
574static void zynq_gpio_free(struct gpio_chip *chip, unsigned offset)
575{
576 pm_runtime_put(chip->dev);
577}
578
579static const struct dev_pm_ops zynq_gpio_dev_pm_ops = {
580 SET_SYSTEM_SLEEP_PM_OPS(zynq_gpio_suspend, zynq_gpio_resume)
581 SET_PM_RUNTIME_PM_OPS(zynq_gpio_runtime_suspend,
582 zynq_gpio_runtime_resume, NULL)
583};
584
585/**
586 * zynq_gpio_probe - Initialization method for a zynq_gpio device
587 * @pdev: platform device instance
588 *
589 * This function allocates memory resources for the gpio device and registers
590 * all the banks of the device. It will also set up interrupts for the gpio
591 * pins.
592 * Note: Interrupts are disabled for all the banks during initialization.
593 *
594 * Return: 0 on success, negative error otherwise.
595 */
596static int zynq_gpio_probe(struct platform_device *pdev)
597{
598 int ret, bank_num;
599 struct zynq_gpio *gpio;
600 struct gpio_chip *chip;
601 struct resource *res;
602
603 gpio = devm_kzalloc(&pdev->dev, sizeof(*gpio), GFP_KERNEL);
604 if (!gpio)
605 return -ENOMEM;
606
607 platform_set_drvdata(pdev, gpio);
608
609 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
610 gpio->base_addr = devm_ioremap_resource(&pdev->dev, res);
611 if (IS_ERR(gpio->base_addr))
612 return PTR_ERR(gpio->base_addr);
613
614 gpio->irq = platform_get_irq(pdev, 0);
615 if (gpio->irq < 0) {
616 dev_err(&pdev->dev, "invalid IRQ\n");
617 return gpio->irq;
618 }
619
620 /* configure the gpio chip */
621 chip = &gpio->chip;
622 chip->label = "zynq_gpio";
623 chip->owner = THIS_MODULE;
624 chip->dev = &pdev->dev;
625 chip->get = zynq_gpio_get_value;
626 chip->set = zynq_gpio_set_value;
627 chip->request = zynq_gpio_request;
628 chip->free = zynq_gpio_free;
629 chip->direction_input = zynq_gpio_dir_in;
630 chip->direction_output = zynq_gpio_dir_out;
631 chip->base = -1;
632 chip->ngpio = ZYNQ_GPIO_NR_GPIOS;
633
634 /* Enable GPIO clock */
635 gpio->clk = devm_clk_get(&pdev->dev, NULL);
636 if (IS_ERR(gpio->clk)) {
637 dev_err(&pdev->dev, "input clock not found.\n");
638 return PTR_ERR(gpio->clk);
639 }
640 ret = clk_prepare_enable(gpio->clk);
641 if (ret) {
642 dev_err(&pdev->dev, "Unable to enable clock.\n");
643 return ret;
644 }
645
646 /* report a bug if gpio chip registration fails */
647 ret = gpiochip_add(chip);
648 if (ret) {
649 dev_err(&pdev->dev, "Failed to add gpio chip\n");
650 goto err_disable_clk;
651 }
652
653 /* disable interrupts for all banks */
654 for (bank_num = 0; bank_num < ZYNQ_GPIO_MAX_BANK; bank_num++)
655 writel_relaxed(ZYNQ_GPIO_IXR_DISABLE_ALL, gpio->base_addr +
656 ZYNQ_GPIO_INTDIS_OFFSET(bank_num));
657
658 ret = gpiochip_irqchip_add(chip, &zynq_gpio_edge_irqchip, 0,
659 handle_level_irq, IRQ_TYPE_NONE);
660 if (ret) {
661 dev_err(&pdev->dev, "Failed to add irq chip\n");
662 goto err_rm_gpiochip;
663 }
664
665 gpiochip_set_chained_irqchip(chip, &zynq_gpio_edge_irqchip, gpio->irq,
666 zynq_gpio_irqhandler);
667
668 pm_runtime_set_active(&pdev->dev);
669 pm_runtime_enable(&pdev->dev);
670
671 return 0;
672
673err_rm_gpiochip:
674 gpiochip_remove(chip);
675err_disable_clk:
676 clk_disable_unprepare(gpio->clk);
677
678 return ret;
679}
680
681/**
682 * zynq_gpio_remove - Driver removal function
683 * @pdev: platform device instance
684 *
685 * Return: 0 always
686 */
687static int zynq_gpio_remove(struct platform_device *pdev)
688{
689 struct zynq_gpio *gpio = platform_get_drvdata(pdev);
690
691 pm_runtime_get_sync(&pdev->dev);
692 gpiochip_remove(&gpio->chip);
693 clk_disable_unprepare(gpio->clk);
694 device_set_wakeup_capable(&pdev->dev, 0);
695 return 0;
696}
697
698static struct of_device_id zynq_gpio_of_match[] = {
699 { .compatible = "xlnx,zynq-gpio-1.0", },
700 { /* end of table */ }
701};
702MODULE_DEVICE_TABLE(of, zynq_gpio_of_match);
703
704static struct platform_driver zynq_gpio_driver = {
705 .driver = {
706 .name = DRIVER_NAME,
707 .pm = &zynq_gpio_dev_pm_ops,
708 .of_match_table = zynq_gpio_of_match,
709 },
710 .probe = zynq_gpio_probe,
711 .remove = zynq_gpio_remove,
712};
713
714/**
715 * zynq_gpio_init - Initial driver registration call
716 *
717 * Return: value from platform_driver_register
718 */
719static int __init zynq_gpio_init(void)
720{
721 return platform_driver_register(&zynq_gpio_driver);
722}
723postcore_initcall(zynq_gpio_init);
724
725MODULE_AUTHOR("Xilinx Inc.");
726MODULE_DESCRIPTION("Zynq GPIO driver");
727MODULE_LICENSE("GPL");
diff --git a/drivers/gpio/gpiolib-acpi.c b/drivers/gpio/gpiolib-acpi.c
index 4a987917c186..05c6275da224 100644
--- a/drivers/gpio/gpiolib-acpi.c
+++ b/drivers/gpio/gpiolib-acpi.c
@@ -25,10 +25,12 @@ struct acpi_gpio_event {
25 acpi_handle handle; 25 acpi_handle handle;
26 unsigned int pin; 26 unsigned int pin;
27 unsigned int irq; 27 unsigned int irq;
28 struct gpio_desc *desc;
28}; 29};
29 30
30struct acpi_gpio_connection { 31struct acpi_gpio_connection {
31 struct list_head node; 32 struct list_head node;
33 unsigned int pin;
32 struct gpio_desc *desc; 34 struct gpio_desc *desc;
33}; 35};
34 36
@@ -143,21 +145,15 @@ static acpi_status acpi_gpiochip_request_interrupt(struct acpi_resource *ares,
143 if (!handler) 145 if (!handler)
144 return AE_BAD_PARAMETER; 146 return AE_BAD_PARAMETER;
145 147
146 desc = gpiochip_get_desc(chip, pin); 148 desc = gpiochip_request_own_desc(chip, pin, "ACPI:Event");
147 if (IS_ERR(desc)) { 149 if (IS_ERR(desc)) {
148 dev_err(chip->dev, "Failed to get GPIO descriptor\n");
149 return AE_ERROR;
150 }
151
152 ret = gpiochip_request_own_desc(desc, "ACPI:Event");
153 if (ret) {
154 dev_err(chip->dev, "Failed to request GPIO\n"); 150 dev_err(chip->dev, "Failed to request GPIO\n");
155 return AE_ERROR; 151 return AE_ERROR;
156 } 152 }
157 153
158 gpiod_direction_input(desc); 154 gpiod_direction_input(desc);
159 155
160 ret = gpiod_lock_as_irq(desc); 156 ret = gpio_lock_as_irq(chip, pin);
161 if (ret) { 157 if (ret) {
162 dev_err(chip->dev, "Failed to lock GPIO as interrupt\n"); 158 dev_err(chip->dev, "Failed to lock GPIO as interrupt\n");
163 goto fail_free_desc; 159 goto fail_free_desc;
@@ -197,6 +193,7 @@ static acpi_status acpi_gpiochip_request_interrupt(struct acpi_resource *ares,
197 event->handle = evt_handle; 193 event->handle = evt_handle;
198 event->irq = irq; 194 event->irq = irq;
199 event->pin = pin; 195 event->pin = pin;
196 event->desc = desc;
200 197
201 ret = request_threaded_irq(event->irq, NULL, handler, irqflags, 198 ret = request_threaded_irq(event->irq, NULL, handler, irqflags,
202 "ACPI:Event", event); 199 "ACPI:Event", event);
@@ -212,7 +209,7 @@ static acpi_status acpi_gpiochip_request_interrupt(struct acpi_resource *ares,
212fail_free_event: 209fail_free_event:
213 kfree(event); 210 kfree(event);
214fail_unlock_irq: 211fail_unlock_irq:
215 gpiod_unlock_as_irq(desc); 212 gpio_unlock_as_irq(chip, pin);
216fail_free_desc: 213fail_free_desc:
217 gpiochip_free_own_desc(desc); 214 gpiochip_free_own_desc(desc);
218 215
@@ -221,7 +218,7 @@ fail_free_desc:
221 218
222/** 219/**
223 * acpi_gpiochip_request_interrupts() - Register isr for gpio chip ACPI events 220 * acpi_gpiochip_request_interrupts() - Register isr for gpio chip ACPI events
224 * @acpi_gpio: ACPI GPIO chip 221 * @chip: GPIO chip
225 * 222 *
226 * ACPI5 platforms can use GPIO signaled ACPI events. These GPIO interrupts are 223 * ACPI5 platforms can use GPIO signaled ACPI events. These GPIO interrupts are
227 * handled by ACPI event methods which need to be called from the GPIO 224 * handled by ACPI event methods which need to be called from the GPIO
@@ -229,11 +226,21 @@ fail_free_desc:
229 * gpio pins have acpi event methods and assigns interrupt handlers that calls 226 * gpio pins have acpi event methods and assigns interrupt handlers that calls
230 * the acpi event methods for those pins. 227 * the acpi event methods for those pins.
231 */ 228 */
232static void acpi_gpiochip_request_interrupts(struct acpi_gpio_chip *acpi_gpio) 229void acpi_gpiochip_request_interrupts(struct gpio_chip *chip)
233{ 230{
234 struct gpio_chip *chip = acpi_gpio->chip; 231 struct acpi_gpio_chip *acpi_gpio;
232 acpi_handle handle;
233 acpi_status status;
234
235 if (!chip->dev || !chip->to_irq)
236 return;
235 237
236 if (!chip->to_irq) 238 handle = ACPI_HANDLE(chip->dev);
239 if (!handle)
240 return;
241
242 status = acpi_get_data(handle, acpi_gpio_chip_dh, (void **)&acpi_gpio);
243 if (ACPI_FAILURE(status))
237 return; 244 return;
238 245
239 INIT_LIST_HEAD(&acpi_gpio->events); 246 INIT_LIST_HEAD(&acpi_gpio->events);
@@ -243,27 +250,37 @@ static void acpi_gpiochip_request_interrupts(struct acpi_gpio_chip *acpi_gpio)
243 250
244/** 251/**
245 * acpi_gpiochip_free_interrupts() - Free GPIO ACPI event interrupts. 252 * acpi_gpiochip_free_interrupts() - Free GPIO ACPI event interrupts.
246 * @acpi_gpio: ACPI GPIO chip 253 * @chip: GPIO chip
247 * 254 *
248 * Free interrupts associated with GPIO ACPI event method for the given 255 * Free interrupts associated with GPIO ACPI event method for the given
249 * GPIO chip. 256 * GPIO chip.
250 */ 257 */
251static void acpi_gpiochip_free_interrupts(struct acpi_gpio_chip *acpi_gpio) 258void acpi_gpiochip_free_interrupts(struct gpio_chip *chip)
252{ 259{
260 struct acpi_gpio_chip *acpi_gpio;
253 struct acpi_gpio_event *event, *ep; 261 struct acpi_gpio_event *event, *ep;
254 struct gpio_chip *chip = acpi_gpio->chip; 262 acpi_handle handle;
263 acpi_status status;
264
265 if (!chip->dev || !chip->to_irq)
266 return;
267
268 handle = ACPI_HANDLE(chip->dev);
269 if (!handle)
270 return;
255 271
256 if (!chip->to_irq) 272 status = acpi_get_data(handle, acpi_gpio_chip_dh, (void **)&acpi_gpio);
273 if (ACPI_FAILURE(status))
257 return; 274 return;
258 275
259 list_for_each_entry_safe_reverse(event, ep, &acpi_gpio->events, node) { 276 list_for_each_entry_safe_reverse(event, ep, &acpi_gpio->events, node) {
260 struct gpio_desc *desc; 277 struct gpio_desc *desc;
261 278
262 free_irq(event->irq, event); 279 free_irq(event->irq, event);
263 desc = gpiochip_get_desc(chip, event->pin); 280 desc = event->desc;
264 if (WARN_ON(IS_ERR(desc))) 281 if (WARN_ON(IS_ERR(desc)))
265 continue; 282 continue;
266 gpiod_unlock_as_irq(desc); 283 gpio_unlock_as_irq(chip, event->pin);
267 gpiochip_free_own_desc(desc); 284 gpiochip_free_own_desc(desc);
268 list_del(&event->node); 285 list_del(&event->node);
269 kfree(event); 286 kfree(event);
@@ -357,8 +374,10 @@ acpi_gpio_adr_space_handler(u32 function, acpi_physical_address address,
357 struct gpio_chip *chip = achip->chip; 374 struct gpio_chip *chip = achip->chip;
358 struct acpi_resource_gpio *agpio; 375 struct acpi_resource_gpio *agpio;
359 struct acpi_resource *ares; 376 struct acpi_resource *ares;
377 int pin_index = (int)address;
360 acpi_status status; 378 acpi_status status;
361 bool pull_up; 379 bool pull_up;
380 int length;
362 int i; 381 int i;
363 382
364 status = acpi_buffer_to_resource(achip->conn_info.connection, 383 status = acpi_buffer_to_resource(achip->conn_info.connection,
@@ -380,32 +399,27 @@ acpi_gpio_adr_space_handler(u32 function, acpi_physical_address address,
380 return AE_BAD_PARAMETER; 399 return AE_BAD_PARAMETER;
381 } 400 }
382 401
383 for (i = 0; i < agpio->pin_table_length; i++) { 402 length = min(agpio->pin_table_length, (u16)(pin_index + bits));
403 for (i = pin_index; i < length; ++i) {
384 unsigned pin = agpio->pin_table[i]; 404 unsigned pin = agpio->pin_table[i];
385 struct acpi_gpio_connection *conn; 405 struct acpi_gpio_connection *conn;
386 struct gpio_desc *desc; 406 struct gpio_desc *desc;
387 bool found; 407 bool found;
388 408
389 desc = gpiochip_get_desc(chip, pin);
390 if (IS_ERR(desc)) {
391 status = AE_ERROR;
392 goto out;
393 }
394
395 mutex_lock(&achip->conn_lock); 409 mutex_lock(&achip->conn_lock);
396 410
397 found = false; 411 found = false;
398 list_for_each_entry(conn, &achip->conns, node) { 412 list_for_each_entry(conn, &achip->conns, node) {
399 if (conn->desc == desc) { 413 if (conn->pin == pin) {
400 found = true; 414 found = true;
415 desc = conn->desc;
401 break; 416 break;
402 } 417 }
403 } 418 }
404 if (!found) { 419 if (!found) {
405 int ret; 420 desc = gpiochip_request_own_desc(chip, pin,
406 421 "ACPI:OpRegion");
407 ret = gpiochip_request_own_desc(desc, "ACPI:OpRegion"); 422 if (IS_ERR(desc)) {
408 if (ret) {
409 status = AE_ERROR; 423 status = AE_ERROR;
410 mutex_unlock(&achip->conn_lock); 424 mutex_unlock(&achip->conn_lock);
411 goto out; 425 goto out;
@@ -442,6 +456,7 @@ acpi_gpio_adr_space_handler(u32 function, acpi_physical_address address,
442 goto out; 456 goto out;
443 } 457 }
444 458
459 conn->pin = pin;
445 conn->desc = desc; 460 conn->desc = desc;
446 list_add_tail(&conn->node, &achip->conns); 461 list_add_tail(&conn->node, &achip->conns);
447 } 462 }
@@ -525,7 +540,6 @@ void acpi_gpiochip_add(struct gpio_chip *chip)
525 return; 540 return;
526 } 541 }
527 542
528 acpi_gpiochip_request_interrupts(acpi_gpio);
529 acpi_gpiochip_request_regions(acpi_gpio); 543 acpi_gpiochip_request_regions(acpi_gpio);
530} 544}
531 545
@@ -549,7 +563,6 @@ void acpi_gpiochip_remove(struct gpio_chip *chip)
549 } 563 }
550 564
551 acpi_gpiochip_free_regions(acpi_gpio); 565 acpi_gpiochip_free_regions(acpi_gpio);
552 acpi_gpiochip_free_interrupts(acpi_gpio);
553 566
554 acpi_detach_data(handle, acpi_gpio_chip_dh); 567 acpi_detach_data(handle, acpi_gpio_chip_dh);
555 kfree(acpi_gpio); 568 kfree(acpi_gpio);
diff --git a/drivers/gpio/gpiolib-legacy.c b/drivers/gpio/gpiolib-legacy.c
new file mode 100644
index 000000000000..078ae6c2df79
--- /dev/null
+++ b/drivers/gpio/gpiolib-legacy.c
@@ -0,0 +1,102 @@
1#include <linux/gpio/consumer.h>
2#include <linux/gpio/driver.h>
3
4#include <linux/gpio.h>
5
6#include "gpiolib.h"
7
8void gpio_free(unsigned gpio)
9{
10 gpiod_free(gpio_to_desc(gpio));
11}
12EXPORT_SYMBOL_GPL(gpio_free);
13
14/**
15 * gpio_request_one - request a single GPIO with initial configuration
16 * @gpio: the GPIO number
17 * @flags: GPIO configuration as specified by GPIOF_*
18 * @label: a literal description string of this GPIO
19 */
20int gpio_request_one(unsigned gpio, unsigned long flags, const char *label)
21{
22 struct gpio_desc *desc;
23 int err;
24
25 desc = gpio_to_desc(gpio);
26
27 err = gpiod_request(desc, label);
28 if (err)
29 return err;
30
31 if (flags & GPIOF_OPEN_DRAIN)
32 set_bit(FLAG_OPEN_DRAIN, &desc->flags);
33
34 if (flags & GPIOF_OPEN_SOURCE)
35 set_bit(FLAG_OPEN_SOURCE, &desc->flags);
36
37 if (flags & GPIOF_ACTIVE_LOW)
38 set_bit(FLAG_ACTIVE_LOW, &desc->flags);
39
40 if (flags & GPIOF_DIR_IN)
41 err = gpiod_direction_input(desc);
42 else
43 err = gpiod_direction_output_raw(desc,
44 (flags & GPIOF_INIT_HIGH) ? 1 : 0);
45
46 if (err)
47 goto free_gpio;
48
49 if (flags & GPIOF_EXPORT) {
50 err = gpiod_export(desc, flags & GPIOF_EXPORT_CHANGEABLE);
51 if (err)
52 goto free_gpio;
53 }
54
55 return 0;
56
57 free_gpio:
58 gpiod_free(desc);
59 return err;
60}
61EXPORT_SYMBOL_GPL(gpio_request_one);
62
63int gpio_request(unsigned gpio, const char *label)
64{
65 return gpiod_request(gpio_to_desc(gpio), label);
66}
67EXPORT_SYMBOL_GPL(gpio_request);
68
69/**
70 * gpio_request_array - request multiple GPIOs in a single call
71 * @array: array of the 'struct gpio'
72 * @num: how many GPIOs in the array
73 */
74int gpio_request_array(const struct gpio *array, size_t num)
75{
76 int i, err;
77
78 for (i = 0; i < num; i++, array++) {
79 err = gpio_request_one(array->gpio, array->flags, array->label);
80 if (err)
81 goto err_free;
82 }
83 return 0;
84
85err_free:
86 while (i--)
87 gpio_free((--array)->gpio);
88 return err;
89}
90EXPORT_SYMBOL_GPL(gpio_request_array);
91
92/**
93 * gpio_free_array - release multiple GPIOs in a single call
94 * @array: array of the 'struct gpio'
95 * @num: how many GPIOs in the array
96 */
97void gpio_free_array(const struct gpio *array, size_t num)
98{
99 while (num--)
100 gpio_free((array++)->gpio);
101}
102EXPORT_SYMBOL_GPL(gpio_free_array);
diff --git a/drivers/gpio/gpiolib-of.c b/drivers/gpio/gpiolib-of.c
index af7e25c9a9ae..604dbe60bdee 100644
--- a/drivers/gpio/gpiolib-of.c
+++ b/drivers/gpio/gpiolib-of.c
@@ -23,7 +23,7 @@
23#include <linux/pinctrl/pinctrl.h> 23#include <linux/pinctrl/pinctrl.h>
24#include <linux/slab.h> 24#include <linux/slab.h>
25 25
26struct gpio_desc; 26#include "gpiolib.h"
27 27
28/* Private data structure for of_gpiochip_find_and_xlate */ 28/* Private data structure for of_gpiochip_find_and_xlate */
29struct gg_data { 29struct gg_data {
@@ -82,19 +82,19 @@ struct gpio_desc *of_get_named_gpiod_flags(struct device_node *np,
82 ret = of_parse_phandle_with_args(np, propname, "#gpio-cells", index, 82 ret = of_parse_phandle_with_args(np, propname, "#gpio-cells", index,
83 &gg_data.gpiospec); 83 &gg_data.gpiospec);
84 if (ret) { 84 if (ret) {
85 pr_debug("%s: can't parse gpios property of node '%s[%d]'\n", 85 pr_debug("%s: can't parse '%s' property of node '%s[%d]'\n",
86 __func__, np->full_name, index); 86 __func__, propname, np->full_name, index);
87 return ERR_PTR(ret); 87 return ERR_PTR(ret);
88 } 88 }
89 89
90 gpiochip_find(&gg_data, of_gpiochip_find_and_xlate); 90 gpiochip_find(&gg_data, of_gpiochip_find_and_xlate);
91 91
92 of_node_put(gg_data.gpiospec.np); 92 of_node_put(gg_data.gpiospec.np);
93 pr_debug("%s exited with status %d\n", __func__, 93 pr_debug("%s: parsed '%s' property of node '%s[%d]' - status (%d)\n",
94 __func__, propname, np->full_name, index,
94 PTR_ERR_OR_ZERO(gg_data.out_gpio)); 95 PTR_ERR_OR_ZERO(gg_data.out_gpio));
95 return gg_data.out_gpio; 96 return gg_data.out_gpio;
96} 97}
97EXPORT_SYMBOL(of_get_named_gpiod_flags);
98 98
99int of_get_named_gpio_flags(struct device_node *np, const char *list_name, 99int of_get_named_gpio_flags(struct device_node *np, const char *list_name,
100 int index, enum of_gpio_flags *flags) 100 int index, enum of_gpio_flags *flags)
@@ -307,7 +307,5 @@ void of_gpiochip_add(struct gpio_chip *chip)
307void of_gpiochip_remove(struct gpio_chip *chip) 307void of_gpiochip_remove(struct gpio_chip *chip)
308{ 308{
309 gpiochip_remove_pin_ranges(chip); 309 gpiochip_remove_pin_ranges(chip);
310 310 of_node_put(chip->of_node);
311 if (chip->of_node)
312 of_node_put(chip->of_node);
313} 311}
diff --git a/drivers/gpio/gpiolib-sysfs.c b/drivers/gpio/gpiolib-sysfs.c
new file mode 100644
index 000000000000..5f2150b619a7
--- /dev/null
+++ b/drivers/gpio/gpiolib-sysfs.c
@@ -0,0 +1,827 @@
1#include <linux/idr.h>
2#include <linux/mutex.h>
3#include <linux/device.h>
4#include <linux/sysfs.h>
5#include <linux/gpio/consumer.h>
6#include <linux/gpio/driver.h>
7#include <linux/interrupt.h>
8#include <linux/kdev_t.h>
9
10#include "gpiolib.h"
11
12static DEFINE_IDR(dirent_idr);
13
14
15/* lock protects against unexport_gpio() being called while
16 * sysfs files are active.
17 */
18static DEFINE_MUTEX(sysfs_lock);
19
20/*
21 * /sys/class/gpio/gpioN... only for GPIOs that are exported
22 * /direction
23 * * MAY BE OMITTED if kernel won't allow direction changes
24 * * is read/write as "in" or "out"
25 * * may also be written as "high" or "low", initializing
26 * output value as specified ("out" implies "low")
27 * /value
28 * * always readable, subject to hardware behavior
29 * * may be writable, as zero/nonzero
30 * /edge
31 * * configures behavior of poll(2) on /value
32 * * available only if pin can generate IRQs on input
33 * * is read/write as "none", "falling", "rising", or "both"
34 * /active_low
35 * * configures polarity of /value
36 * * is read/write as zero/nonzero
37 * * also affects existing and subsequent "falling" and "rising"
38 * /edge configuration
39 */
40
41static ssize_t gpio_direction_show(struct device *dev,
42 struct device_attribute *attr, char *buf)
43{
44 const struct gpio_desc *desc = dev_get_drvdata(dev);
45 ssize_t status;
46
47 mutex_lock(&sysfs_lock);
48
49 if (!test_bit(FLAG_EXPORT, &desc->flags)) {
50 status = -EIO;
51 } else {
52 gpiod_get_direction(desc);
53 status = sprintf(buf, "%s\n",
54 test_bit(FLAG_IS_OUT, &desc->flags)
55 ? "out" : "in");
56 }
57
58 mutex_unlock(&sysfs_lock);
59 return status;
60}
61
62static ssize_t gpio_direction_store(struct device *dev,
63 struct device_attribute *attr, const char *buf, size_t size)
64{
65 struct gpio_desc *desc = dev_get_drvdata(dev);
66 ssize_t status;
67
68 mutex_lock(&sysfs_lock);
69
70 if (!test_bit(FLAG_EXPORT, &desc->flags))
71 status = -EIO;
72 else if (sysfs_streq(buf, "high"))
73 status = gpiod_direction_output_raw(desc, 1);
74 else if (sysfs_streq(buf, "out") || sysfs_streq(buf, "low"))
75 status = gpiod_direction_output_raw(desc, 0);
76 else if (sysfs_streq(buf, "in"))
77 status = gpiod_direction_input(desc);
78 else
79 status = -EINVAL;
80
81 mutex_unlock(&sysfs_lock);
82 return status ? : size;
83}
84
85static /* const */ DEVICE_ATTR(direction, 0644,
86 gpio_direction_show, gpio_direction_store);
87
88static ssize_t gpio_value_show(struct device *dev,
89 struct device_attribute *attr, char *buf)
90{
91 struct gpio_desc *desc = dev_get_drvdata(dev);
92 ssize_t status;
93
94 mutex_lock(&sysfs_lock);
95
96 if (!test_bit(FLAG_EXPORT, &desc->flags))
97 status = -EIO;
98 else
99 status = sprintf(buf, "%d\n", gpiod_get_value_cansleep(desc));
100
101 mutex_unlock(&sysfs_lock);
102 return status;
103}
104
105static ssize_t gpio_value_store(struct device *dev,
106 struct device_attribute *attr, const char *buf, size_t size)
107{
108 struct gpio_desc *desc = dev_get_drvdata(dev);
109 ssize_t status;
110
111 mutex_lock(&sysfs_lock);
112
113 if (!test_bit(FLAG_EXPORT, &desc->flags))
114 status = -EIO;
115 else if (!test_bit(FLAG_IS_OUT, &desc->flags))
116 status = -EPERM;
117 else {
118 long value;
119
120 status = kstrtol(buf, 0, &value);
121 if (status == 0) {
122 gpiod_set_value_cansleep(desc, value);
123 status = size;
124 }
125 }
126
127 mutex_unlock(&sysfs_lock);
128 return status;
129}
130
131static const DEVICE_ATTR(value, 0644,
132 gpio_value_show, gpio_value_store);
133
134static irqreturn_t gpio_sysfs_irq(int irq, void *priv)
135{
136 struct kernfs_node *value_sd = priv;
137
138 sysfs_notify_dirent(value_sd);
139 return IRQ_HANDLED;
140}
141
142static int gpio_setup_irq(struct gpio_desc *desc, struct device *dev,
143 unsigned long gpio_flags)
144{
145 struct kernfs_node *value_sd;
146 unsigned long irq_flags;
147 int ret, irq, id;
148
149 if ((desc->flags & GPIO_TRIGGER_MASK) == gpio_flags)
150 return 0;
151
152 irq = gpiod_to_irq(desc);
153 if (irq < 0)
154 return -EIO;
155
156 id = desc->flags >> ID_SHIFT;
157 value_sd = idr_find(&dirent_idr, id);
158 if (value_sd)
159 free_irq(irq, value_sd);
160
161 desc->flags &= ~GPIO_TRIGGER_MASK;
162
163 if (!gpio_flags) {
164 gpio_unlock_as_irq(desc->chip, gpio_chip_hwgpio(desc));
165 ret = 0;
166 goto free_id;
167 }
168
169 irq_flags = IRQF_SHARED;
170 if (test_bit(FLAG_TRIG_FALL, &gpio_flags))
171 irq_flags |= test_bit(FLAG_ACTIVE_LOW, &desc->flags) ?
172 IRQF_TRIGGER_RISING : IRQF_TRIGGER_FALLING;
173 if (test_bit(FLAG_TRIG_RISE, &gpio_flags))
174 irq_flags |= test_bit(FLAG_ACTIVE_LOW, &desc->flags) ?
175 IRQF_TRIGGER_FALLING : IRQF_TRIGGER_RISING;
176
177 if (!value_sd) {
178 value_sd = sysfs_get_dirent(dev->kobj.sd, "value");
179 if (!value_sd) {
180 ret = -ENODEV;
181 goto err_out;
182 }
183
184 ret = idr_alloc(&dirent_idr, value_sd, 1, 0, GFP_KERNEL);
185 if (ret < 0)
186 goto free_sd;
187 id = ret;
188
189 desc->flags &= GPIO_FLAGS_MASK;
190 desc->flags |= (unsigned long)id << ID_SHIFT;
191
192 if (desc->flags >> ID_SHIFT != id) {
193 ret = -ERANGE;
194 goto free_id;
195 }
196 }
197
198 ret = request_any_context_irq(irq, gpio_sysfs_irq, irq_flags,
199 "gpiolib", value_sd);
200 if (ret < 0)
201 goto free_id;
202
203 ret = gpio_lock_as_irq(desc->chip, gpio_chip_hwgpio(desc));
204 if (ret < 0) {
205 gpiod_warn(desc, "failed to flag the GPIO for IRQ\n");
206 goto free_id;
207 }
208
209 desc->flags |= gpio_flags;
210 return 0;
211
212free_id:
213 idr_remove(&dirent_idr, id);
214 desc->flags &= GPIO_FLAGS_MASK;
215free_sd:
216 if (value_sd)
217 sysfs_put(value_sd);
218err_out:
219 return ret;
220}
221
222static const struct {
223 const char *name;
224 unsigned long flags;
225} trigger_types[] = {
226 { "none", 0 },
227 { "falling", BIT(FLAG_TRIG_FALL) },
228 { "rising", BIT(FLAG_TRIG_RISE) },
229 { "both", BIT(FLAG_TRIG_FALL) | BIT(FLAG_TRIG_RISE) },
230};
231
232static ssize_t gpio_edge_show(struct device *dev,
233 struct device_attribute *attr, char *buf)
234{
235 const struct gpio_desc *desc = dev_get_drvdata(dev);
236 ssize_t status;
237
238 mutex_lock(&sysfs_lock);
239
240 if (!test_bit(FLAG_EXPORT, &desc->flags))
241 status = -EIO;
242 else {
243 int i;
244
245 status = 0;
246 for (i = 0; i < ARRAY_SIZE(trigger_types); i++)
247 if ((desc->flags & GPIO_TRIGGER_MASK)
248 == trigger_types[i].flags) {
249 status = sprintf(buf, "%s\n",
250 trigger_types[i].name);
251 break;
252 }
253 }
254
255 mutex_unlock(&sysfs_lock);
256 return status;
257}
258
259static ssize_t gpio_edge_store(struct device *dev,
260 struct device_attribute *attr, const char *buf, size_t size)
261{
262 struct gpio_desc *desc = dev_get_drvdata(dev);
263 ssize_t status;
264 int i;
265
266 for (i = 0; i < ARRAY_SIZE(trigger_types); i++)
267 if (sysfs_streq(trigger_types[i].name, buf))
268 goto found;
269 return -EINVAL;
270
271found:
272 mutex_lock(&sysfs_lock);
273
274 if (!test_bit(FLAG_EXPORT, &desc->flags))
275 status = -EIO;
276 else {
277 status = gpio_setup_irq(desc, dev, trigger_types[i].flags);
278 if (!status)
279 status = size;
280 }
281
282 mutex_unlock(&sysfs_lock);
283
284 return status;
285}
286
287static DEVICE_ATTR(edge, 0644, gpio_edge_show, gpio_edge_store);
288
289static int sysfs_set_active_low(struct gpio_desc *desc, struct device *dev,
290 int value)
291{
292 int status = 0;
293
294 if (!!test_bit(FLAG_ACTIVE_LOW, &desc->flags) == !!value)
295 return 0;
296
297 if (value)
298 set_bit(FLAG_ACTIVE_LOW, &desc->flags);
299 else
300 clear_bit(FLAG_ACTIVE_LOW, &desc->flags);
301
302 /* reconfigure poll(2) support if enabled on one edge only */
303 if (dev != NULL && (!!test_bit(FLAG_TRIG_RISE, &desc->flags) ^
304 !!test_bit(FLAG_TRIG_FALL, &desc->flags))) {
305 unsigned long trigger_flags = desc->flags & GPIO_TRIGGER_MASK;
306
307 gpio_setup_irq(desc, dev, 0);
308 status = gpio_setup_irq(desc, dev, trigger_flags);
309 }
310
311 return status;
312}
313
314static ssize_t gpio_active_low_show(struct device *dev,
315 struct device_attribute *attr, char *buf)
316{
317 const struct gpio_desc *desc = dev_get_drvdata(dev);
318 ssize_t status;
319
320 mutex_lock(&sysfs_lock);
321
322 if (!test_bit(FLAG_EXPORT, &desc->flags))
323 status = -EIO;
324 else
325 status = sprintf(buf, "%d\n",
326 !!test_bit(FLAG_ACTIVE_LOW, &desc->flags));
327
328 mutex_unlock(&sysfs_lock);
329
330 return status;
331}
332
333static ssize_t gpio_active_low_store(struct device *dev,
334 struct device_attribute *attr, const char *buf, size_t size)
335{
336 struct gpio_desc *desc = dev_get_drvdata(dev);
337 ssize_t status;
338
339 mutex_lock(&sysfs_lock);
340
341 if (!test_bit(FLAG_EXPORT, &desc->flags)) {
342 status = -EIO;
343 } else {
344 long value;
345
346 status = kstrtol(buf, 0, &value);
347 if (status == 0)
348 status = sysfs_set_active_low(desc, dev, value != 0);
349 }
350
351 mutex_unlock(&sysfs_lock);
352
353 return status ? : size;
354}
355
356static const DEVICE_ATTR(active_low, 0644,
357 gpio_active_low_show, gpio_active_low_store);
358
359static const struct attribute *gpio_attrs[] = {
360 &dev_attr_value.attr,
361 &dev_attr_active_low.attr,
362 NULL,
363};
364
365static const struct attribute_group gpio_attr_group = {
366 .attrs = (struct attribute **) gpio_attrs,
367};
368
369/*
370 * /sys/class/gpio/gpiochipN/
371 * /base ... matching gpio_chip.base (N)
372 * /label ... matching gpio_chip.label
373 * /ngpio ... matching gpio_chip.ngpio
374 */
375
376static ssize_t chip_base_show(struct device *dev,
377 struct device_attribute *attr, char *buf)
378{
379 const struct gpio_chip *chip = dev_get_drvdata(dev);
380
381 return sprintf(buf, "%d\n", chip->base);
382}
383static DEVICE_ATTR(base, 0444, chip_base_show, NULL);
384
385static ssize_t chip_label_show(struct device *dev,
386 struct device_attribute *attr, char *buf)
387{
388 const struct gpio_chip *chip = dev_get_drvdata(dev);
389
390 return sprintf(buf, "%s\n", chip->label ? : "");
391}
392static DEVICE_ATTR(label, 0444, chip_label_show, NULL);
393
394static ssize_t chip_ngpio_show(struct device *dev,
395 struct device_attribute *attr, char *buf)
396{
397 const struct gpio_chip *chip = dev_get_drvdata(dev);
398
399 return sprintf(buf, "%u\n", chip->ngpio);
400}
401static DEVICE_ATTR(ngpio, 0444, chip_ngpio_show, NULL);
402
403static const struct attribute *gpiochip_attrs[] = {
404 &dev_attr_base.attr,
405 &dev_attr_label.attr,
406 &dev_attr_ngpio.attr,
407 NULL,
408};
409
410static const struct attribute_group gpiochip_attr_group = {
411 .attrs = (struct attribute **) gpiochip_attrs,
412};
413
414/*
415 * /sys/class/gpio/export ... write-only
416 * integer N ... number of GPIO to export (full access)
417 * /sys/class/gpio/unexport ... write-only
418 * integer N ... number of GPIO to unexport
419 */
420static ssize_t export_store(struct class *class,
421 struct class_attribute *attr,
422 const char *buf, size_t len)
423{
424 long gpio;
425 struct gpio_desc *desc;
426 int status;
427
428 status = kstrtol(buf, 0, &gpio);
429 if (status < 0)
430 goto done;
431
432 desc = gpio_to_desc(gpio);
433 /* reject invalid GPIOs */
434 if (!desc) {
435 pr_warn("%s: invalid GPIO %ld\n", __func__, gpio);
436 return -EINVAL;
437 }
438
439 /* No extra locking here; FLAG_SYSFS just signifies that the
440 * request and export were done by on behalf of userspace, so
441 * they may be undone on its behalf too.
442 */
443
444 status = gpiod_request(desc, "sysfs");
445 if (status < 0) {
446 if (status == -EPROBE_DEFER)
447 status = -ENODEV;
448 goto done;
449 }
450 status = gpiod_export(desc, true);
451 if (status < 0)
452 gpiod_free(desc);
453 else
454 set_bit(FLAG_SYSFS, &desc->flags);
455
456done:
457 if (status)
458 pr_debug("%s: status %d\n", __func__, status);
459 return status ? : len;
460}
461
462static ssize_t unexport_store(struct class *class,
463 struct class_attribute *attr,
464 const char *buf, size_t len)
465{
466 long gpio;
467 struct gpio_desc *desc;
468 int status;
469
470 status = kstrtol(buf, 0, &gpio);
471 if (status < 0)
472 goto done;
473
474 desc = gpio_to_desc(gpio);
475 /* reject bogus commands (gpio_unexport ignores them) */
476 if (!desc) {
477 pr_warn("%s: invalid GPIO %ld\n", __func__, gpio);
478 return -EINVAL;
479 }
480
481 status = -EINVAL;
482
483 /* No extra locking here; FLAG_SYSFS just signifies that the
484 * request and export were done by on behalf of userspace, so
485 * they may be undone on its behalf too.
486 */
487 if (test_and_clear_bit(FLAG_SYSFS, &desc->flags)) {
488 status = 0;
489 gpiod_free(desc);
490 }
491done:
492 if (status)
493 pr_debug("%s: status %d\n", __func__, status);
494 return status ? : len;
495}
496
497static struct class_attribute gpio_class_attrs[] = {
498 __ATTR(export, 0200, NULL, export_store),
499 __ATTR(unexport, 0200, NULL, unexport_store),
500 __ATTR_NULL,
501};
502
503static struct class gpio_class = {
504 .name = "gpio",
505 .owner = THIS_MODULE,
506
507 .class_attrs = gpio_class_attrs,
508};
509
510
511/**
512 * gpiod_export - export a GPIO through sysfs
513 * @gpio: gpio to make available, already requested
514 * @direction_may_change: true if userspace may change gpio direction
515 * Context: arch_initcall or later
516 *
517 * When drivers want to make a GPIO accessible to userspace after they
518 * have requested it -- perhaps while debugging, or as part of their
519 * public interface -- they may use this routine. If the GPIO can
520 * change direction (some can't) and the caller allows it, userspace
521 * will see "direction" sysfs attribute which may be used to change
522 * the gpio's direction. A "value" attribute will always be provided.
523 *
524 * Returns zero on success, else an error.
525 */
526int gpiod_export(struct gpio_desc *desc, bool direction_may_change)
527{
528 unsigned long flags;
529 int status;
530 const char *ioname = NULL;
531 struct device *dev;
532 int offset;
533
534 /* can't export until sysfs is available ... */
535 if (!gpio_class.p) {
536 pr_debug("%s: called too early!\n", __func__);
537 return -ENOENT;
538 }
539
540 if (!desc) {
541 pr_debug("%s: invalid gpio descriptor\n", __func__);
542 return -EINVAL;
543 }
544
545 mutex_lock(&sysfs_lock);
546
547 spin_lock_irqsave(&gpio_lock, flags);
548 if (!test_bit(FLAG_REQUESTED, &desc->flags) ||
549 test_bit(FLAG_EXPORT, &desc->flags)) {
550 spin_unlock_irqrestore(&gpio_lock, flags);
551 gpiod_dbg(desc, "%s: unavailable (requested=%d, exported=%d)\n",
552 __func__,
553 test_bit(FLAG_REQUESTED, &desc->flags),
554 test_bit(FLAG_EXPORT, &desc->flags));
555 status = -EPERM;
556 goto fail_unlock;
557 }
558
559 if (!desc->chip->direction_input || !desc->chip->direction_output)
560 direction_may_change = false;
561 spin_unlock_irqrestore(&gpio_lock, flags);
562
563 offset = gpio_chip_hwgpio(desc);
564 if (desc->chip->names && desc->chip->names[offset])
565 ioname = desc->chip->names[offset];
566
567 dev = device_create(&gpio_class, desc->chip->dev, MKDEV(0, 0),
568 desc, ioname ? ioname : "gpio%u",
569 desc_to_gpio(desc));
570 if (IS_ERR(dev)) {
571 status = PTR_ERR(dev);
572 goto fail_unlock;
573 }
574
575 status = sysfs_create_group(&dev->kobj, &gpio_attr_group);
576 if (status)
577 goto fail_unregister_device;
578
579 if (direction_may_change) {
580 status = device_create_file(dev, &dev_attr_direction);
581 if (status)
582 goto fail_unregister_device;
583 }
584
585 if (gpiod_to_irq(desc) >= 0 && (direction_may_change ||
586 !test_bit(FLAG_IS_OUT, &desc->flags))) {
587 status = device_create_file(dev, &dev_attr_edge);
588 if (status)
589 goto fail_unregister_device;
590 }
591
592 set_bit(FLAG_EXPORT, &desc->flags);
593 mutex_unlock(&sysfs_lock);
594 return 0;
595
596fail_unregister_device:
597 device_unregister(dev);
598fail_unlock:
599 mutex_unlock(&sysfs_lock);
600 gpiod_dbg(desc, "%s: status %d\n", __func__, status);
601 return status;
602}
603EXPORT_SYMBOL_GPL(gpiod_export);
604
605static int match_export(struct device *dev, const void *data)
606{
607 return dev_get_drvdata(dev) == data;
608}
609
610/**
611 * gpiod_export_link - create a sysfs link to an exported GPIO node
612 * @dev: device under which to create symlink
613 * @name: name of the symlink
614 * @gpio: gpio to create symlink to, already exported
615 *
616 * Set up a symlink from /sys/.../dev/name to /sys/class/gpio/gpioN
617 * node. Caller is responsible for unlinking.
618 *
619 * Returns zero on success, else an error.
620 */
621int gpiod_export_link(struct device *dev, const char *name,
622 struct gpio_desc *desc)
623{
624 int status = -EINVAL;
625
626 if (!desc) {
627 pr_warn("%s: invalid GPIO\n", __func__);
628 return -EINVAL;
629 }
630
631 mutex_lock(&sysfs_lock);
632
633 if (test_bit(FLAG_EXPORT, &desc->flags)) {
634 struct device *tdev;
635
636 tdev = class_find_device(&gpio_class, NULL, desc, match_export);
637 if (tdev != NULL) {
638 status = sysfs_create_link(&dev->kobj, &tdev->kobj,
639 name);
640 } else {
641 status = -ENODEV;
642 }
643 }
644
645 mutex_unlock(&sysfs_lock);
646
647 if (status)
648 gpiod_dbg(desc, "%s: status %d\n", __func__, status);
649
650 return status;
651}
652EXPORT_SYMBOL_GPL(gpiod_export_link);
653
654/**
655 * gpiod_sysfs_set_active_low - set the polarity of gpio sysfs value
656 * @gpio: gpio to change
657 * @value: non-zero to use active low, i.e. inverted values
658 *
659 * Set the polarity of /sys/class/gpio/gpioN/value sysfs attribute.
660 * The GPIO does not have to be exported yet. If poll(2) support has
661 * been enabled for either rising or falling edge, it will be
662 * reconfigured to follow the new polarity.
663 *
664 * Returns zero on success, else an error.
665 */
666int gpiod_sysfs_set_active_low(struct gpio_desc *desc, int value)
667{
668 struct device *dev = NULL;
669 int status = -EINVAL;
670
671 if (!desc) {
672 pr_warn("%s: invalid GPIO\n", __func__);
673 return -EINVAL;
674 }
675
676 mutex_lock(&sysfs_lock);
677
678 if (test_bit(FLAG_EXPORT, &desc->flags)) {
679 dev = class_find_device(&gpio_class, NULL, desc, match_export);
680 if (dev == NULL) {
681 status = -ENODEV;
682 goto unlock;
683 }
684 }
685
686 status = sysfs_set_active_low(desc, dev, value);
687
688unlock:
689 mutex_unlock(&sysfs_lock);
690
691 if (status)
692 gpiod_dbg(desc, "%s: status %d\n", __func__, status);
693
694 return status;
695}
696EXPORT_SYMBOL_GPL(gpiod_sysfs_set_active_low);
697
698/**
699 * gpiod_unexport - reverse effect of gpio_export()
700 * @gpio: gpio to make unavailable
701 *
702 * This is implicit on gpio_free().
703 */
704void gpiod_unexport(struct gpio_desc *desc)
705{
706 int status = 0;
707 struct device *dev = NULL;
708
709 if (!desc) {
710 pr_warn("%s: invalid GPIO\n", __func__);
711 return;
712 }
713
714 mutex_lock(&sysfs_lock);
715
716 if (test_bit(FLAG_EXPORT, &desc->flags)) {
717
718 dev = class_find_device(&gpio_class, NULL, desc, match_export);
719 if (dev) {
720 gpio_setup_irq(desc, dev, 0);
721 clear_bit(FLAG_EXPORT, &desc->flags);
722 } else
723 status = -ENODEV;
724 }
725
726 mutex_unlock(&sysfs_lock);
727
728 if (dev) {
729 device_unregister(dev);
730 put_device(dev);
731 }
732
733 if (status)
734 gpiod_dbg(desc, "%s: status %d\n", __func__, status);
735}
736EXPORT_SYMBOL_GPL(gpiod_unexport);
737
738int gpiochip_export(struct gpio_chip *chip)
739{
740 int status;
741 struct device *dev;
742
743 /* Many systems register gpio chips for SOC support very early,
744 * before driver model support is available. In those cases we
745 * export this later, in gpiolib_sysfs_init() ... here we just
746 * verify that _some_ field of gpio_class got initialized.
747 */
748 if (!gpio_class.p)
749 return 0;
750
751 /* use chip->base for the ID; it's already known to be unique */
752 mutex_lock(&sysfs_lock);
753 dev = device_create(&gpio_class, chip->dev, MKDEV(0, 0), chip,
754 "gpiochip%d", chip->base);
755 if (!IS_ERR(dev)) {
756 status = sysfs_create_group(&dev->kobj,
757 &gpiochip_attr_group);
758 } else
759 status = PTR_ERR(dev);
760 chip->exported = (status == 0);
761 mutex_unlock(&sysfs_lock);
762
763 if (status)
764 chip_dbg(chip, "%s: status %d\n", __func__, status);
765
766 return status;
767}
768
769void gpiochip_unexport(struct gpio_chip *chip)
770{
771 int status;
772 struct device *dev;
773
774 mutex_lock(&sysfs_lock);
775 dev = class_find_device(&gpio_class, NULL, chip, match_export);
776 if (dev) {
777 put_device(dev);
778 device_unregister(dev);
779 chip->exported = false;
780 status = 0;
781 } else
782 status = -ENODEV;
783 mutex_unlock(&sysfs_lock);
784
785 if (status)
786 chip_dbg(chip, "%s: status %d\n", __func__, status);
787}
788
789static int __init gpiolib_sysfs_init(void)
790{
791 int status;
792 unsigned long flags;
793 struct gpio_chip *chip;
794
795 status = class_register(&gpio_class);
796 if (status < 0)
797 return status;
798
799 /* Scan and register the gpio_chips which registered very
800 * early (e.g. before the class_register above was called).
801 *
802 * We run before arch_initcall() so chip->dev nodes can have
803 * registered, and so arch_initcall() can always gpio_export().
804 */
805 spin_lock_irqsave(&gpio_lock, flags);
806 list_for_each_entry(chip, &gpio_chips, list) {
807 if (chip->exported)
808 continue;
809
810 /*
811 * TODO we yield gpio_lock here because gpiochip_export()
812 * acquires a mutex. This is unsafe and needs to be fixed.
813 *
814 * Also it would be nice to use gpiochip_find() here so we
815 * can keep gpio_chips local to gpiolib.c, but the yield of
816 * gpio_lock prevents us from doing this.
817 */
818 spin_unlock_irqrestore(&gpio_lock, flags);
819 status = gpiochip_export(chip);
820 spin_lock_irqsave(&gpio_lock, flags);
821 }
822 spin_unlock_irqrestore(&gpio_lock, flags);
823
824
825 return status;
826}
827postcore_initcall(gpiolib_sysfs_init);
diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c
index 2ebc9071e354..e8e98ca25ec7 100644
--- a/drivers/gpio/gpiolib.c
+++ b/drivers/gpio/gpiolib.c
@@ -14,6 +14,7 @@
14#include <linux/slab.h> 14#include <linux/slab.h>
15#include <linux/acpi.h> 15#include <linux/acpi.h>
16#include <linux/gpio/driver.h> 16#include <linux/gpio/driver.h>
17#include <linux/gpio/machine.h>
17 18
18#include "gpiolib.h" 19#include "gpiolib.h"
19 20
@@ -44,111 +45,19 @@
44 * While any GPIO is requested, its gpio_chip is not removable; 45 * While any GPIO is requested, its gpio_chip is not removable;
45 * each GPIO's "requested" flag serves as a lock and refcount. 46 * each GPIO's "requested" flag serves as a lock and refcount.
46 */ 47 */
47static DEFINE_SPINLOCK(gpio_lock); 48DEFINE_SPINLOCK(gpio_lock);
48 49
49struct gpio_desc {
50 struct gpio_chip *chip;
51 unsigned long flags;
52/* flag symbols are bit numbers */
53#define FLAG_REQUESTED 0
54#define FLAG_IS_OUT 1
55#define FLAG_EXPORT 2 /* protected by sysfs_lock */
56#define FLAG_SYSFS 3 /* exported via /sys/class/gpio/control */
57#define FLAG_TRIG_FALL 4 /* trigger on falling edge */
58#define FLAG_TRIG_RISE 5 /* trigger on rising edge */
59#define FLAG_ACTIVE_LOW 6 /* value has active low */
60#define FLAG_OPEN_DRAIN 7 /* Gpio is open drain type */
61#define FLAG_OPEN_SOURCE 8 /* Gpio is open source type */
62#define FLAG_USED_AS_IRQ 9 /* GPIO is connected to an IRQ */
63
64#define ID_SHIFT 16 /* add new flags before this one */
65
66#define GPIO_FLAGS_MASK ((1 << ID_SHIFT) - 1)
67#define GPIO_TRIGGER_MASK (BIT(FLAG_TRIG_FALL) | BIT(FLAG_TRIG_RISE))
68
69#ifdef CONFIG_DEBUG_FS
70 const char *label;
71#endif
72};
73static struct gpio_desc gpio_desc[ARCH_NR_GPIOS]; 50static struct gpio_desc gpio_desc[ARCH_NR_GPIOS];
74 51
75#define GPIO_OFFSET_VALID(chip, offset) (offset >= 0 && offset < chip->ngpio) 52#define GPIO_OFFSET_VALID(chip, offset) (offset >= 0 && offset < chip->ngpio)
76 53
77static DEFINE_MUTEX(gpio_lookup_lock); 54static DEFINE_MUTEX(gpio_lookup_lock);
78static LIST_HEAD(gpio_lookup_list); 55static LIST_HEAD(gpio_lookup_list);
79static LIST_HEAD(gpio_chips); 56LIST_HEAD(gpio_chips);
80
81#ifdef CONFIG_GPIO_SYSFS
82static DEFINE_IDR(dirent_idr);
83#endif
84
85static int gpiod_request(struct gpio_desc *desc, const char *label);
86static void gpiod_free(struct gpio_desc *desc);
87
88/* With descriptor prefix */
89
90#ifdef CONFIG_DEBUG_FS
91#define gpiod_emerg(desc, fmt, ...) \
92 pr_emerg("gpio-%d (%s): " fmt, desc_to_gpio(desc), desc->label ? : "?",\
93 ##__VA_ARGS__)
94#define gpiod_crit(desc, fmt, ...) \
95 pr_crit("gpio-%d (%s): " fmt, desc_to_gpio(desc), desc->label ? : "?", \
96 ##__VA_ARGS__)
97#define gpiod_err(desc, fmt, ...) \
98 pr_err("gpio-%d (%s): " fmt, desc_to_gpio(desc), desc->label ? : "?", \
99 ##__VA_ARGS__)
100#define gpiod_warn(desc, fmt, ...) \
101 pr_warn("gpio-%d (%s): " fmt, desc_to_gpio(desc), desc->label ? : "?", \
102 ##__VA_ARGS__)
103#define gpiod_info(desc, fmt, ...) \
104 pr_info("gpio-%d (%s): " fmt, desc_to_gpio(desc), desc->label ? : "?", \
105 ##__VA_ARGS__)
106#define gpiod_dbg(desc, fmt, ...) \
107 pr_debug("gpio-%d (%s): " fmt, desc_to_gpio(desc), desc->label ? : "?",\
108 ##__VA_ARGS__)
109#else
110#define gpiod_emerg(desc, fmt, ...) \
111 pr_emerg("gpio-%d: " fmt, desc_to_gpio(desc), ##__VA_ARGS__)
112#define gpiod_crit(desc, fmt, ...) \
113 pr_crit("gpio-%d: " fmt, desc_to_gpio(desc), ##__VA_ARGS__)
114#define gpiod_err(desc, fmt, ...) \
115 pr_err("gpio-%d: " fmt, desc_to_gpio(desc), ##__VA_ARGS__)
116#define gpiod_warn(desc, fmt, ...) \
117 pr_warn("gpio-%d: " fmt, desc_to_gpio(desc), ##__VA_ARGS__)
118#define gpiod_info(desc, fmt, ...) \
119 pr_info("gpio-%d: " fmt, desc_to_gpio(desc), ##__VA_ARGS__)
120#define gpiod_dbg(desc, fmt, ...) \
121 pr_debug("gpio-%d: " fmt, desc_to_gpio(desc), ##__VA_ARGS__)
122#endif
123
124/* With chip prefix */
125
126#define chip_emerg(chip, fmt, ...) \
127 pr_emerg("GPIO chip %s: " fmt, chip->label, ##__VA_ARGS__)
128#define chip_crit(chip, fmt, ...) \
129 pr_crit("GPIO chip %s: " fmt, chip->label, ##__VA_ARGS__)
130#define chip_err(chip, fmt, ...) \
131 pr_err("GPIO chip %s: " fmt, chip->label, ##__VA_ARGS__)
132#define chip_warn(chip, fmt, ...) \
133 pr_warn("GPIO chip %s: " fmt, chip->label, ##__VA_ARGS__)
134#define chip_info(chip, fmt, ...) \
135 pr_info("GPIO chip %s: " fmt, chip->label, ##__VA_ARGS__)
136#define chip_dbg(chip, fmt, ...) \
137 pr_debug("GPIO chip %s: " fmt, chip->label, ##__VA_ARGS__)
138 57
139static inline void desc_set_label(struct gpio_desc *d, const char *label) 58static inline void desc_set_label(struct gpio_desc *d, const char *label)
140{ 59{
141#ifdef CONFIG_DEBUG_FS
142 d->label = label; 60 d->label = label;
143#endif
144}
145
146/*
147 * Return the GPIO number of the passed descriptor relative to its chip
148 */
149static int gpio_chip_hwgpio(const struct gpio_desc *desc)
150{
151 return desc - &desc->chip->desc[0];
152} 61}
153 62
154/** 63/**
@@ -174,7 +83,6 @@ struct gpio_desc *gpiochip_get_desc(struct gpio_chip *chip,
174 83
175 return &chip->desc[hwnum]; 84 return &chip->desc[hwnum];
176} 85}
177EXPORT_SYMBOL_GPL(gpiochip_get_desc);
178 86
179/** 87/**
180 * Convert a GPIO descriptor to the integer namespace. 88 * Convert a GPIO descriptor to the integer namespace.
@@ -188,39 +96,6 @@ int desc_to_gpio(const struct gpio_desc *desc)
188EXPORT_SYMBOL_GPL(desc_to_gpio); 96EXPORT_SYMBOL_GPL(desc_to_gpio);
189 97
190 98
191/* Warn when drivers omit gpio_request() calls -- legal but ill-advised
192 * when setting direction, and otherwise illegal. Until board setup code
193 * and drivers use explicit requests everywhere (which won't happen when
194 * those calls have no teeth) we can't avoid autorequesting. This nag
195 * message should motivate switching to explicit requests... so should
196 * the weaker cleanup after faults, compared to gpio_request().
197 *
198 * NOTE: the autorequest mechanism is going away; at this point it's
199 * only "legal" in the sense that (old) code using it won't break yet,
200 * but instead only triggers a WARN() stack dump.
201 */
202static int gpio_ensure_requested(struct gpio_desc *desc)
203{
204 const struct gpio_chip *chip = desc->chip;
205 const int gpio = desc_to_gpio(desc);
206
207 if (WARN(test_and_set_bit(FLAG_REQUESTED, &desc->flags) == 0,
208 "autorequest GPIO-%d\n", gpio)) {
209 if (!try_module_get(chip->owner)) {
210 gpiod_err(desc, "%s: module can't be gotten\n",
211 __func__);
212 clear_bit(FLAG_REQUESTED, &desc->flags);
213 /* lose */
214 return -EIO;
215 }
216 desc_set_label(desc, "[auto]");
217 /* caller must chip->request() w/o spinlock */
218 if (chip->request)
219 return 1;
220 }
221 return 0;
222}
223
224/** 99/**
225 * gpiod_to_chip - Return the GPIO chip to which a GPIO descriptor belongs 100 * gpiod_to_chip - Return the GPIO chip to which a GPIO descriptor belongs
226 * @desc: descriptor to return the chip of 101 * @desc: descriptor to return the chip of
@@ -291,836 +166,6 @@ int gpiod_get_direction(const struct gpio_desc *desc)
291} 166}
292EXPORT_SYMBOL_GPL(gpiod_get_direction); 167EXPORT_SYMBOL_GPL(gpiod_get_direction);
293 168
294#ifdef CONFIG_GPIO_SYSFS
295
296/* lock protects against unexport_gpio() being called while
297 * sysfs files are active.
298 */
299static DEFINE_MUTEX(sysfs_lock);
300
301/*
302 * /sys/class/gpio/gpioN... only for GPIOs that are exported
303 * /direction
304 * * MAY BE OMITTED if kernel won't allow direction changes
305 * * is read/write as "in" or "out"
306 * * may also be written as "high" or "low", initializing
307 * output value as specified ("out" implies "low")
308 * /value
309 * * always readable, subject to hardware behavior
310 * * may be writable, as zero/nonzero
311 * /edge
312 * * configures behavior of poll(2) on /value
313 * * available only if pin can generate IRQs on input
314 * * is read/write as "none", "falling", "rising", or "both"
315 * /active_low
316 * * configures polarity of /value
317 * * is read/write as zero/nonzero
318 * * also affects existing and subsequent "falling" and "rising"
319 * /edge configuration
320 */
321
322static ssize_t gpio_direction_show(struct device *dev,
323 struct device_attribute *attr, char *buf)
324{
325 const struct gpio_desc *desc = dev_get_drvdata(dev);
326 ssize_t status;
327
328 mutex_lock(&sysfs_lock);
329
330 if (!test_bit(FLAG_EXPORT, &desc->flags)) {
331 status = -EIO;
332 } else {
333 gpiod_get_direction(desc);
334 status = sprintf(buf, "%s\n",
335 test_bit(FLAG_IS_OUT, &desc->flags)
336 ? "out" : "in");
337 }
338
339 mutex_unlock(&sysfs_lock);
340 return status;
341}
342
343static ssize_t gpio_direction_store(struct device *dev,
344 struct device_attribute *attr, const char *buf, size_t size)
345{
346 struct gpio_desc *desc = dev_get_drvdata(dev);
347 ssize_t status;
348
349 mutex_lock(&sysfs_lock);
350
351 if (!test_bit(FLAG_EXPORT, &desc->flags))
352 status = -EIO;
353 else if (sysfs_streq(buf, "high"))
354 status = gpiod_direction_output_raw(desc, 1);
355 else if (sysfs_streq(buf, "out") || sysfs_streq(buf, "low"))
356 status = gpiod_direction_output_raw(desc, 0);
357 else if (sysfs_streq(buf, "in"))
358 status = gpiod_direction_input(desc);
359 else
360 status = -EINVAL;
361
362 mutex_unlock(&sysfs_lock);
363 return status ? : size;
364}
365
366static /* const */ DEVICE_ATTR(direction, 0644,
367 gpio_direction_show, gpio_direction_store);
368
369static ssize_t gpio_value_show(struct device *dev,
370 struct device_attribute *attr, char *buf)
371{
372 struct gpio_desc *desc = dev_get_drvdata(dev);
373 ssize_t status;
374
375 mutex_lock(&sysfs_lock);
376
377 if (!test_bit(FLAG_EXPORT, &desc->flags))
378 status = -EIO;
379 else
380 status = sprintf(buf, "%d\n", gpiod_get_value_cansleep(desc));
381
382 mutex_unlock(&sysfs_lock);
383 return status;
384}
385
386static ssize_t gpio_value_store(struct device *dev,
387 struct device_attribute *attr, const char *buf, size_t size)
388{
389 struct gpio_desc *desc = dev_get_drvdata(dev);
390 ssize_t status;
391
392 mutex_lock(&sysfs_lock);
393
394 if (!test_bit(FLAG_EXPORT, &desc->flags))
395 status = -EIO;
396 else if (!test_bit(FLAG_IS_OUT, &desc->flags))
397 status = -EPERM;
398 else {
399 long value;
400
401 status = kstrtol(buf, 0, &value);
402 if (status == 0) {
403 gpiod_set_value_cansleep(desc, value);
404 status = size;
405 }
406 }
407
408 mutex_unlock(&sysfs_lock);
409 return status;
410}
411
412static const DEVICE_ATTR(value, 0644,
413 gpio_value_show, gpio_value_store);
414
415static irqreturn_t gpio_sysfs_irq(int irq, void *priv)
416{
417 struct kernfs_node *value_sd = priv;
418
419 sysfs_notify_dirent(value_sd);
420 return IRQ_HANDLED;
421}
422
423static int gpio_setup_irq(struct gpio_desc *desc, struct device *dev,
424 unsigned long gpio_flags)
425{
426 struct kernfs_node *value_sd;
427 unsigned long irq_flags;
428 int ret, irq, id;
429
430 if ((desc->flags & GPIO_TRIGGER_MASK) == gpio_flags)
431 return 0;
432
433 irq = gpiod_to_irq(desc);
434 if (irq < 0)
435 return -EIO;
436
437 id = desc->flags >> ID_SHIFT;
438 value_sd = idr_find(&dirent_idr, id);
439 if (value_sd)
440 free_irq(irq, value_sd);
441
442 desc->flags &= ~GPIO_TRIGGER_MASK;
443
444 if (!gpio_flags) {
445 gpiod_unlock_as_irq(desc);
446 ret = 0;
447 goto free_id;
448 }
449
450 irq_flags = IRQF_SHARED;
451 if (test_bit(FLAG_TRIG_FALL, &gpio_flags))
452 irq_flags |= test_bit(FLAG_ACTIVE_LOW, &desc->flags) ?
453 IRQF_TRIGGER_RISING : IRQF_TRIGGER_FALLING;
454 if (test_bit(FLAG_TRIG_RISE, &gpio_flags))
455 irq_flags |= test_bit(FLAG_ACTIVE_LOW, &desc->flags) ?
456 IRQF_TRIGGER_FALLING : IRQF_TRIGGER_RISING;
457
458 if (!value_sd) {
459 value_sd = sysfs_get_dirent(dev->kobj.sd, "value");
460 if (!value_sd) {
461 ret = -ENODEV;
462 goto err_out;
463 }
464
465 ret = idr_alloc(&dirent_idr, value_sd, 1, 0, GFP_KERNEL);
466 if (ret < 0)
467 goto free_sd;
468 id = ret;
469
470 desc->flags &= GPIO_FLAGS_MASK;
471 desc->flags |= (unsigned long)id << ID_SHIFT;
472
473 if (desc->flags >> ID_SHIFT != id) {
474 ret = -ERANGE;
475 goto free_id;
476 }
477 }
478
479 ret = request_any_context_irq(irq, gpio_sysfs_irq, irq_flags,
480 "gpiolib", value_sd);
481 if (ret < 0)
482 goto free_id;
483
484 ret = gpiod_lock_as_irq(desc);
485 if (ret < 0) {
486 gpiod_warn(desc, "failed to flag the GPIO for IRQ\n");
487 goto free_id;
488 }
489
490 desc->flags |= gpio_flags;
491 return 0;
492
493free_id:
494 idr_remove(&dirent_idr, id);
495 desc->flags &= GPIO_FLAGS_MASK;
496free_sd:
497 if (value_sd)
498 sysfs_put(value_sd);
499err_out:
500 return ret;
501}
502
503static const struct {
504 const char *name;
505 unsigned long flags;
506} trigger_types[] = {
507 { "none", 0 },
508 { "falling", BIT(FLAG_TRIG_FALL) },
509 { "rising", BIT(FLAG_TRIG_RISE) },
510 { "both", BIT(FLAG_TRIG_FALL) | BIT(FLAG_TRIG_RISE) },
511};
512
513static ssize_t gpio_edge_show(struct device *dev,
514 struct device_attribute *attr, char *buf)
515{
516 const struct gpio_desc *desc = dev_get_drvdata(dev);
517 ssize_t status;
518
519 mutex_lock(&sysfs_lock);
520
521 if (!test_bit(FLAG_EXPORT, &desc->flags))
522 status = -EIO;
523 else {
524 int i;
525
526 status = 0;
527 for (i = 0; i < ARRAY_SIZE(trigger_types); i++)
528 if ((desc->flags & GPIO_TRIGGER_MASK)
529 == trigger_types[i].flags) {
530 status = sprintf(buf, "%s\n",
531 trigger_types[i].name);
532 break;
533 }
534 }
535
536 mutex_unlock(&sysfs_lock);
537 return status;
538}
539
540static ssize_t gpio_edge_store(struct device *dev,
541 struct device_attribute *attr, const char *buf, size_t size)
542{
543 struct gpio_desc *desc = dev_get_drvdata(dev);
544 ssize_t status;
545 int i;
546
547 for (i = 0; i < ARRAY_SIZE(trigger_types); i++)
548 if (sysfs_streq(trigger_types[i].name, buf))
549 goto found;
550 return -EINVAL;
551
552found:
553 mutex_lock(&sysfs_lock);
554
555 if (!test_bit(FLAG_EXPORT, &desc->flags))
556 status = -EIO;
557 else {
558 status = gpio_setup_irq(desc, dev, trigger_types[i].flags);
559 if (!status)
560 status = size;
561 }
562
563 mutex_unlock(&sysfs_lock);
564
565 return status;
566}
567
568static DEVICE_ATTR(edge, 0644, gpio_edge_show, gpio_edge_store);
569
570static int sysfs_set_active_low(struct gpio_desc *desc, struct device *dev,
571 int value)
572{
573 int status = 0;
574
575 if (!!test_bit(FLAG_ACTIVE_LOW, &desc->flags) == !!value)
576 return 0;
577
578 if (value)
579 set_bit(FLAG_ACTIVE_LOW, &desc->flags);
580 else
581 clear_bit(FLAG_ACTIVE_LOW, &desc->flags);
582
583 /* reconfigure poll(2) support if enabled on one edge only */
584 if (dev != NULL && (!!test_bit(FLAG_TRIG_RISE, &desc->flags) ^
585 !!test_bit(FLAG_TRIG_FALL, &desc->flags))) {
586 unsigned long trigger_flags = desc->flags & GPIO_TRIGGER_MASK;
587
588 gpio_setup_irq(desc, dev, 0);
589 status = gpio_setup_irq(desc, dev, trigger_flags);
590 }
591
592 return status;
593}
594
595static ssize_t gpio_active_low_show(struct device *dev,
596 struct device_attribute *attr, char *buf)
597{
598 const struct gpio_desc *desc = dev_get_drvdata(dev);
599 ssize_t status;
600
601 mutex_lock(&sysfs_lock);
602
603 if (!test_bit(FLAG_EXPORT, &desc->flags))
604 status = -EIO;
605 else
606 status = sprintf(buf, "%d\n",
607 !!test_bit(FLAG_ACTIVE_LOW, &desc->flags));
608
609 mutex_unlock(&sysfs_lock);
610
611 return status;
612}
613
614static ssize_t gpio_active_low_store(struct device *dev,
615 struct device_attribute *attr, const char *buf, size_t size)
616{
617 struct gpio_desc *desc = dev_get_drvdata(dev);
618 ssize_t status;
619
620 mutex_lock(&sysfs_lock);
621
622 if (!test_bit(FLAG_EXPORT, &desc->flags)) {
623 status = -EIO;
624 } else {
625 long value;
626
627 status = kstrtol(buf, 0, &value);
628 if (status == 0)
629 status = sysfs_set_active_low(desc, dev, value != 0);
630 }
631
632 mutex_unlock(&sysfs_lock);
633
634 return status ? : size;
635}
636
637static const DEVICE_ATTR(active_low, 0644,
638 gpio_active_low_show, gpio_active_low_store);
639
640static const struct attribute *gpio_attrs[] = {
641 &dev_attr_value.attr,
642 &dev_attr_active_low.attr,
643 NULL,
644};
645
646static const struct attribute_group gpio_attr_group = {
647 .attrs = (struct attribute **) gpio_attrs,
648};
649
650/*
651 * /sys/class/gpio/gpiochipN/
652 * /base ... matching gpio_chip.base (N)
653 * /label ... matching gpio_chip.label
654 * /ngpio ... matching gpio_chip.ngpio
655 */
656
657static ssize_t chip_base_show(struct device *dev,
658 struct device_attribute *attr, char *buf)
659{
660 const struct gpio_chip *chip = dev_get_drvdata(dev);
661
662 return sprintf(buf, "%d\n", chip->base);
663}
664static DEVICE_ATTR(base, 0444, chip_base_show, NULL);
665
666static ssize_t chip_label_show(struct device *dev,
667 struct device_attribute *attr, char *buf)
668{
669 const struct gpio_chip *chip = dev_get_drvdata(dev);
670
671 return sprintf(buf, "%s\n", chip->label ? : "");
672}
673static DEVICE_ATTR(label, 0444, chip_label_show, NULL);
674
675static ssize_t chip_ngpio_show(struct device *dev,
676 struct device_attribute *attr, char *buf)
677{
678 const struct gpio_chip *chip = dev_get_drvdata(dev);
679
680 return sprintf(buf, "%u\n", chip->ngpio);
681}
682static DEVICE_ATTR(ngpio, 0444, chip_ngpio_show, NULL);
683
684static const struct attribute *gpiochip_attrs[] = {
685 &dev_attr_base.attr,
686 &dev_attr_label.attr,
687 &dev_attr_ngpio.attr,
688 NULL,
689};
690
691static const struct attribute_group gpiochip_attr_group = {
692 .attrs = (struct attribute **) gpiochip_attrs,
693};
694
695/*
696 * /sys/class/gpio/export ... write-only
697 * integer N ... number of GPIO to export (full access)
698 * /sys/class/gpio/unexport ... write-only
699 * integer N ... number of GPIO to unexport
700 */
701static ssize_t export_store(struct class *class,
702 struct class_attribute *attr,
703 const char *buf, size_t len)
704{
705 long gpio;
706 struct gpio_desc *desc;
707 int status;
708
709 status = kstrtol(buf, 0, &gpio);
710 if (status < 0)
711 goto done;
712
713 desc = gpio_to_desc(gpio);
714 /* reject invalid GPIOs */
715 if (!desc) {
716 pr_warn("%s: invalid GPIO %ld\n", __func__, gpio);
717 return -EINVAL;
718 }
719
720 /* No extra locking here; FLAG_SYSFS just signifies that the
721 * request and export were done by on behalf of userspace, so
722 * they may be undone on its behalf too.
723 */
724
725 status = gpiod_request(desc, "sysfs");
726 if (status < 0) {
727 if (status == -EPROBE_DEFER)
728 status = -ENODEV;
729 goto done;
730 }
731 status = gpiod_export(desc, true);
732 if (status < 0)
733 gpiod_free(desc);
734 else
735 set_bit(FLAG_SYSFS, &desc->flags);
736
737done:
738 if (status)
739 pr_debug("%s: status %d\n", __func__, status);
740 return status ? : len;
741}
742
743static ssize_t unexport_store(struct class *class,
744 struct class_attribute *attr,
745 const char *buf, size_t len)
746{
747 long gpio;
748 struct gpio_desc *desc;
749 int status;
750
751 status = kstrtol(buf, 0, &gpio);
752 if (status < 0)
753 goto done;
754
755 desc = gpio_to_desc(gpio);
756 /* reject bogus commands (gpio_unexport ignores them) */
757 if (!desc) {
758 pr_warn("%s: invalid GPIO %ld\n", __func__, gpio);
759 return -EINVAL;
760 }
761
762 status = -EINVAL;
763
764 /* No extra locking here; FLAG_SYSFS just signifies that the
765 * request and export were done by on behalf of userspace, so
766 * they may be undone on its behalf too.
767 */
768 if (test_and_clear_bit(FLAG_SYSFS, &desc->flags)) {
769 status = 0;
770 gpiod_free(desc);
771 }
772done:
773 if (status)
774 pr_debug("%s: status %d\n", __func__, status);
775 return status ? : len;
776}
777
778static struct class_attribute gpio_class_attrs[] = {
779 __ATTR(export, 0200, NULL, export_store),
780 __ATTR(unexport, 0200, NULL, unexport_store),
781 __ATTR_NULL,
782};
783
784static struct class gpio_class = {
785 .name = "gpio",
786 .owner = THIS_MODULE,
787
788 .class_attrs = gpio_class_attrs,
789};
790
791
792/**
793 * gpiod_export - export a GPIO through sysfs
794 * @gpio: gpio to make available, already requested
795 * @direction_may_change: true if userspace may change gpio direction
796 * Context: arch_initcall or later
797 *
798 * When drivers want to make a GPIO accessible to userspace after they
799 * have requested it -- perhaps while debugging, or as part of their
800 * public interface -- they may use this routine. If the GPIO can
801 * change direction (some can't) and the caller allows it, userspace
802 * will see "direction" sysfs attribute which may be used to change
803 * the gpio's direction. A "value" attribute will always be provided.
804 *
805 * Returns zero on success, else an error.
806 */
807int gpiod_export(struct gpio_desc *desc, bool direction_may_change)
808{
809 unsigned long flags;
810 int status;
811 const char *ioname = NULL;
812 struct device *dev;
813 int offset;
814
815 /* can't export until sysfs is available ... */
816 if (!gpio_class.p) {
817 pr_debug("%s: called too early!\n", __func__);
818 return -ENOENT;
819 }
820
821 if (!desc) {
822 pr_debug("%s: invalid gpio descriptor\n", __func__);
823 return -EINVAL;
824 }
825
826 mutex_lock(&sysfs_lock);
827
828 spin_lock_irqsave(&gpio_lock, flags);
829 if (!test_bit(FLAG_REQUESTED, &desc->flags) ||
830 test_bit(FLAG_EXPORT, &desc->flags)) {
831 spin_unlock_irqrestore(&gpio_lock, flags);
832 gpiod_dbg(desc, "%s: unavailable (requested=%d, exported=%d)\n",
833 __func__,
834 test_bit(FLAG_REQUESTED, &desc->flags),
835 test_bit(FLAG_EXPORT, &desc->flags));
836 status = -EPERM;
837 goto fail_unlock;
838 }
839
840 if (!desc->chip->direction_input || !desc->chip->direction_output)
841 direction_may_change = false;
842 spin_unlock_irqrestore(&gpio_lock, flags);
843
844 offset = gpio_chip_hwgpio(desc);
845 if (desc->chip->names && desc->chip->names[offset])
846 ioname = desc->chip->names[offset];
847
848 dev = device_create(&gpio_class, desc->chip->dev, MKDEV(0, 0),
849 desc, ioname ? ioname : "gpio%u",
850 desc_to_gpio(desc));
851 if (IS_ERR(dev)) {
852 status = PTR_ERR(dev);
853 goto fail_unlock;
854 }
855
856 status = sysfs_create_group(&dev->kobj, &gpio_attr_group);
857 if (status)
858 goto fail_unregister_device;
859
860 if (direction_may_change) {
861 status = device_create_file(dev, &dev_attr_direction);
862 if (status)
863 goto fail_unregister_device;
864 }
865
866 if (gpiod_to_irq(desc) >= 0 && (direction_may_change ||
867 !test_bit(FLAG_IS_OUT, &desc->flags))) {
868 status = device_create_file(dev, &dev_attr_edge);
869 if (status)
870 goto fail_unregister_device;
871 }
872
873 set_bit(FLAG_EXPORT, &desc->flags);
874 mutex_unlock(&sysfs_lock);
875 return 0;
876
877fail_unregister_device:
878 device_unregister(dev);
879fail_unlock:
880 mutex_unlock(&sysfs_lock);
881 gpiod_dbg(desc, "%s: status %d\n", __func__, status);
882 return status;
883}
884EXPORT_SYMBOL_GPL(gpiod_export);
885
886static int match_export(struct device *dev, const void *data)
887{
888 return dev_get_drvdata(dev) == data;
889}
890
891/**
892 * gpiod_export_link - create a sysfs link to an exported GPIO node
893 * @dev: device under which to create symlink
894 * @name: name of the symlink
895 * @gpio: gpio to create symlink to, already exported
896 *
897 * Set up a symlink from /sys/.../dev/name to /sys/class/gpio/gpioN
898 * node. Caller is responsible for unlinking.
899 *
900 * Returns zero on success, else an error.
901 */
902int gpiod_export_link(struct device *dev, const char *name,
903 struct gpio_desc *desc)
904{
905 int status = -EINVAL;
906
907 if (!desc) {
908 pr_warn("%s: invalid GPIO\n", __func__);
909 return -EINVAL;
910 }
911
912 mutex_lock(&sysfs_lock);
913
914 if (test_bit(FLAG_EXPORT, &desc->flags)) {
915 struct device *tdev;
916
917 tdev = class_find_device(&gpio_class, NULL, desc, match_export);
918 if (tdev != NULL) {
919 status = sysfs_create_link(&dev->kobj, &tdev->kobj,
920 name);
921 } else {
922 status = -ENODEV;
923 }
924 }
925
926 mutex_unlock(&sysfs_lock);
927
928 if (status)
929 gpiod_dbg(desc, "%s: status %d\n", __func__, status);
930
931 return status;
932}
933EXPORT_SYMBOL_GPL(gpiod_export_link);
934
935/**
936 * gpiod_sysfs_set_active_low - set the polarity of gpio sysfs value
937 * @gpio: gpio to change
938 * @value: non-zero to use active low, i.e. inverted values
939 *
940 * Set the polarity of /sys/class/gpio/gpioN/value sysfs attribute.
941 * The GPIO does not have to be exported yet. If poll(2) support has
942 * been enabled for either rising or falling edge, it will be
943 * reconfigured to follow the new polarity.
944 *
945 * Returns zero on success, else an error.
946 */
947int gpiod_sysfs_set_active_low(struct gpio_desc *desc, int value)
948{
949 struct device *dev = NULL;
950 int status = -EINVAL;
951
952 if (!desc) {
953 pr_warn("%s: invalid GPIO\n", __func__);
954 return -EINVAL;
955 }
956
957 mutex_lock(&sysfs_lock);
958
959 if (test_bit(FLAG_EXPORT, &desc->flags)) {
960 dev = class_find_device(&gpio_class, NULL, desc, match_export);
961 if (dev == NULL) {
962 status = -ENODEV;
963 goto unlock;
964 }
965 }
966
967 status = sysfs_set_active_low(desc, dev, value);
968
969unlock:
970 mutex_unlock(&sysfs_lock);
971
972 if (status)
973 gpiod_dbg(desc, "%s: status %d\n", __func__, status);
974
975 return status;
976}
977EXPORT_SYMBOL_GPL(gpiod_sysfs_set_active_low);
978
979/**
980 * gpiod_unexport - reverse effect of gpio_export()
981 * @gpio: gpio to make unavailable
982 *
983 * This is implicit on gpio_free().
984 */
985void gpiod_unexport(struct gpio_desc *desc)
986{
987 int status = 0;
988 struct device *dev = NULL;
989
990 if (!desc) {
991 pr_warn("%s: invalid GPIO\n", __func__);
992 return;
993 }
994
995 mutex_lock(&sysfs_lock);
996
997 if (test_bit(FLAG_EXPORT, &desc->flags)) {
998
999 dev = class_find_device(&gpio_class, NULL, desc, match_export);
1000 if (dev) {
1001 gpio_setup_irq(desc, dev, 0);
1002 clear_bit(FLAG_EXPORT, &desc->flags);
1003 } else
1004 status = -ENODEV;
1005 }
1006
1007 mutex_unlock(&sysfs_lock);
1008
1009 if (dev) {
1010 device_unregister(dev);
1011 put_device(dev);
1012 }
1013
1014 if (status)
1015 gpiod_dbg(desc, "%s: status %d\n", __func__, status);
1016}
1017EXPORT_SYMBOL_GPL(gpiod_unexport);
1018
1019static int gpiochip_export(struct gpio_chip *chip)
1020{
1021 int status;
1022 struct device *dev;
1023
1024 /* Many systems register gpio chips for SOC support very early,
1025 * before driver model support is available. In those cases we
1026 * export this later, in gpiolib_sysfs_init() ... here we just
1027 * verify that _some_ field of gpio_class got initialized.
1028 */
1029 if (!gpio_class.p)
1030 return 0;
1031
1032 /* use chip->base for the ID; it's already known to be unique */
1033 mutex_lock(&sysfs_lock);
1034 dev = device_create(&gpio_class, chip->dev, MKDEV(0, 0), chip,
1035 "gpiochip%d", chip->base);
1036 if (!IS_ERR(dev)) {
1037 status = sysfs_create_group(&dev->kobj,
1038 &gpiochip_attr_group);
1039 } else
1040 status = PTR_ERR(dev);
1041 chip->exported = (status == 0);
1042 mutex_unlock(&sysfs_lock);
1043
1044 if (status) {
1045 unsigned long flags;
1046 unsigned gpio;
1047
1048 spin_lock_irqsave(&gpio_lock, flags);
1049 gpio = 0;
1050 while (gpio < chip->ngpio)
1051 chip->desc[gpio++].chip = NULL;
1052 spin_unlock_irqrestore(&gpio_lock, flags);
1053
1054 chip_dbg(chip, "%s: status %d\n", __func__, status);
1055 }
1056
1057 return status;
1058}
1059
1060static void gpiochip_unexport(struct gpio_chip *chip)
1061{
1062 int status;
1063 struct device *dev;
1064
1065 mutex_lock(&sysfs_lock);
1066 dev = class_find_device(&gpio_class, NULL, chip, match_export);
1067 if (dev) {
1068 put_device(dev);
1069 device_unregister(dev);
1070 chip->exported = false;
1071 status = 0;
1072 } else
1073 status = -ENODEV;
1074 mutex_unlock(&sysfs_lock);
1075
1076 if (status)
1077 chip_dbg(chip, "%s: status %d\n", __func__, status);
1078}
1079
1080static int __init gpiolib_sysfs_init(void)
1081{
1082 int status;
1083 unsigned long flags;
1084 struct gpio_chip *chip;
1085
1086 status = class_register(&gpio_class);
1087 if (status < 0)
1088 return status;
1089
1090 /* Scan and register the gpio_chips which registered very
1091 * early (e.g. before the class_register above was called).
1092 *
1093 * We run before arch_initcall() so chip->dev nodes can have
1094 * registered, and so arch_initcall() can always gpio_export().
1095 */
1096 spin_lock_irqsave(&gpio_lock, flags);
1097 list_for_each_entry(chip, &gpio_chips, list) {
1098 if (!chip || chip->exported)
1099 continue;
1100
1101 spin_unlock_irqrestore(&gpio_lock, flags);
1102 status = gpiochip_export(chip);
1103 spin_lock_irqsave(&gpio_lock, flags);
1104 }
1105 spin_unlock_irqrestore(&gpio_lock, flags);
1106
1107
1108 return status;
1109}
1110postcore_initcall(gpiolib_sysfs_init);
1111
1112#else
1113static inline int gpiochip_export(struct gpio_chip *chip)
1114{
1115 return 0;
1116}
1117
1118static inline void gpiochip_unexport(struct gpio_chip *chip)
1119{
1120}
1121
1122#endif /* CONFIG_GPIO_SYSFS */
1123
1124/* 169/*
1125 * Add a new chip to the global chips list, keeping the list of chips sorted 170 * Add a new chip to the global chips list, keeping the list of chips sorted
1126 * by base order. 171 * by base order.
@@ -1263,10 +308,9 @@ static void gpiochip_irqchip_remove(struct gpio_chip *gpiochip);
1263 * 308 *
1264 * A gpio_chip with any GPIOs still requested may not be removed. 309 * A gpio_chip with any GPIOs still requested may not be removed.
1265 */ 310 */
1266int gpiochip_remove(struct gpio_chip *chip) 311void gpiochip_remove(struct gpio_chip *chip)
1267{ 312{
1268 unsigned long flags; 313 unsigned long flags;
1269 int status = 0;
1270 unsigned id; 314 unsigned id;
1271 315
1272 acpi_gpiochip_remove(chip); 316 acpi_gpiochip_remove(chip);
@@ -1278,24 +322,15 @@ int gpiochip_remove(struct gpio_chip *chip)
1278 of_gpiochip_remove(chip); 322 of_gpiochip_remove(chip);
1279 323
1280 for (id = 0; id < chip->ngpio; id++) { 324 for (id = 0; id < chip->ngpio; id++) {
1281 if (test_bit(FLAG_REQUESTED, &chip->desc[id].flags)) { 325 if (test_bit(FLAG_REQUESTED, &chip->desc[id].flags))
1282 status = -EBUSY; 326 dev_crit(chip->dev, "REMOVING GPIOCHIP WITH GPIOS STILL REQUESTED\n");
1283 break;
1284 }
1285 }
1286 if (status == 0) {
1287 for (id = 0; id < chip->ngpio; id++)
1288 chip->desc[id].chip = NULL;
1289
1290 list_del(&chip->list);
1291 } 327 }
328 for (id = 0; id < chip->ngpio; id++)
329 chip->desc[id].chip = NULL;
1292 330
331 list_del(&chip->list);
1293 spin_unlock_irqrestore(&gpio_lock, flags); 332 spin_unlock_irqrestore(&gpio_lock, flags);
1294 333 gpiochip_unexport(chip);
1295 if (status == 0)
1296 gpiochip_unexport(chip);
1297
1298 return status;
1299} 334}
1300EXPORT_SYMBOL_GPL(gpiochip_remove); 335EXPORT_SYMBOL_GPL(gpiochip_remove);
1301 336
@@ -1350,30 +385,47 @@ static struct gpio_chip *find_chip_by_name(const char *name)
1350 */ 385 */
1351 386
1352/** 387/**
1353 * gpiochip_add_chained_irqchip() - adds a chained irqchip to a gpiochip 388 * gpiochip_set_chained_irqchip() - sets a chained irqchip to a gpiochip
1354 * @gpiochip: the gpiochip to add the irqchip to 389 * @gpiochip: the gpiochip to set the irqchip chain to
1355 * @irqchip: the irqchip to add to the gpiochip 390 * @irqchip: the irqchip to chain to the gpiochip
1356 * @parent_irq: the irq number corresponding to the parent IRQ for this 391 * @parent_irq: the irq number corresponding to the parent IRQ for this
1357 * chained irqchip 392 * chained irqchip
1358 * @parent_handler: the parent interrupt handler for the accumulated IRQ 393 * @parent_handler: the parent interrupt handler for the accumulated IRQ
1359 * coming out of the gpiochip 394 * coming out of the gpiochip. If the interrupt is nested rather than
395 * cascaded, pass NULL in this handler argument
1360 */ 396 */
1361void gpiochip_set_chained_irqchip(struct gpio_chip *gpiochip, 397void gpiochip_set_chained_irqchip(struct gpio_chip *gpiochip,
1362 struct irq_chip *irqchip, 398 struct irq_chip *irqchip,
1363 int parent_irq, 399 int parent_irq,
1364 irq_flow_handler_t parent_handler) 400 irq_flow_handler_t parent_handler)
1365{ 401{
1366 if (gpiochip->can_sleep) { 402 unsigned int offset;
1367 chip_err(gpiochip, "you cannot have chained interrupts on a chip that may sleep\n"); 403
404 if (!gpiochip->irqdomain) {
405 chip_err(gpiochip, "called %s before setting up irqchip\n",
406 __func__);
1368 return; 407 return;
1369 } 408 }
1370 409
1371 irq_set_chained_handler(parent_irq, parent_handler); 410 if (parent_handler) {
1372 /* 411 if (gpiochip->can_sleep) {
1373 * The parent irqchip is already using the chip_data for this 412 chip_err(gpiochip,
1374 * irqchip, so our callbacks simply use the handler_data. 413 "you cannot have chained interrupts on a "
1375 */ 414 "chip that may sleep\n");
1376 irq_set_handler_data(parent_irq, gpiochip); 415 return;
416 }
417 /*
418 * The parent irqchip is already using the chip_data for this
419 * irqchip, so our callbacks simply use the handler_data.
420 */
421 irq_set_handler_data(parent_irq, gpiochip);
422 irq_set_chained_handler(parent_irq, parent_handler);
423 }
424
425 /* Set the parent IRQ for all affected IRQs */
426 for (offset = 0; offset < gpiochip->ngpio; offset++)
427 irq_set_parent(irq_find_mapping(gpiochip->irqdomain, offset),
428 parent_irq);
1377} 429}
1378EXPORT_SYMBOL_GPL(gpiochip_set_chained_irqchip); 430EXPORT_SYMBOL_GPL(gpiochip_set_chained_irqchip);
1379 431
@@ -1402,7 +454,7 @@ static int gpiochip_irq_map(struct irq_domain *d, unsigned int irq,
1402 irq_set_lockdep_class(irq, &gpiochip_irq_lock_class); 454 irq_set_lockdep_class(irq, &gpiochip_irq_lock_class);
1403 irq_set_chip_and_handler(irq, chip->irqchip, chip->irq_handler); 455 irq_set_chip_and_handler(irq, chip->irqchip, chip->irq_handler);
1404 /* Chips that can sleep need nested thread handlers */ 456 /* Chips that can sleep need nested thread handlers */
1405 if (chip->can_sleep) 457 if (chip->can_sleep && !chip->irq_not_threaded)
1406 irq_set_nested_thread(irq, 1); 458 irq_set_nested_thread(irq, 1);
1407#ifdef CONFIG_ARM 459#ifdef CONFIG_ARM
1408 set_irq_flags(irq, IRQF_VALID); 460 set_irq_flags(irq, IRQF_VALID);
@@ -1474,10 +526,13 @@ static void gpiochip_irqchip_remove(struct gpio_chip *gpiochip)
1474{ 526{
1475 unsigned int offset; 527 unsigned int offset;
1476 528
529 acpi_gpiochip_free_interrupts(gpiochip);
530
1477 /* Remove all IRQ mappings and delete the domain */ 531 /* Remove all IRQ mappings and delete the domain */
1478 if (gpiochip->irqdomain) { 532 if (gpiochip->irqdomain) {
1479 for (offset = 0; offset < gpiochip->ngpio; offset++) 533 for (offset = 0; offset < gpiochip->ngpio; offset++)
1480 irq_dispose_mapping(gpiochip->irq_base + offset); 534 irq_dispose_mapping(
535 irq_find_mapping(gpiochip->irqdomain, offset));
1481 irq_domain_remove(gpiochip->irqdomain); 536 irq_domain_remove(gpiochip->irqdomain);
1482 } 537 }
1483 538
@@ -1567,6 +622,8 @@ int gpiochip_irqchip_add(struct gpio_chip *gpiochip,
1567 gpiochip->irq_base = irq_base; 622 gpiochip->irq_base = irq_base;
1568 } 623 }
1569 624
625 acpi_gpiochip_request_interrupts(gpiochip);
626
1570 return 0; 627 return 0;
1571} 628}
1572EXPORT_SYMBOL_GPL(gpiochip_irqchip_add); 629EXPORT_SYMBOL_GPL(gpiochip_irqchip_add);
@@ -1740,7 +797,7 @@ done:
1740 return status; 797 return status;
1741} 798}
1742 799
1743static int gpiod_request(struct gpio_desc *desc, const char *label) 800int gpiod_request(struct gpio_desc *desc, const char *label)
1744{ 801{
1745 int status = -EPROBE_DEFER; 802 int status = -EPROBE_DEFER;
1746 struct gpio_chip *chip; 803 struct gpio_chip *chip;
@@ -1767,12 +824,6 @@ done:
1767 return status; 824 return status;
1768} 825}
1769 826
1770int gpio_request(unsigned gpio, const char *label)
1771{
1772 return gpiod_request(gpio_to_desc(gpio), label);
1773}
1774EXPORT_SYMBOL_GPL(gpio_request);
1775
1776static bool __gpiod_free(struct gpio_desc *desc) 827static bool __gpiod_free(struct gpio_desc *desc)
1777{ 828{
1778 bool ret = false; 829 bool ret = false;
@@ -1805,7 +856,7 @@ static bool __gpiod_free(struct gpio_desc *desc)
1805 return ret; 856 return ret;
1806} 857}
1807 858
1808static void gpiod_free(struct gpio_desc *desc) 859void gpiod_free(struct gpio_desc *desc)
1809{ 860{
1810 if (desc && __gpiod_free(desc)) 861 if (desc && __gpiod_free(desc))
1811 module_put(desc->chip->owner); 862 module_put(desc->chip->owner);
@@ -1813,101 +864,14 @@ static void gpiod_free(struct gpio_desc *desc)
1813 WARN_ON(extra_checks); 864 WARN_ON(extra_checks);
1814} 865}
1815 866
1816void gpio_free(unsigned gpio)
1817{
1818 gpiod_free(gpio_to_desc(gpio));
1819}
1820EXPORT_SYMBOL_GPL(gpio_free);
1821
1822/**
1823 * gpio_request_one - request a single GPIO with initial configuration
1824 * @gpio: the GPIO number
1825 * @flags: GPIO configuration as specified by GPIOF_*
1826 * @label: a literal description string of this GPIO
1827 */
1828int gpio_request_one(unsigned gpio, unsigned long flags, const char *label)
1829{
1830 struct gpio_desc *desc;
1831 int err;
1832
1833 desc = gpio_to_desc(gpio);
1834
1835 err = gpiod_request(desc, label);
1836 if (err)
1837 return err;
1838
1839 if (flags & GPIOF_OPEN_DRAIN)
1840 set_bit(FLAG_OPEN_DRAIN, &desc->flags);
1841
1842 if (flags & GPIOF_OPEN_SOURCE)
1843 set_bit(FLAG_OPEN_SOURCE, &desc->flags);
1844
1845 if (flags & GPIOF_DIR_IN)
1846 err = gpiod_direction_input(desc);
1847 else
1848 err = gpiod_direction_output_raw(desc,
1849 (flags & GPIOF_INIT_HIGH) ? 1 : 0);
1850
1851 if (err)
1852 goto free_gpio;
1853
1854 if (flags & GPIOF_EXPORT) {
1855 err = gpiod_export(desc, flags & GPIOF_EXPORT_CHANGEABLE);
1856 if (err)
1857 goto free_gpio;
1858 }
1859
1860 return 0;
1861
1862 free_gpio:
1863 gpiod_free(desc);
1864 return err;
1865}
1866EXPORT_SYMBOL_GPL(gpio_request_one);
1867
1868/**
1869 * gpio_request_array - request multiple GPIOs in a single call
1870 * @array: array of the 'struct gpio'
1871 * @num: how many GPIOs in the array
1872 */
1873int gpio_request_array(const struct gpio *array, size_t num)
1874{
1875 int i, err;
1876
1877 for (i = 0; i < num; i++, array++) {
1878 err = gpio_request_one(array->gpio, array->flags, array->label);
1879 if (err)
1880 goto err_free;
1881 }
1882 return 0;
1883
1884err_free:
1885 while (i--)
1886 gpio_free((--array)->gpio);
1887 return err;
1888}
1889EXPORT_SYMBOL_GPL(gpio_request_array);
1890
1891/**
1892 * gpio_free_array - release multiple GPIOs in a single call
1893 * @array: array of the 'struct gpio'
1894 * @num: how many GPIOs in the array
1895 */
1896void gpio_free_array(const struct gpio *array, size_t num)
1897{
1898 while (num--)
1899 gpio_free((array++)->gpio);
1900}
1901EXPORT_SYMBOL_GPL(gpio_free_array);
1902
1903/** 867/**
1904 * gpiochip_is_requested - return string iff signal was requested 868 * gpiochip_is_requested - return string iff signal was requested
1905 * @chip: controller managing the signal 869 * @chip: controller managing the signal
1906 * @offset: of signal within controller's 0..(ngpio - 1) range 870 * @offset: of signal within controller's 0..(ngpio - 1) range
1907 * 871 *
1908 * Returns NULL if the GPIO is not currently requested, else a string. 872 * Returns NULL if the GPIO is not currently requested, else a string.
1909 * If debugfs support is enabled, the string returned is the label passed 873 * The string returned is the label passed to gpio_request(); if none has been
1910 * to gpio_request(); otherwise it is a meaningless constant. 874 * passed it is a meaningless, non-NULL constant.
1911 * 875 *
1912 * This function is for use by GPIO controller drivers. The label can 876 * This function is for use by GPIO controller drivers. The label can
1913 * help with diagnostics, and knowing that the signal is used as a GPIO 877 * help with diagnostics, and knowing that the signal is used as a GPIO
@@ -1924,11 +888,7 @@ const char *gpiochip_is_requested(struct gpio_chip *chip, unsigned offset)
1924 888
1925 if (test_bit(FLAG_REQUESTED, &desc->flags) == 0) 889 if (test_bit(FLAG_REQUESTED, &desc->flags) == 0)
1926 return NULL; 890 return NULL;
1927#ifdef CONFIG_DEBUG_FS
1928 return desc->label; 891 return desc->label;
1929#else
1930 return "?";
1931#endif
1932} 892}
1933EXPORT_SYMBOL_GPL(gpiochip_is_requested); 893EXPORT_SYMBOL_GPL(gpiochip_is_requested);
1934 894
@@ -1943,13 +903,24 @@ EXPORT_SYMBOL_GPL(gpiochip_is_requested);
1943 * allows the GPIO chip module to be unloaded as needed (we assume that the 903 * allows the GPIO chip module to be unloaded as needed (we assume that the
1944 * GPIO chip driver handles freeing the GPIOs it has requested). 904 * GPIO chip driver handles freeing the GPIOs it has requested).
1945 */ 905 */
1946int gpiochip_request_own_desc(struct gpio_desc *desc, const char *label) 906struct gpio_desc *gpiochip_request_own_desc(struct gpio_chip *chip, u16 hwnum,
907 const char *label)
1947{ 908{
1948 if (!desc || !desc->chip) 909 struct gpio_desc *desc = gpiochip_get_desc(chip, hwnum);
1949 return -EINVAL; 910 int err;
1950 911
1951 return __gpiod_request(desc, label); 912 if (IS_ERR(desc)) {
913 chip_err(chip, "failed to get GPIO descriptor\n");
914 return desc;
915 }
916
917 err = __gpiod_request(desc, label);
918 if (err < 0)
919 return ERR_PTR(err);
920
921 return desc;
1952} 922}
923EXPORT_SYMBOL_GPL(gpiochip_request_own_desc);
1953 924
1954/** 925/**
1955 * gpiochip_free_own_desc - Free GPIO requested by the chip driver 926 * gpiochip_free_own_desc - Free GPIO requested by the chip driver
@@ -1963,6 +934,7 @@ void gpiochip_free_own_desc(struct gpio_desc *desc)
1963 if (desc) 934 if (desc)
1964 __gpiod_free(desc); 935 __gpiod_free(desc);
1965} 936}
937EXPORT_SYMBOL_GPL(gpiochip_free_own_desc);
1966 938
1967/* Drivers MUST set GPIO direction before making get/set calls. In 939/* Drivers MUST set GPIO direction before making get/set calls. In
1968 * some cases this is done in early boot, before IRQs are enabled. 940 * some cases this is done in early boot, before IRQs are enabled.
@@ -1984,10 +956,8 @@ void gpiochip_free_own_desc(struct gpio_desc *desc)
1984 */ 956 */
1985int gpiod_direction_input(struct gpio_desc *desc) 957int gpiod_direction_input(struct gpio_desc *desc)
1986{ 958{
1987 unsigned long flags;
1988 struct gpio_chip *chip; 959 struct gpio_chip *chip;
1989 int status = -EINVAL; 960 int status = -EINVAL;
1990 int offset;
1991 961
1992 if (!desc || !desc->chip) { 962 if (!desc || !desc->chip) {
1993 pr_warn("%s: invalid GPIO\n", __func__); 963 pr_warn("%s: invalid GPIO\n", __func__);
@@ -2002,52 +972,20 @@ int gpiod_direction_input(struct gpio_desc *desc)
2002 return -EIO; 972 return -EIO;
2003 } 973 }
2004 974
2005 spin_lock_irqsave(&gpio_lock, flags); 975 status = chip->direction_input(chip, gpio_chip_hwgpio(desc));
2006
2007 status = gpio_ensure_requested(desc);
2008 if (status < 0)
2009 goto fail;
2010
2011 /* now we know the gpio is valid and chip won't vanish */
2012
2013 spin_unlock_irqrestore(&gpio_lock, flags);
2014
2015 might_sleep_if(chip->can_sleep);
2016
2017 offset = gpio_chip_hwgpio(desc);
2018 if (status) {
2019 status = chip->request(chip, offset);
2020 if (status < 0) {
2021 gpiod_dbg(desc, "%s: chip request fail, %d\n",
2022 __func__, status);
2023 /* and it's not available to anyone else ...
2024 * gpio_request() is the fully clean solution.
2025 */
2026 goto lose;
2027 }
2028 }
2029
2030 status = chip->direction_input(chip, offset);
2031 if (status == 0) 976 if (status == 0)
2032 clear_bit(FLAG_IS_OUT, &desc->flags); 977 clear_bit(FLAG_IS_OUT, &desc->flags);
2033 978
2034 trace_gpio_direction(desc_to_gpio(desc), 1, status); 979 trace_gpio_direction(desc_to_gpio(desc), 1, status);
2035lose: 980
2036 return status;
2037fail:
2038 spin_unlock_irqrestore(&gpio_lock, flags);
2039 if (status)
2040 gpiod_dbg(desc, "%s: status %d\n", __func__, status);
2041 return status; 981 return status;
2042} 982}
2043EXPORT_SYMBOL_GPL(gpiod_direction_input); 983EXPORT_SYMBOL_GPL(gpiod_direction_input);
2044 984
2045static int _gpiod_direction_output_raw(struct gpio_desc *desc, int value) 985static int _gpiod_direction_output_raw(struct gpio_desc *desc, int value)
2046{ 986{
2047 unsigned long flags;
2048 struct gpio_chip *chip; 987 struct gpio_chip *chip;
2049 int status = -EINVAL; 988 int status = -EINVAL;
2050 int offset;
2051 989
2052 /* GPIOs used for IRQs shall not be set as output */ 990 /* GPIOs used for IRQs shall not be set as output */
2053 if (test_bit(FLAG_USED_AS_IRQ, &desc->flags)) { 991 if (test_bit(FLAG_USED_AS_IRQ, &desc->flags)) {
@@ -2073,42 +1011,11 @@ static int _gpiod_direction_output_raw(struct gpio_desc *desc, int value)
2073 return -EIO; 1011 return -EIO;
2074 } 1012 }
2075 1013
2076 spin_lock_irqsave(&gpio_lock, flags); 1014 status = chip->direction_output(chip, gpio_chip_hwgpio(desc), value);
2077
2078 status = gpio_ensure_requested(desc);
2079 if (status < 0)
2080 goto fail;
2081
2082 /* now we know the gpio is valid and chip won't vanish */
2083
2084 spin_unlock_irqrestore(&gpio_lock, flags);
2085
2086 might_sleep_if(chip->can_sleep);
2087
2088 offset = gpio_chip_hwgpio(desc);
2089 if (status) {
2090 status = chip->request(chip, offset);
2091 if (status < 0) {
2092 gpiod_dbg(desc, "%s: chip request fail, %d\n",
2093 __func__, status);
2094 /* and it's not available to anyone else ...
2095 * gpio_request() is the fully clean solution.
2096 */
2097 goto lose;
2098 }
2099 }
2100
2101 status = chip->direction_output(chip, offset, value);
2102 if (status == 0) 1015 if (status == 0)
2103 set_bit(FLAG_IS_OUT, &desc->flags); 1016 set_bit(FLAG_IS_OUT, &desc->flags);
2104 trace_gpio_value(desc_to_gpio(desc), 0, value); 1017 trace_gpio_value(desc_to_gpio(desc), 0, value);
2105 trace_gpio_direction(desc_to_gpio(desc), 0, status); 1018 trace_gpio_direction(desc_to_gpio(desc), 0, status);
2106lose:
2107 return status;
2108fail:
2109 spin_unlock_irqrestore(&gpio_lock, flags);
2110 if (status)
2111 gpiod_dbg(desc, "%s: gpio status %d\n", __func__, status);
2112 return status; 1019 return status;
2113} 1020}
2114 1021
@@ -2167,10 +1074,7 @@ EXPORT_SYMBOL_GPL(gpiod_direction_output);
2167 */ 1074 */
2168int gpiod_set_debounce(struct gpio_desc *desc, unsigned debounce) 1075int gpiod_set_debounce(struct gpio_desc *desc, unsigned debounce)
2169{ 1076{
2170 unsigned long flags;
2171 struct gpio_chip *chip; 1077 struct gpio_chip *chip;
2172 int status = -EINVAL;
2173 int offset;
2174 1078
2175 if (!desc || !desc->chip) { 1079 if (!desc || !desc->chip) {
2176 pr_warn("%s: invalid GPIO\n", __func__); 1080 pr_warn("%s: invalid GPIO\n", __func__);
@@ -2185,27 +1089,7 @@ int gpiod_set_debounce(struct gpio_desc *desc, unsigned debounce)
2185 return -ENOTSUPP; 1089 return -ENOTSUPP;
2186 } 1090 }
2187 1091
2188 spin_lock_irqsave(&gpio_lock, flags); 1092 return chip->set_debounce(chip, gpio_chip_hwgpio(desc), debounce);
2189
2190 status = gpio_ensure_requested(desc);
2191 if (status < 0)
2192 goto fail;
2193
2194 /* now we know the gpio is valid and chip won't vanish */
2195
2196 spin_unlock_irqrestore(&gpio_lock, flags);
2197
2198 might_sleep_if(chip->can_sleep);
2199
2200 offset = gpio_chip_hwgpio(desc);
2201 return chip->set_debounce(chip, offset, debounce);
2202
2203fail:
2204 spin_unlock_irqrestore(&gpio_lock, flags);
2205 if (status)
2206 gpiod_dbg(desc, "%s: status %d\n", __func__, status);
2207
2208 return status;
2209} 1093}
2210EXPORT_SYMBOL_GPL(gpiod_set_debounce); 1094EXPORT_SYMBOL_GPL(gpiod_set_debounce);
2211 1095
@@ -2448,54 +1332,44 @@ int gpiod_to_irq(const struct gpio_desc *desc)
2448EXPORT_SYMBOL_GPL(gpiod_to_irq); 1332EXPORT_SYMBOL_GPL(gpiod_to_irq);
2449 1333
2450/** 1334/**
2451 * gpiod_lock_as_irq() - lock a GPIO to be used as IRQ 1335 * gpio_lock_as_irq() - lock a GPIO to be used as IRQ
2452 * @gpio: the GPIO line to lock as used for IRQ 1336 * @chip: the chip the GPIO to lock belongs to
1337 * @offset: the offset of the GPIO to lock as IRQ
2453 * 1338 *
2454 * This is used directly by GPIO drivers that want to lock down 1339 * This is used directly by GPIO drivers that want to lock down
2455 * a certain GPIO line to be used for IRQs. 1340 * a certain GPIO line to be used for IRQs.
2456 */ 1341 */
2457int gpiod_lock_as_irq(struct gpio_desc *desc) 1342int gpio_lock_as_irq(struct gpio_chip *chip, unsigned int offset)
2458{ 1343{
2459 if (!desc) 1344 if (offset >= chip->ngpio)
2460 return -EINVAL; 1345 return -EINVAL;
2461 1346
2462 if (test_bit(FLAG_IS_OUT, &desc->flags)) { 1347 if (test_bit(FLAG_IS_OUT, &chip->desc[offset].flags)) {
2463 gpiod_err(desc, 1348 chip_err(chip,
2464 "%s: tried to flag a GPIO set as output for IRQ\n", 1349 "%s: tried to flag a GPIO set as output for IRQ\n",
2465 __func__); 1350 __func__);
2466 return -EIO; 1351 return -EIO;
2467 } 1352 }
2468 1353
2469 set_bit(FLAG_USED_AS_IRQ, &desc->flags); 1354 set_bit(FLAG_USED_AS_IRQ, &chip->desc[offset].flags);
2470 return 0; 1355 return 0;
2471} 1356}
2472EXPORT_SYMBOL_GPL(gpiod_lock_as_irq);
2473
2474int gpio_lock_as_irq(struct gpio_chip *chip, unsigned int offset)
2475{
2476 return gpiod_lock_as_irq(gpiochip_get_desc(chip, offset));
2477}
2478EXPORT_SYMBOL_GPL(gpio_lock_as_irq); 1357EXPORT_SYMBOL_GPL(gpio_lock_as_irq);
2479 1358
2480/** 1359/**
2481 * gpiod_unlock_as_irq() - unlock a GPIO used as IRQ 1360 * gpio_unlock_as_irq() - unlock a GPIO used as IRQ
2482 * @gpio: the GPIO line to unlock from IRQ usage 1361 * @chip: the chip the GPIO to lock belongs to
1362 * @offset: the offset of the GPIO to lock as IRQ
2483 * 1363 *
2484 * This is used directly by GPIO drivers that want to indicate 1364 * This is used directly by GPIO drivers that want to indicate
2485 * that a certain GPIO is no longer used exclusively for IRQ. 1365 * that a certain GPIO is no longer used exclusively for IRQ.
2486 */ 1366 */
2487void gpiod_unlock_as_irq(struct gpio_desc *desc) 1367void gpio_unlock_as_irq(struct gpio_chip *chip, unsigned int offset)
2488{ 1368{
2489 if (!desc) 1369 if (offset >= chip->ngpio)
2490 return; 1370 return;
2491 1371
2492 clear_bit(FLAG_USED_AS_IRQ, &desc->flags); 1372 clear_bit(FLAG_USED_AS_IRQ, &chip->desc[offset].flags);
2493}
2494EXPORT_SYMBOL_GPL(gpiod_unlock_as_irq);
2495
2496void gpio_unlock_as_irq(struct gpio_chip *chip, unsigned int offset)
2497{
2498 return gpiod_unlock_as_irq(gpiochip_get_desc(chip, offset));
2499} 1373}
2500EXPORT_SYMBOL_GPL(gpio_unlock_as_irq); 1374EXPORT_SYMBOL_GPL(gpio_unlock_as_irq);
2501 1375
@@ -2726,38 +1600,43 @@ static struct gpio_desc *gpiod_find(struct device *dev, const char *con_id,
2726 * gpiod_get - obtain a GPIO for a given GPIO function 1600 * gpiod_get - obtain a GPIO for a given GPIO function
2727 * @dev: GPIO consumer, can be NULL for system-global GPIOs 1601 * @dev: GPIO consumer, can be NULL for system-global GPIOs
2728 * @con_id: function within the GPIO consumer 1602 * @con_id: function within the GPIO consumer
1603 * @flags: optional GPIO initialization flags
2729 * 1604 *
2730 * Return the GPIO descriptor corresponding to the function con_id of device 1605 * Return the GPIO descriptor corresponding to the function con_id of device
2731 * dev, -ENOENT if no GPIO has been assigned to the requested function, or 1606 * dev, -ENOENT if no GPIO has been assigned to the requested function, or
2732 * another IS_ERR() code if an error occured while trying to acquire the GPIO. 1607 * another IS_ERR() code if an error occured while trying to acquire the GPIO.
2733 */ 1608 */
2734struct gpio_desc *__must_check gpiod_get(struct device *dev, const char *con_id) 1609struct gpio_desc *__must_check __gpiod_get(struct device *dev, const char *con_id,
1610 enum gpiod_flags flags)
2735{ 1611{
2736 return gpiod_get_index(dev, con_id, 0); 1612 return gpiod_get_index(dev, con_id, 0, flags);
2737} 1613}
2738EXPORT_SYMBOL_GPL(gpiod_get); 1614EXPORT_SYMBOL_GPL(__gpiod_get);
2739 1615
2740/** 1616/**
2741 * gpiod_get_optional - obtain an optional GPIO for a given GPIO function 1617 * gpiod_get_optional - obtain an optional GPIO for a given GPIO function
2742 * @dev: GPIO consumer, can be NULL for system-global GPIOs 1618 * @dev: GPIO consumer, can be NULL for system-global GPIOs
2743 * @con_id: function within the GPIO consumer 1619 * @con_id: function within the GPIO consumer
1620 * @flags: optional GPIO initialization flags
2744 * 1621 *
2745 * This is equivalent to gpiod_get(), except that when no GPIO was assigned to 1622 * This is equivalent to gpiod_get(), except that when no GPIO was assigned to
2746 * the requested function it will return NULL. This is convenient for drivers 1623 * the requested function it will return NULL. This is convenient for drivers
2747 * that need to handle optional GPIOs. 1624 * that need to handle optional GPIOs.
2748 */ 1625 */
2749struct gpio_desc *__must_check gpiod_get_optional(struct device *dev, 1626struct gpio_desc *__must_check __gpiod_get_optional(struct device *dev,
2750 const char *con_id) 1627 const char *con_id,
1628 enum gpiod_flags flags)
2751{ 1629{
2752 return gpiod_get_index_optional(dev, con_id, 0); 1630 return gpiod_get_index_optional(dev, con_id, 0, flags);
2753} 1631}
2754EXPORT_SYMBOL_GPL(gpiod_get_optional); 1632EXPORT_SYMBOL_GPL(__gpiod_get_optional);
2755 1633
2756/** 1634/**
2757 * gpiod_get_index - obtain a GPIO from a multi-index GPIO function 1635 * gpiod_get_index - obtain a GPIO from a multi-index GPIO function
2758 * @dev: GPIO consumer, can be NULL for system-global GPIOs 1636 * @dev: GPIO consumer, can be NULL for system-global GPIOs
2759 * @con_id: function within the GPIO consumer 1637 * @con_id: function within the GPIO consumer
2760 * @idx: index of the GPIO to obtain in the consumer 1638 * @idx: index of the GPIO to obtain in the consumer
1639 * @flags: optional GPIO initialization flags
2761 * 1640 *
2762 * This variant of gpiod_get() allows to access GPIOs other than the first 1641 * This variant of gpiod_get() allows to access GPIOs other than the first
2763 * defined one for functions that define several GPIOs. 1642 * defined one for functions that define several GPIOs.
@@ -2766,23 +1645,24 @@ EXPORT_SYMBOL_GPL(gpiod_get_optional);
2766 * requested function and/or index, or another IS_ERR() code if an error 1645 * requested function and/or index, or another IS_ERR() code if an error
2767 * occured while trying to acquire the GPIO. 1646 * occured while trying to acquire the GPIO.
2768 */ 1647 */
2769struct gpio_desc *__must_check gpiod_get_index(struct device *dev, 1648struct gpio_desc *__must_check __gpiod_get_index(struct device *dev,
2770 const char *con_id, 1649 const char *con_id,
2771 unsigned int idx) 1650 unsigned int idx,
1651 enum gpiod_flags flags)
2772{ 1652{
2773 struct gpio_desc *desc = NULL; 1653 struct gpio_desc *desc = NULL;
2774 int status; 1654 int status;
2775 enum gpio_lookup_flags flags = 0; 1655 enum gpio_lookup_flags lookupflags = 0;
2776 1656
2777 dev_dbg(dev, "GPIO lookup for consumer %s\n", con_id); 1657 dev_dbg(dev, "GPIO lookup for consumer %s\n", con_id);
2778 1658
2779 /* Using device tree? */ 1659 /* Using device tree? */
2780 if (IS_ENABLED(CONFIG_OF) && dev && dev->of_node) { 1660 if (IS_ENABLED(CONFIG_OF) && dev && dev->of_node) {
2781 dev_dbg(dev, "using device tree for GPIO lookup\n"); 1661 dev_dbg(dev, "using device tree for GPIO lookup\n");
2782 desc = of_find_gpio(dev, con_id, idx, &flags); 1662 desc = of_find_gpio(dev, con_id, idx, &lookupflags);
2783 } else if (IS_ENABLED(CONFIG_ACPI) && dev && ACPI_HANDLE(dev)) { 1663 } else if (IS_ENABLED(CONFIG_ACPI) && dev && ACPI_HANDLE(dev)) {
2784 dev_dbg(dev, "using ACPI for GPIO lookup\n"); 1664 dev_dbg(dev, "using ACPI for GPIO lookup\n");
2785 desc = acpi_find_gpio(dev, con_id, idx, &flags); 1665 desc = acpi_find_gpio(dev, con_id, idx, &lookupflags);
2786 } 1666 }
2787 1667
2788 /* 1668 /*
@@ -2790,8 +1670,8 @@ struct gpio_desc *__must_check gpiod_get_index(struct device *dev,
2790 * a result. In that case, use platform lookup as a fallback. 1670 * a result. In that case, use platform lookup as a fallback.
2791 */ 1671 */
2792 if (!desc || desc == ERR_PTR(-ENOENT)) { 1672 if (!desc || desc == ERR_PTR(-ENOENT)) {
2793 dev_dbg(dev, "using lookup tables for GPIO lookup"); 1673 dev_dbg(dev, "using lookup tables for GPIO lookup\n");
2794 desc = gpiod_find(dev, con_id, idx, &flags); 1674 desc = gpiod_find(dev, con_id, idx, &lookupflags);
2795 } 1675 }
2796 1676
2797 if (IS_ERR(desc)) { 1677 if (IS_ERR(desc)) {
@@ -2804,16 +1684,33 @@ struct gpio_desc *__must_check gpiod_get_index(struct device *dev,
2804 if (status < 0) 1684 if (status < 0)
2805 return ERR_PTR(status); 1685 return ERR_PTR(status);
2806 1686
2807 if (flags & GPIO_ACTIVE_LOW) 1687 if (lookupflags & GPIO_ACTIVE_LOW)
2808 set_bit(FLAG_ACTIVE_LOW, &desc->flags); 1688 set_bit(FLAG_ACTIVE_LOW, &desc->flags);
2809 if (flags & GPIO_OPEN_DRAIN) 1689 if (lookupflags & GPIO_OPEN_DRAIN)
2810 set_bit(FLAG_OPEN_DRAIN, &desc->flags); 1690 set_bit(FLAG_OPEN_DRAIN, &desc->flags);
2811 if (flags & GPIO_OPEN_SOURCE) 1691 if (lookupflags & GPIO_OPEN_SOURCE)
2812 set_bit(FLAG_OPEN_SOURCE, &desc->flags); 1692 set_bit(FLAG_OPEN_SOURCE, &desc->flags);
2813 1693
1694 /* No particular flag request, return here... */
1695 if (!(flags & GPIOD_FLAGS_BIT_DIR_SET))
1696 return desc;
1697
1698 /* Process flags */
1699 if (flags & GPIOD_FLAGS_BIT_DIR_OUT)
1700 status = gpiod_direction_output(desc,
1701 flags & GPIOD_FLAGS_BIT_DIR_VAL);
1702 else
1703 status = gpiod_direction_input(desc);
1704
1705 if (status < 0) {
1706 dev_dbg(dev, "setup of GPIO %s failed\n", con_id);
1707 gpiod_put(desc);
1708 return ERR_PTR(status);
1709 }
1710
2814 return desc; 1711 return desc;
2815} 1712}
2816EXPORT_SYMBOL_GPL(gpiod_get_index); 1713EXPORT_SYMBOL_GPL(__gpiod_get_index);
2817 1714
2818/** 1715/**
2819 * gpiod_get_index_optional - obtain an optional GPIO from a multi-index GPIO 1716 * gpiod_get_index_optional - obtain an optional GPIO from a multi-index GPIO
@@ -2821,18 +1718,20 @@ EXPORT_SYMBOL_GPL(gpiod_get_index);
2821 * @dev: GPIO consumer, can be NULL for system-global GPIOs 1718 * @dev: GPIO consumer, can be NULL for system-global GPIOs
2822 * @con_id: function within the GPIO consumer 1719 * @con_id: function within the GPIO consumer
2823 * @index: index of the GPIO to obtain in the consumer 1720 * @index: index of the GPIO to obtain in the consumer
1721 * @flags: optional GPIO initialization flags
2824 * 1722 *
2825 * This is equivalent to gpiod_get_index(), except that when no GPIO with the 1723 * This is equivalent to gpiod_get_index(), except that when no GPIO with the
2826 * specified index was assigned to the requested function it will return NULL. 1724 * specified index was assigned to the requested function it will return NULL.
2827 * This is convenient for drivers that need to handle optional GPIOs. 1725 * This is convenient for drivers that need to handle optional GPIOs.
2828 */ 1726 */
2829struct gpio_desc *__must_check gpiod_get_index_optional(struct device *dev, 1727struct gpio_desc *__must_check __gpiod_get_index_optional(struct device *dev,
2830 const char *con_id, 1728 const char *con_id,
2831 unsigned int index) 1729 unsigned int index,
1730 enum gpiod_flags flags)
2832{ 1731{
2833 struct gpio_desc *desc; 1732 struct gpio_desc *desc;
2834 1733
2835 desc = gpiod_get_index(dev, con_id, index); 1734 desc = gpiod_get_index(dev, con_id, index, flags);
2836 if (IS_ERR(desc)) { 1735 if (IS_ERR(desc)) {
2837 if (PTR_ERR(desc) == -ENOENT) 1736 if (PTR_ERR(desc) == -ENOENT)
2838 return NULL; 1737 return NULL;
@@ -2840,7 +1739,7 @@ struct gpio_desc *__must_check gpiod_get_index_optional(struct device *dev,
2840 1739
2841 return desc; 1740 return desc;
2842} 1741}
2843EXPORT_SYMBOL_GPL(gpiod_get_index_optional); 1742EXPORT_SYMBOL_GPL(__gpiod_get_index_optional);
2844 1743
2845/** 1744/**
2846 * gpiod_put - dispose of a GPIO descriptor 1745 * gpiod_put - dispose of a GPIO descriptor
diff --git a/drivers/gpio/gpiolib.h b/drivers/gpio/gpiolib.h
index 1a4103dd38df..9db2b6a71c5d 100644
--- a/drivers/gpio/gpiolib.h
+++ b/drivers/gpio/gpiolib.h
@@ -31,12 +31,21 @@ struct acpi_gpio_info {
31void acpi_gpiochip_add(struct gpio_chip *chip); 31void acpi_gpiochip_add(struct gpio_chip *chip);
32void acpi_gpiochip_remove(struct gpio_chip *chip); 32void acpi_gpiochip_remove(struct gpio_chip *chip);
33 33
34void acpi_gpiochip_request_interrupts(struct gpio_chip *chip);
35void acpi_gpiochip_free_interrupts(struct gpio_chip *chip);
36
34struct gpio_desc *acpi_get_gpiod_by_index(struct device *dev, int index, 37struct gpio_desc *acpi_get_gpiod_by_index(struct device *dev, int index,
35 struct acpi_gpio_info *info); 38 struct acpi_gpio_info *info);
36#else 39#else
37static inline void acpi_gpiochip_add(struct gpio_chip *chip) { } 40static inline void acpi_gpiochip_add(struct gpio_chip *chip) { }
38static inline void acpi_gpiochip_remove(struct gpio_chip *chip) { } 41static inline void acpi_gpiochip_remove(struct gpio_chip *chip) { }
39 42
43static inline void
44acpi_gpiochip_request_interrupts(struct gpio_chip *chip) { }
45
46static inline void
47acpi_gpiochip_free_interrupts(struct gpio_chip *chip) { }
48
40static inline struct gpio_desc * 49static inline struct gpio_desc *
41acpi_get_gpiod_by_index(struct device *dev, int index, 50acpi_get_gpiod_by_index(struct device *dev, int index,
42 struct acpi_gpio_info *info) 51 struct acpi_gpio_info *info)
@@ -45,10 +54,100 @@ acpi_get_gpiod_by_index(struct device *dev, int index,
45} 54}
46#endif 55#endif
47 56
48int gpiochip_request_own_desc(struct gpio_desc *desc, const char *label);
49void gpiochip_free_own_desc(struct gpio_desc *desc);
50
51struct gpio_desc *of_get_named_gpiod_flags(struct device_node *np, 57struct gpio_desc *of_get_named_gpiod_flags(struct device_node *np,
52 const char *list_name, int index, enum of_gpio_flags *flags); 58 const char *list_name, int index, enum of_gpio_flags *flags);
53 59
60struct gpio_desc *gpiochip_get_desc(struct gpio_chip *chip, u16 hwnum);
61
62extern struct spinlock gpio_lock;
63extern struct list_head gpio_chips;
64
65struct gpio_desc {
66 struct gpio_chip *chip;
67 unsigned long flags;
68/* flag symbols are bit numbers */
69#define FLAG_REQUESTED 0
70#define FLAG_IS_OUT 1
71#define FLAG_EXPORT 2 /* protected by sysfs_lock */
72#define FLAG_SYSFS 3 /* exported via /sys/class/gpio/control */
73#define FLAG_TRIG_FALL 4 /* trigger on falling edge */
74#define FLAG_TRIG_RISE 5 /* trigger on rising edge */
75#define FLAG_ACTIVE_LOW 6 /* value has active low */
76#define FLAG_OPEN_DRAIN 7 /* Gpio is open drain type */
77#define FLAG_OPEN_SOURCE 8 /* Gpio is open source type */
78#define FLAG_USED_AS_IRQ 9 /* GPIO is connected to an IRQ */
79
80#define ID_SHIFT 16 /* add new flags before this one */
81
82#define GPIO_FLAGS_MASK ((1 << ID_SHIFT) - 1)
83#define GPIO_TRIGGER_MASK (BIT(FLAG_TRIG_FALL) | BIT(FLAG_TRIG_RISE))
84
85 const char *label;
86};
87
88int gpiod_request(struct gpio_desc *desc, const char *label);
89void gpiod_free(struct gpio_desc *desc);
90
91/*
92 * Return the GPIO number of the passed descriptor relative to its chip
93 */
94static int __maybe_unused gpio_chip_hwgpio(const struct gpio_desc *desc)
95{
96 return desc - &desc->chip->desc[0];
97}
98
99/* With descriptor prefix */
100
101#define gpiod_emerg(desc, fmt, ...) \
102 pr_emerg("gpio-%d (%s): " fmt, desc_to_gpio(desc), desc->label ? : "?",\
103 ##__VA_ARGS__)
104#define gpiod_crit(desc, fmt, ...) \
105 pr_crit("gpio-%d (%s): " fmt, desc_to_gpio(desc), desc->label ? : "?", \
106 ##__VA_ARGS__)
107#define gpiod_err(desc, fmt, ...) \
108 pr_err("gpio-%d (%s): " fmt, desc_to_gpio(desc), desc->label ? : "?", \
109 ##__VA_ARGS__)
110#define gpiod_warn(desc, fmt, ...) \
111 pr_warn("gpio-%d (%s): " fmt, desc_to_gpio(desc), desc->label ? : "?", \
112 ##__VA_ARGS__)
113#define gpiod_info(desc, fmt, ...) \
114 pr_info("gpio-%d (%s): " fmt, desc_to_gpio(desc), desc->label ? : "?", \
115 ##__VA_ARGS__)
116#define gpiod_dbg(desc, fmt, ...) \
117 pr_debug("gpio-%d (%s): " fmt, desc_to_gpio(desc), desc->label ? : "?",\
118 ##__VA_ARGS__)
119
120/* With chip prefix */
121
122#define chip_emerg(chip, fmt, ...) \
123 pr_emerg("GPIO chip %s: " fmt, chip->label, ##__VA_ARGS__)
124#define chip_crit(chip, fmt, ...) \
125 pr_crit("GPIO chip %s: " fmt, chip->label, ##__VA_ARGS__)
126#define chip_err(chip, fmt, ...) \
127 pr_err("GPIO chip %s: " fmt, chip->label, ##__VA_ARGS__)
128#define chip_warn(chip, fmt, ...) \
129 pr_warn("GPIO chip %s: " fmt, chip->label, ##__VA_ARGS__)
130#define chip_info(chip, fmt, ...) \
131 pr_info("GPIO chip %s: " fmt, chip->label, ##__VA_ARGS__)
132#define chip_dbg(chip, fmt, ...) \
133 pr_debug("GPIO chip %s: " fmt, chip->label, ##__VA_ARGS__)
134
135#ifdef CONFIG_GPIO_SYSFS
136
137int gpiochip_export(struct gpio_chip *chip);
138void gpiochip_unexport(struct gpio_chip *chip);
139
140#else
141
142static inline int gpiochip_export(struct gpio_chip *chip)
143{
144 return 0;
145}
146
147static inline void gpiochip_unexport(struct gpio_chip *chip)
148{
149}
150
151#endif /* CONFIG_GPIO_SYSFS */
152
54#endif /* GPIOLIB_H */ 153#endif /* GPIOLIB_H */
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-19 17:09:55 -0500