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authorLinus Walleij <linus.walleij@linaro.org>2013-07-29 05:49:21 -0400
committerLinus Walleij <linus.walleij@linaro.org>2013-07-30 18:34:31 -0400
commit253403b035ac55ddd00282ab2dc8e948facc0da6 (patch)
treea9f4a4d02de0ba402472e01cab620e3acedde1b2 /drivers/gpio
parentc119fee06309a5b6969992b6fe2593299c803c81 (diff)
Revert "gpio/omap: don't create an IRQ mapping for every GPIO on DT"
This reverts commit 0e970cec05635adbe7b686063e2548a8e4afb8f4. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/gpio')
-rw-r--r--drivers/gpio/gpio-omap.c54
1 files changed, 14 insertions, 40 deletions
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index 5e667ff91dc3..dfeb3a3a8f20 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -1068,50 +1068,24 @@ static void omap_gpio_chip_init(struct gpio_bank *bank)
1068 1068
1069 gpiochip_add(&bank->chip); 1069 gpiochip_add(&bank->chip);
1070 1070
1071 /* 1071 for (j = 0; j < bank->width; j++) {
1072 * REVISIT these explicit calls to irq_create_mapping() 1072 int irq = irq_create_mapping(bank->domain, j);
1073 * to do the GPIO to IRQ domain mapping for each GPIO in 1073 irq_set_lockdep_class(irq, &gpio_lock_class);
1074 * the bank can be removed once all OMAP platforms have 1074 irq_set_chip_data(irq, bank);
1075 * been migrated to Device Tree boot only. 1075 if (bank->is_mpuio) {
1076 * Since in DT boot irq_create_mapping() is called from 1076 omap_mpuio_alloc_gc(bank, irq, bank->width);
1077 * irq_create_of_mapping() only for the GPIO lines that 1077 } else {
1078 * are used as interrupts. 1078 irq_set_chip_and_handler(irq, &gpio_irq_chip,
1079 */ 1079 handle_simple_irq);
1080 if (!bank->chip.of_node) 1080 set_irq_flags(irq, IRQF_VALID);
1081 for (j = 0; j < bank->width; j++) 1081 }
1082 irq_create_mapping(bank->domain, j); 1082 }
1083 irq_set_chained_handler(bank->irq, gpio_irq_handler); 1083 irq_set_chained_handler(bank->irq, gpio_irq_handler);
1084 irq_set_handler_data(bank->irq, bank); 1084 irq_set_handler_data(bank->irq, bank);
1085} 1085}
1086 1086
1087static const struct of_device_id omap_gpio_match[]; 1087static const struct of_device_id omap_gpio_match[];
1088 1088
1089static int omap_gpio_irq_map(struct irq_domain *d, unsigned int virq,
1090 irq_hw_number_t hwirq)
1091{
1092 struct gpio_bank *bank = d->host_data;
1093
1094 if (!bank)
1095 return -EINVAL;
1096
1097 irq_set_lockdep_class(virq, &gpio_lock_class);
1098 irq_set_chip_data(virq, bank);
1099 if (bank->is_mpuio) {
1100 omap_mpuio_alloc_gc(bank, virq, bank->width);
1101 } else {
1102 irq_set_chip_and_handler(virq, &gpio_irq_chip,
1103 handle_simple_irq);
1104 set_irq_flags(virq, IRQF_VALID);
1105 }
1106
1107 return 0;
1108}
1109
1110static struct irq_domain_ops omap_gpio_irq_ops = {
1111 .xlate = irq_domain_xlate_onetwocell,
1112 .map = omap_gpio_irq_map,
1113};
1114
1115static int omap_gpio_probe(struct platform_device *pdev) 1089static int omap_gpio_probe(struct platform_device *pdev)
1116{ 1090{
1117 struct device *dev = &pdev->dev; 1091 struct device *dev = &pdev->dev;
@@ -1177,10 +1151,10 @@ static int omap_gpio_probe(struct platform_device *pdev)
1177 } 1151 }
1178 1152
1179 bank->domain = irq_domain_add_legacy(node, bank->width, irq_base, 1153 bank->domain = irq_domain_add_legacy(node, bank->width, irq_base,
1180 0, &omap_gpio_irq_ops, bank); 1154 0, &irq_domain_simple_ops, NULL);
1181#else 1155#else
1182 bank->domain = irq_domain_add_linear(node, bank->width, 1156 bank->domain = irq_domain_add_linear(node, bank->width,
1183 &omap_gpio_irq_ops, bank); 1157 &irq_domain_simple_ops, NULL);
1184#endif 1158#endif
1185 if (!bank->domain) { 1159 if (!bank->domain) {
1186 dev_err(dev, "Couldn't register an IRQ domain\n"); 1160 dev_err(dev, "Couldn't register an IRQ domain\n");