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authorRichard Röjfors <richard.rojfors.ext@mocean-labs.com>2009-09-22 19:46:34 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2009-09-23 10:39:46 -0400
commit1e5db00687c1ebd93a902caf1d3694209013cb3e (patch)
tree41043a4a38fc2f36d92fe20559cb5ada85228465 /drivers/gpio/mc33880.c
parenta4177ee7f1a83eecb1d75e85d32664b023ef65e9 (diff)
gpio: add MC33880 driver
A GPIO driver for the Freescale MC33880 High/Low side switch Signed-off-by: Richard Röjfors <richard.rojfors.ext@mocean-labs.com> Cc: David Brownell <david-b@pacbell.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'drivers/gpio/mc33880.c')
-rw-r--r--drivers/gpio/mc33880.c196
1 files changed, 196 insertions, 0 deletions
diff --git a/drivers/gpio/mc33880.c b/drivers/gpio/mc33880.c
new file mode 100644
index 000000000000..e7d01bd8fdb3
--- /dev/null
+++ b/drivers/gpio/mc33880.c
@@ -0,0 +1,196 @@
1/*
2 * mc33880.c MC33880 high-side/low-side switch GPIO driver
3 * Copyright (c) 2009 Intel Corporation
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17 */
18
19/* Supports:
20 * Freescale MC33880 high-side/low-side switch
21 */
22
23#include <linux/init.h>
24#include <linux/mutex.h>
25#include <linux/spi/spi.h>
26#include <linux/spi/mc33880.h>
27#include <linux/gpio.h>
28
29#define DRIVER_NAME "mc33880"
30
31/*
32 * Pin configurations, see MAX7301 datasheet page 6
33 */
34#define PIN_CONFIG_MASK 0x03
35#define PIN_CONFIG_IN_PULLUP 0x03
36#define PIN_CONFIG_IN_WO_PULLUP 0x02
37#define PIN_CONFIG_OUT 0x01
38
39#define PIN_NUMBER 8
40
41
42/*
43 * Some registers must be read back to modify.
44 * To save time we cache them here in memory
45 */
46struct mc33880 {
47 struct mutex lock; /* protect from simultanous accesses */
48 u8 port_config;
49 struct gpio_chip chip;
50 struct spi_device *spi;
51};
52
53static int mc33880_write_config(struct mc33880 *mc)
54{
55 return spi_write(mc->spi, &mc->port_config, sizeof(mc->port_config));
56}
57
58
59static int __mc33880_set(struct mc33880 *mc, unsigned offset, int value)
60{
61 if (value)
62 mc->port_config |= 1 << offset;
63 else
64 mc->port_config &= ~(1 << offset);
65
66 return mc33880_write_config(mc);
67}
68
69
70static void mc33880_set(struct gpio_chip *chip, unsigned offset, int value)
71{
72 struct mc33880 *mc = container_of(chip, struct mc33880, chip);
73
74 mutex_lock(&mc->lock);
75
76 __mc33880_set(mc, offset, value);
77
78 mutex_unlock(&mc->lock);
79}
80
81static int __devinit mc33880_probe(struct spi_device *spi)
82{
83 struct mc33880 *mc;
84 struct mc33880_platform_data *pdata;
85 int ret;
86
87 pdata = spi->dev.platform_data;
88 if (!pdata || !pdata->base) {
89 dev_dbg(&spi->dev, "incorrect or missing platform data\n");
90 return -EINVAL;
91 }
92
93 /*
94 * bits_per_word cannot be configured in platform data
95 */
96 spi->bits_per_word = 8;
97
98 ret = spi_setup(spi);
99 if (ret < 0)
100 return ret;
101
102 mc = kzalloc(sizeof(struct mc33880), GFP_KERNEL);
103 if (!mc)
104 return -ENOMEM;
105
106 mutex_init(&mc->lock);
107
108 dev_set_drvdata(&spi->dev, mc);
109
110 mc->spi = spi;
111
112 mc->chip.label = DRIVER_NAME,
113 mc->chip.set = mc33880_set;
114 mc->chip.base = pdata->base;
115 mc->chip.ngpio = PIN_NUMBER;
116 mc->chip.can_sleep = 1;
117 mc->chip.dev = &spi->dev;
118 mc->chip.owner = THIS_MODULE;
119
120 mc->port_config = 0x00;
121 /* write twice, because during initialisation the first setting
122 * is just for testing SPI communication, and the second is the
123 * "real" configuration
124 */
125 ret = mc33880_write_config(mc);
126 mc->port_config = 0x00;
127 if (!ret)
128 ret = mc33880_write_config(mc);
129
130 if (ret) {
131 printk(KERN_ERR "Failed writing to " DRIVER_NAME ": %d\n", ret);
132 goto exit_destroy;
133 }
134
135 ret = gpiochip_add(&mc->chip);
136 if (ret)
137 goto exit_destroy;
138
139 return ret;
140
141exit_destroy:
142 dev_set_drvdata(&spi->dev, NULL);
143 mutex_destroy(&mc->lock);
144 kfree(mc);
145 return ret;
146}
147
148static int mc33880_remove(struct spi_device *spi)
149{
150 struct mc33880 *mc;
151 int ret;
152
153 mc = dev_get_drvdata(&spi->dev);
154 if (mc == NULL)
155 return -ENODEV;
156
157 dev_set_drvdata(&spi->dev, NULL);
158
159 ret = gpiochip_remove(&mc->chip);
160 if (!ret) {
161 mutex_destroy(&mc->lock);
162 kfree(mc);
163 } else
164 dev_err(&spi->dev, "Failed to remove the GPIO controller: %d\n",
165 ret);
166
167 return ret;
168}
169
170static struct spi_driver mc33880_driver = {
171 .driver = {
172 .name = DRIVER_NAME,
173 .owner = THIS_MODULE,
174 },
175 .probe = mc33880_probe,
176 .remove = __devexit_p(mc33880_remove),
177};
178
179static int __init mc33880_init(void)
180{
181 return spi_register_driver(&mc33880_driver);
182}
183/* register after spi postcore initcall and before
184 * subsys initcalls that may rely on these GPIOs
185 */
186subsys_initcall(mc33880_init);
187
188static void __exit mc33880_exit(void)
189{
190 spi_unregister_driver(&mc33880_driver);
191}
192module_exit(mc33880_exit);
193
194MODULE_AUTHOR("Mocean Laboratories <info@mocean-labs.com>");
195MODULE_LICENSE("GPL v2");
196