diff options
author | James Hogan <james.hogan@imgtec.com> | 2014-03-04 06:28:48 -0500 |
---|---|---|
committer | Linus Walleij <linus.walleij@linaro.org> | 2014-03-06 22:57:00 -0500 |
commit | d3e144532703fe2454b56eddb56f30d2d620187b (patch) | |
tree | 619d914080d5e089a43b9a21861b1099112f6df0 /drivers/gpio/gpio-tz1090.c | |
parent | f438acdf3de8f19ad2789eddbf52e3280292759b (diff) |
gpio-tz1090: Replace commas with semi-colons
Replace commas with semicolons between irqchip callback initialisation
statements in tz1090_gpio_bank_probe. The commas appear to be a subtle
remnant of when the irqchips were statically initialised.
Thanks to Thomas Gleixner for spotting it while whipping up a coccinelle
script.
Reported-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Alexandre Courbot <gnurou@gmail.com>
Cc: linux-gpio@vger.kernel.org
Cc: linux-metag@vger.kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/gpio/gpio-tz1090.c')
-rw-r--r-- | drivers/gpio/gpio-tz1090.c | 28 |
1 files changed, 14 insertions, 14 deletions
diff --git a/drivers/gpio/gpio-tz1090.c b/drivers/gpio/gpio-tz1090.c index 23e061392411..5246a60eff6d 100644 --- a/drivers/gpio/gpio-tz1090.c +++ b/drivers/gpio/gpio-tz1090.c | |||
@@ -488,26 +488,26 @@ static int tz1090_gpio_bank_probe(struct tz1090_gpio_bank_info *info) | |||
488 | gc->chip_types[0].handler = handle_level_irq; | 488 | gc->chip_types[0].handler = handle_level_irq; |
489 | gc->chip_types[0].regs.ack = REG_GPIO_IRQ_STS; | 489 | gc->chip_types[0].regs.ack = REG_GPIO_IRQ_STS; |
490 | gc->chip_types[0].regs.mask = REG_GPIO_IRQ_EN; | 490 | gc->chip_types[0].regs.mask = REG_GPIO_IRQ_EN; |
491 | gc->chip_types[0].chip.irq_startup = gpio_startup_irq, | 491 | gc->chip_types[0].chip.irq_startup = gpio_startup_irq; |
492 | gc->chip_types[0].chip.irq_ack = irq_gc_ack_clr_bit, | 492 | gc->chip_types[0].chip.irq_ack = irq_gc_ack_clr_bit; |
493 | gc->chip_types[0].chip.irq_mask = irq_gc_mask_clr_bit, | 493 | gc->chip_types[0].chip.irq_mask = irq_gc_mask_clr_bit; |
494 | gc->chip_types[0].chip.irq_unmask = irq_gc_mask_set_bit, | 494 | gc->chip_types[0].chip.irq_unmask = irq_gc_mask_set_bit; |
495 | gc->chip_types[0].chip.irq_set_type = gpio_set_irq_type, | 495 | gc->chip_types[0].chip.irq_set_type = gpio_set_irq_type; |
496 | gc->chip_types[0].chip.irq_set_wake = gpio_set_irq_wake, | 496 | gc->chip_types[0].chip.irq_set_wake = gpio_set_irq_wake; |
497 | gc->chip_types[0].chip.flags = IRQCHIP_MASK_ON_SUSPEND, | 497 | gc->chip_types[0].chip.flags = IRQCHIP_MASK_ON_SUSPEND; |
498 | 498 | ||
499 | /* edge chip type */ | 499 | /* edge chip type */ |
500 | gc->chip_types[1].type = IRQ_TYPE_EDGE_BOTH; | 500 | gc->chip_types[1].type = IRQ_TYPE_EDGE_BOTH; |
501 | gc->chip_types[1].handler = handle_edge_irq; | 501 | gc->chip_types[1].handler = handle_edge_irq; |
502 | gc->chip_types[1].regs.ack = REG_GPIO_IRQ_STS; | 502 | gc->chip_types[1].regs.ack = REG_GPIO_IRQ_STS; |
503 | gc->chip_types[1].regs.mask = REG_GPIO_IRQ_EN; | 503 | gc->chip_types[1].regs.mask = REG_GPIO_IRQ_EN; |
504 | gc->chip_types[1].chip.irq_startup = gpio_startup_irq, | 504 | gc->chip_types[1].chip.irq_startup = gpio_startup_irq; |
505 | gc->chip_types[1].chip.irq_ack = irq_gc_ack_clr_bit, | 505 | gc->chip_types[1].chip.irq_ack = irq_gc_ack_clr_bit; |
506 | gc->chip_types[1].chip.irq_mask = irq_gc_mask_clr_bit, | 506 | gc->chip_types[1].chip.irq_mask = irq_gc_mask_clr_bit; |
507 | gc->chip_types[1].chip.irq_unmask = irq_gc_mask_set_bit, | 507 | gc->chip_types[1].chip.irq_unmask = irq_gc_mask_set_bit; |
508 | gc->chip_types[1].chip.irq_set_type = gpio_set_irq_type, | 508 | gc->chip_types[1].chip.irq_set_type = gpio_set_irq_type; |
509 | gc->chip_types[1].chip.irq_set_wake = gpio_set_irq_wake, | 509 | gc->chip_types[1].chip.irq_set_wake = gpio_set_irq_wake; |
510 | gc->chip_types[1].chip.flags = IRQCHIP_MASK_ON_SUSPEND, | 510 | gc->chip_types[1].chip.flags = IRQCHIP_MASK_ON_SUSPEND; |
511 | 511 | ||
512 | /* Setup chained handler for this GPIO bank */ | 512 | /* Setup chained handler for this GPIO bank */ |
513 | irq_set_handler_data(bank->irq, bank); | 513 | irq_set_handler_data(bank->irq, bank); |