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authorGrygorii Strashko <grygorii.strashko@ti.com>2014-09-03 13:05:34 -0400
committerLinus Walleij <linus.walleij@linaro.org>2014-09-16 17:42:16 -0400
commit2134cb997f2f1b2d960ad8705d67dc8d690ba59c (patch)
tree097a63db8464dc86af25ba9480a21ed21105cd34 /drivers/gpio/gpio-syscon.c
parent5a3e3f88b0a10f8b5baf224ebda5916195fb8745 (diff)
gpio: syscon: reuse for keystone 2 socs
On Keystone SOCs, ARM host can send interrupts to DSP cores using the DSP GPIO controller IP. Each DSP GPIO controller provides 28 IRQ signals for each DSP core. This is one of the component used by the IPC mechanism used on Keystone SOCs. Keystone 2 DSP GPIO controller has specific features: - each GPIO can be configured only as output pin; - setting GPIO value to 1 causes IRQ generation on target DSP core; - reading pin value returns 0 - if IRQ was handled or 1 - IRQ is still pending. This patch updates gpio-syscon driver to be reused by Keystone 2 SoCs, because the Keystone 2 DSP GPIO controller is controlled through Syscon devices and, as requested by Linus Walleij, such kind of GPIO controllers should be integrated with drivers/gpio/gpio-syscon.c driver. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/gpio/gpio-syscon.c')
-rw-r--r--drivers/gpio/gpio-syscon.c35
1 files changed, 35 insertions, 0 deletions
diff --git a/drivers/gpio/gpio-syscon.c b/drivers/gpio/gpio-syscon.c
index 049391bf80ee..e82fde4b6898 100644
--- a/drivers/gpio/gpio-syscon.c
+++ b/drivers/gpio/gpio-syscon.c
@@ -140,11 +140,46 @@ static const struct syscon_gpio_data clps711x_mctrl_gpio = {
140 .dat_bit_offset = 0x40 * 8 + 8, 140 .dat_bit_offset = 0x40 * 8 + 8,
141}; 141};
142 142
143#define KEYSTONE_LOCK_BIT BIT(0)
144
145static void keystone_gpio_set(struct gpio_chip *chip, unsigned offset, int val)
146{
147 struct syscon_gpio_priv *priv = to_syscon_gpio(chip);
148 unsigned int offs;
149 int ret;
150
151 offs = priv->dreg_offset + priv->data->dat_bit_offset + offset;
152
153 if (!val)
154 return;
155
156 ret = regmap_update_bits(
157 priv->syscon,
158 (offs / SYSCON_REG_BITS) * SYSCON_REG_SIZE,
159 BIT(offs % SYSCON_REG_BITS) | KEYSTONE_LOCK_BIT,
160 BIT(offs % SYSCON_REG_BITS) | KEYSTONE_LOCK_BIT);
161 if (ret < 0)
162 dev_err(chip->dev, "gpio write failed ret(%d)\n", ret);
163}
164
165static const struct syscon_gpio_data keystone_dsp_gpio = {
166 /* ARM Keystone 2 */
167 .compatible = NULL,
168 .flags = GPIO_SYSCON_FEAT_OUT,
169 .bit_count = 28,
170 .dat_bit_offset = 4,
171 .set = keystone_gpio_set,
172};
173
143static const struct of_device_id syscon_gpio_ids[] = { 174static const struct of_device_id syscon_gpio_ids[] = {
144 { 175 {
145 .compatible = "cirrus,clps711x-mctrl-gpio", 176 .compatible = "cirrus,clps711x-mctrl-gpio",
146 .data = &clps711x_mctrl_gpio, 177 .data = &clps711x_mctrl_gpio,
147 }, 178 },
179 {
180 .compatible = "ti,keystone-dsp-gpio",
181 .data = &keystone_dsp_gpio,
182 },
148 { } 183 { }
149}; 184};
150MODULE_DEVICE_TABLE(of, syscon_gpio_ids); 185MODULE_DEVICE_TABLE(of, syscon_gpio_ids);