diff options
author | Benoit Cousson <b-cousson@ti.com> | 2012-02-23 15:50:10 -0500 |
---|---|---|
committer | Benoit Cousson <b-cousson@ti.com> | 2012-03-05 17:02:53 -0500 |
commit | 25db711df3258d125dc1209800317e5c0ef3c870 (patch) | |
tree | 7445b68d6f50f65cb1f316dcf135494e3737910a /drivers/gpio/gpio-omap.c | |
parent | 384ebe1c2849160d040df3e68634ec506f13d9ff (diff) |
gpio/omap: Fix IRQ handling for SPARSE_IRQ
The driver is still relying on internal OMAP IRQ defines that
are not relevant anymore if OMAP is built with SPARSE_IRQ.
Replace the defines with the proper IRQ base number.
Clean some comment style issue.
Remove some hidden and ugly cpu_class_is_omap1() inside the
gpio header.
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Tested-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Diffstat (limited to 'drivers/gpio/gpio-omap.c')
-rw-r--r-- | drivers/gpio/gpio-omap.c | 33 |
1 files changed, 17 insertions, 16 deletions
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c index bc2bd698ff2a..afef0f7c8adf 100644 --- a/drivers/gpio/gpio-omap.c +++ b/drivers/gpio/gpio-omap.c | |||
@@ -93,6 +93,11 @@ struct gpio_bank { | |||
93 | #define GPIO_BIT(bank, gpio) (1 << GPIO_INDEX(bank, gpio)) | 93 | #define GPIO_BIT(bank, gpio) (1 << GPIO_INDEX(bank, gpio)) |
94 | #define GPIO_MOD_CTRL_BIT BIT(0) | 94 | #define GPIO_MOD_CTRL_BIT BIT(0) |
95 | 95 | ||
96 | static int irq_to_gpio(struct gpio_bank *bank, unsigned int gpio_irq) | ||
97 | { | ||
98 | return gpio_irq - bank->irq_base + bank->chip.base; | ||
99 | } | ||
100 | |||
96 | static void _set_gpio_direction(struct gpio_bank *bank, int gpio, int is_input) | 101 | static void _set_gpio_direction(struct gpio_bank *bank, int gpio, int is_input) |
97 | { | 102 | { |
98 | void __iomem *reg = bank->base; | 103 | void __iomem *reg = bank->base; |
@@ -369,7 +374,7 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger) | |||
369 | 374 | ||
370 | static int gpio_irq_type(struct irq_data *d, unsigned type) | 375 | static int gpio_irq_type(struct irq_data *d, unsigned type) |
371 | { | 376 | { |
372 | struct gpio_bank *bank; | 377 | struct gpio_bank *bank = irq_data_get_irq_chip_data(d); |
373 | unsigned gpio; | 378 | unsigned gpio; |
374 | int retval; | 379 | int retval; |
375 | unsigned long flags; | 380 | unsigned long flags; |
@@ -377,13 +382,11 @@ static int gpio_irq_type(struct irq_data *d, unsigned type) | |||
377 | if (!cpu_class_is_omap2() && d->irq > IH_MPUIO_BASE) | 382 | if (!cpu_class_is_omap2() && d->irq > IH_MPUIO_BASE) |
378 | gpio = OMAP_MPUIO(d->irq - IH_MPUIO_BASE); | 383 | gpio = OMAP_MPUIO(d->irq - IH_MPUIO_BASE); |
379 | else | 384 | else |
380 | gpio = d->irq - IH_GPIO_BASE; | 385 | gpio = irq_to_gpio(bank, d->irq); |
381 | 386 | ||
382 | if (type & ~IRQ_TYPE_SENSE_MASK) | 387 | if (type & ~IRQ_TYPE_SENSE_MASK) |
383 | return -EINVAL; | 388 | return -EINVAL; |
384 | 389 | ||
385 | bank = irq_data_get_irq_chip_data(d); | ||
386 | |||
387 | if (!bank->regs->leveldetect0 && | 390 | if (!bank->regs->leveldetect0 && |
388 | (type & (IRQ_TYPE_LEVEL_LOW|IRQ_TYPE_LEVEL_HIGH))) | 391 | (type & (IRQ_TYPE_LEVEL_LOW|IRQ_TYPE_LEVEL_HIGH))) |
389 | return -EINVAL; | 392 | return -EINVAL; |
@@ -524,14 +527,10 @@ static void _reset_gpio(struct gpio_bank *bank, int gpio) | |||
524 | /* Use disable_irq_wake() and enable_irq_wake() functions from drivers */ | 527 | /* Use disable_irq_wake() and enable_irq_wake() functions from drivers */ |
525 | static int gpio_wake_enable(struct irq_data *d, unsigned int enable) | 528 | static int gpio_wake_enable(struct irq_data *d, unsigned int enable) |
526 | { | 529 | { |
527 | unsigned int gpio = d->irq - IH_GPIO_BASE; | 530 | struct gpio_bank *bank = irq_data_get_irq_chip_data(d); |
528 | struct gpio_bank *bank; | 531 | unsigned int gpio = irq_to_gpio(bank, d->irq); |
529 | int retval; | ||
530 | |||
531 | bank = irq_data_get_irq_chip_data(d); | ||
532 | retval = _set_gpio_wakeup(bank, gpio, enable); | ||
533 | 532 | ||
534 | return retval; | 533 | return _set_gpio_wakeup(bank, gpio, enable); |
535 | } | 534 | } |
536 | 535 | ||
537 | static int omap_gpio_request(struct gpio_chip *chip, unsigned offset) | 536 | static int omap_gpio_request(struct gpio_chip *chip, unsigned offset) |
@@ -675,11 +674,13 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc) | |||
675 | 674 | ||
676 | gpio_irq = bank->irq_base; | 675 | gpio_irq = bank->irq_base; |
677 | for (; isr != 0; isr >>= 1, gpio_irq++) { | 676 | for (; isr != 0; isr >>= 1, gpio_irq++) { |
678 | gpio_index = GPIO_INDEX(bank, irq_to_gpio(gpio_irq)); | 677 | int gpio = irq_to_gpio(bank, gpio_irq); |
679 | 678 | ||
680 | if (!(isr & 1)) | 679 | if (!(isr & 1)) |
681 | continue; | 680 | continue; |
682 | 681 | ||
682 | gpio_index = GPIO_INDEX(bank, gpio); | ||
683 | |||
683 | /* | 684 | /* |
684 | * Some chips can't respond to both rising and falling | 685 | * Some chips can't respond to both rising and falling |
685 | * at the same time. If this irq was requested with | 686 | * at the same time. If this irq was requested with |
@@ -705,8 +706,8 @@ exit: | |||
705 | 706 | ||
706 | static void gpio_irq_shutdown(struct irq_data *d) | 707 | static void gpio_irq_shutdown(struct irq_data *d) |
707 | { | 708 | { |
708 | unsigned int gpio = d->irq - IH_GPIO_BASE; | ||
709 | struct gpio_bank *bank = irq_data_get_irq_chip_data(d); | 709 | struct gpio_bank *bank = irq_data_get_irq_chip_data(d); |
710 | unsigned int gpio = irq_to_gpio(bank, d->irq); | ||
710 | unsigned long flags; | 711 | unsigned long flags; |
711 | 712 | ||
712 | spin_lock_irqsave(&bank->lock, flags); | 713 | spin_lock_irqsave(&bank->lock, flags); |
@@ -716,16 +717,16 @@ static void gpio_irq_shutdown(struct irq_data *d) | |||
716 | 717 | ||
717 | static void gpio_ack_irq(struct irq_data *d) | 718 | static void gpio_ack_irq(struct irq_data *d) |
718 | { | 719 | { |
719 | unsigned int gpio = d->irq - IH_GPIO_BASE; | ||
720 | struct gpio_bank *bank = irq_data_get_irq_chip_data(d); | 720 | struct gpio_bank *bank = irq_data_get_irq_chip_data(d); |
721 | unsigned int gpio = irq_to_gpio(bank, d->irq); | ||
721 | 722 | ||
722 | _clear_gpio_irqstatus(bank, gpio); | 723 | _clear_gpio_irqstatus(bank, gpio); |
723 | } | 724 | } |
724 | 725 | ||
725 | static void gpio_mask_irq(struct irq_data *d) | 726 | static void gpio_mask_irq(struct irq_data *d) |
726 | { | 727 | { |
727 | unsigned int gpio = d->irq - IH_GPIO_BASE; | ||
728 | struct gpio_bank *bank = irq_data_get_irq_chip_data(d); | 728 | struct gpio_bank *bank = irq_data_get_irq_chip_data(d); |
729 | unsigned int gpio = irq_to_gpio(bank, d->irq); | ||
729 | unsigned long flags; | 730 | unsigned long flags; |
730 | 731 | ||
731 | spin_lock_irqsave(&bank->lock, flags); | 732 | spin_lock_irqsave(&bank->lock, flags); |
@@ -736,8 +737,8 @@ static void gpio_mask_irq(struct irq_data *d) | |||
736 | 737 | ||
737 | static void gpio_unmask_irq(struct irq_data *d) | 738 | static void gpio_unmask_irq(struct irq_data *d) |
738 | { | 739 | { |
739 | unsigned int gpio = d->irq - IH_GPIO_BASE; | ||
740 | struct gpio_bank *bank = irq_data_get_irq_chip_data(d); | 740 | struct gpio_bank *bank = irq_data_get_irq_chip_data(d); |
741 | unsigned int gpio = irq_to_gpio(bank, d->irq); | ||
741 | unsigned int irq_mask = GPIO_BIT(bank, gpio); | 742 | unsigned int irq_mask = GPIO_BIT(bank, gpio); |
742 | u32 trigger = irqd_get_trigger_type(d); | 743 | u32 trigger = irqd_get_trigger_type(d); |
743 | unsigned long flags; | 744 | unsigned long flags; |