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authorRajendra Nayak <rnayak@ti.com>2014-04-23 02:11:03 -0400
committerLinus Walleij <linus.walleij@linaro.org>2014-05-16 11:52:35 -0400
commit345477ffe2ed0c53ffbbfeae73f9bca38e827d0d (patch)
treea404efafcbf41970ed60d323590458d865dafa99 /drivers/gpio/gpio-omap.c
parent09ffa131c773a041ecbc9ca4a8033493d69b89b9 (diff)
gpio: omap: prepare and unprepare the debounce clock
Replace the clk_enable()s with a clk_prepare_enable() and the clk_disables()s with a clk_disable_unprepare() This never showed issues due to the OMAP platform code (hwmod) leaving these clocks in clk_prepare()ed state by default. Reported-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Rajendra Nayak <rnayak@ti.com> Acked-by: Javier Martinez Canillas <javier@dowhile0.org> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/gpio/gpio-omap.c')
-rw-r--r--drivers/gpio/gpio-omap.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index 01d50a090d87..00f29aa1fb9d 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -178,7 +178,7 @@ static inline void _gpio_rmw(void __iomem *base, u32 reg, u32 mask, bool set)
178static inline void _gpio_dbck_enable(struct gpio_bank *bank) 178static inline void _gpio_dbck_enable(struct gpio_bank *bank)
179{ 179{
180 if (bank->dbck_enable_mask && !bank->dbck_enabled) { 180 if (bank->dbck_enable_mask && !bank->dbck_enabled) {
181 clk_enable(bank->dbck); 181 clk_prepare_enable(bank->dbck);
182 bank->dbck_enabled = true; 182 bank->dbck_enabled = true;
183 183
184 writel_relaxed(bank->dbck_enable_mask, 184 writel_relaxed(bank->dbck_enable_mask,
@@ -196,7 +196,7 @@ static inline void _gpio_dbck_disable(struct gpio_bank *bank)
196 */ 196 */
197 writel_relaxed(0, bank->base + bank->regs->debounce_en); 197 writel_relaxed(0, bank->base + bank->regs->debounce_en);
198 198
199 clk_disable(bank->dbck); 199 clk_disable_unprepare(bank->dbck);
200 bank->dbck_enabled = false; 200 bank->dbck_enabled = false;
201 } 201 }
202} 202}
@@ -229,7 +229,7 @@ static void _set_gpio_debounce(struct gpio_bank *bank, unsigned gpio,
229 229
230 l = GPIO_BIT(bank, gpio); 230 l = GPIO_BIT(bank, gpio);
231 231
232 clk_enable(bank->dbck); 232 clk_prepare_enable(bank->dbck);
233 reg = bank->base + bank->regs->debounce; 233 reg = bank->base + bank->regs->debounce;
234 writel_relaxed(debounce, reg); 234 writel_relaxed(debounce, reg);
235 235
@@ -243,7 +243,7 @@ static void _set_gpio_debounce(struct gpio_bank *bank, unsigned gpio,
243 bank->dbck_enable_mask = val; 243 bank->dbck_enable_mask = val;
244 244
245 writel_relaxed(val, reg); 245 writel_relaxed(val, reg);
246 clk_disable(bank->dbck); 246 clk_disable_unprepare(bank->dbck);
247 /* 247 /*
248 * Enable debounce clock per module. 248 * Enable debounce clock per module.
249 * This call is mandatory because in omap_gpio_request() when 249 * This call is mandatory because in omap_gpio_request() when
@@ -288,7 +288,7 @@ static void _clear_gpio_debounce(struct gpio_bank *bank, unsigned gpio)
288 bank->context.debounce = 0; 288 bank->context.debounce = 0;
289 writel_relaxed(bank->context.debounce, bank->base + 289 writel_relaxed(bank->context.debounce, bank->base +
290 bank->regs->debounce); 290 bank->regs->debounce);
291 clk_disable(bank->dbck); 291 clk_disable_unprepare(bank->dbck);
292 bank->dbck_enabled = false; 292 bank->dbck_enabled = false;
293 } 293 }
294} 294}