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authorKevin Hilman <khilman@ti.com>2011-04-22 10:59:07 -0400
committerKevin Hilman <khilman@ti.com>2011-06-16 14:13:32 -0400
commit129fd2230733ff0457e76d6aabde136cf8666bc0 (patch)
treed2f1d90f4629e93cd02d17211eb2643962bdad8f /drivers/gpio/gpio-omap.c
parentc390aad0330f330ce9818ef5269169bbae335da9 (diff)
gpio/omap: replace get_gpio_index() by using bank width
The get_gpio_index() function, littered with cpu_is_* checks can be easily replaced by using bitops based on the GPIO bank width. Do so. Signed-off-by: Kevin Hilman <khilman@ti.com>
Diffstat (limited to 'drivers/gpio/gpio-omap.c')
-rw-r--r--drivers/gpio/gpio-omap.c42
1 files changed, 17 insertions, 25 deletions
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index 0766aa1c3f31..72811a3b9158 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -83,6 +83,9 @@ static struct gpio_bank *gpio_bank;
83/* TODO: Analyze removing gpio_bank_count usage from driver code */ 83/* TODO: Analyze removing gpio_bank_count usage from driver code */
84int gpio_bank_count; 84int gpio_bank_count;
85 85
86#define GPIO_INDEX(bank, gpio) (gpio % bank->width)
87#define GPIO_BIT(bank, gpio) (1 << GPIO_INDEX(bank, gpio))
88
86static inline struct gpio_bank *get_gpio_bank(int gpio) 89static inline struct gpio_bank *get_gpio_bank(int gpio)
87{ 90{
88 if (cpu_is_omap15xx()) { 91 if (cpu_is_omap15xx()) {
@@ -108,17 +111,6 @@ static inline struct gpio_bank *get_gpio_bank(int gpio)
108 return NULL; 111 return NULL;
109} 112}
110 113
111static inline int get_gpio_index(int gpio)
112{
113 if (cpu_is_omap7xx())
114 return gpio & 0x1f;
115 if (cpu_is_omap24xx())
116 return gpio & 0x1f;
117 if (cpu_is_omap34xx() || cpu_is_omap44xx())
118 return gpio & 0x1f;
119 return gpio & 0x0f;
120}
121
122static inline int gpio_valid(int gpio) 114static inline int gpio_valid(int gpio)
123{ 115{
124 if (gpio < 0) 116 if (gpio < 0)
@@ -313,7 +305,7 @@ static int _get_gpio_datain(struct gpio_bank *bank, int gpio)
313 return -EINVAL; 305 return -EINVAL;
314 } 306 }
315 return (__raw_readl(reg) 307 return (__raw_readl(reg)
316 & (1 << get_gpio_index(gpio))) != 0; 308 & (GPIO_BIT(bank, gpio))) != 0;
317} 309}
318 310
319static int _get_gpio_dataout(struct gpio_bank *bank, int gpio) 311static int _get_gpio_dataout(struct gpio_bank *bank, int gpio)
@@ -359,7 +351,7 @@ static int _get_gpio_dataout(struct gpio_bank *bank, int gpio)
359 return -EINVAL; 351 return -EINVAL;
360 } 352 }
361 353
362 return (__raw_readl(reg) & (1 << get_gpio_index(gpio))) != 0; 354 return (__raw_readl(reg) & GPIO_BIT(bank, gpio)) != 0;
363} 355}
364 356
365#define MOD_REG_BIT(reg, bit_mask, set) \ 357#define MOD_REG_BIT(reg, bit_mask, set) \
@@ -396,7 +388,7 @@ static void _set_gpio_debounce(struct gpio_bank *bank, unsigned gpio,
396 else 388 else
397 debounce = (debounce / 0x1f) - 1; 389 debounce = (debounce / 0x1f) - 1;
398 390
399 l = 1 << get_gpio_index(gpio); 391 l = GPIO_BIT(bank, gpio);
400 392
401 if (bank->method == METHOD_GPIO_44XX) 393 if (bank->method == METHOD_GPIO_44XX)
402 reg += OMAP4_GPIO_DEBOUNCINGTIME; 394 reg += OMAP4_GPIO_DEBOUNCINGTIME;
@@ -640,7 +632,7 @@ static int gpio_irq_type(struct irq_data *d, unsigned type)
640 632
641 bank = irq_data_get_irq_chip_data(d); 633 bank = irq_data_get_irq_chip_data(d);
642 spin_lock_irqsave(&bank->lock, flags); 634 spin_lock_irqsave(&bank->lock, flags);
643 retval = _set_gpio_triggering(bank, get_gpio_index(gpio), type); 635 retval = _set_gpio_triggering(bank, GPIO_INDEX(bank, gpio), type);
644 spin_unlock_irqrestore(&bank->lock, flags); 636 spin_unlock_irqrestore(&bank->lock, flags);
645 637
646 if (type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) 638 if (type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))
@@ -702,7 +694,7 @@ static void _clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask)
702 694
703static inline void _clear_gpio_irqstatus(struct gpio_bank *bank, int gpio) 695static inline void _clear_gpio_irqstatus(struct gpio_bank *bank, int gpio)
704{ 696{
705 _clear_gpio_irqbank(bank, 1 << get_gpio_index(gpio)); 697 _clear_gpio_irqbank(bank, GPIO_BIT(bank, gpio));
706} 698}
707 699
708static u32 _get_gpio_irqbank_mask(struct gpio_bank *bank) 700static u32 _get_gpio_irqbank_mask(struct gpio_bank *bank)
@@ -830,7 +822,7 @@ static void _enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask, int enab
830 822
831static inline void _set_gpio_irqenable(struct gpio_bank *bank, int gpio, int enable) 823static inline void _set_gpio_irqenable(struct gpio_bank *bank, int gpio, int enable)
832{ 824{
833 _enable_gpio_irqbank(bank, 1 << get_gpio_index(gpio), enable); 825 _enable_gpio_irqbank(bank, GPIO_BIT(bank, gpio), enable);
834} 826}
835 827
836/* 828/*
@@ -883,10 +875,10 @@ static int _set_gpio_wakeup(struct gpio_bank *bank, int gpio, int enable)
883 875
884static void _reset_gpio(struct gpio_bank *bank, int gpio) 876static void _reset_gpio(struct gpio_bank *bank, int gpio)
885{ 877{
886 _set_gpio_direction(bank, get_gpio_index(gpio), 1); 878 _set_gpio_direction(bank, GPIO_INDEX(bank, gpio), 1);
887 _set_gpio_irqenable(bank, gpio, 0); 879 _set_gpio_irqenable(bank, gpio, 0);
888 _clear_gpio_irqstatus(bank, gpio); 880 _clear_gpio_irqstatus(bank, gpio);
889 _set_gpio_triggering(bank, get_gpio_index(gpio), IRQ_TYPE_NONE); 881 _set_gpio_triggering(bank, GPIO_INDEX(bank, gpio), IRQ_TYPE_NONE);
890} 882}
891 883
892/* Use disable_irq_wake() and enable_irq_wake() functions from drivers */ 884/* Use disable_irq_wake() and enable_irq_wake() functions from drivers */
@@ -899,7 +891,7 @@ static int gpio_wake_enable(struct irq_data *d, unsigned int enable)
899 if (check_gpio(gpio) < 0) 891 if (check_gpio(gpio) < 0)
900 return -ENODEV; 892 return -ENODEV;
901 bank = irq_data_get_irq_chip_data(d); 893 bank = irq_data_get_irq_chip_data(d);
902 retval = _set_gpio_wakeup(bank, get_gpio_index(gpio), enable); 894 retval = _set_gpio_wakeup(bank, GPIO_INDEX(bank, gpio), enable);
903 895
904 return retval; 896 return retval;
905} 897}
@@ -1079,7 +1071,7 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
1079 1071
1080 gpio_irq = bank->virtual_irq_start; 1072 gpio_irq = bank->virtual_irq_start;
1081 for (; isr != 0; isr >>= 1, gpio_irq++) { 1073 for (; isr != 0; isr >>= 1, gpio_irq++) {
1082 gpio_index = get_gpio_index(irq_to_gpio(gpio_irq)); 1074 gpio_index = GPIO_INDEX(bank, irq_to_gpio(gpio_irq));
1083 1075
1084 if (!(isr & 1)) 1076 if (!(isr & 1))
1085 continue; 1077 continue;
@@ -1135,7 +1127,7 @@ static void gpio_mask_irq(struct irq_data *d)
1135 1127
1136 spin_lock_irqsave(&bank->lock, flags); 1128 spin_lock_irqsave(&bank->lock, flags);
1137 _set_gpio_irqenable(bank, gpio, 0); 1129 _set_gpio_irqenable(bank, gpio, 0);
1138 _set_gpio_triggering(bank, get_gpio_index(gpio), IRQ_TYPE_NONE); 1130 _set_gpio_triggering(bank, GPIO_INDEX(bank, gpio), IRQ_TYPE_NONE);
1139 spin_unlock_irqrestore(&bank->lock, flags); 1131 spin_unlock_irqrestore(&bank->lock, flags);
1140} 1132}
1141 1133
@@ -1143,13 +1135,13 @@ static void gpio_unmask_irq(struct irq_data *d)
1143{ 1135{
1144 unsigned int gpio = d->irq - IH_GPIO_BASE; 1136 unsigned int gpio = d->irq - IH_GPIO_BASE;
1145 struct gpio_bank *bank = irq_data_get_irq_chip_data(d); 1137 struct gpio_bank *bank = irq_data_get_irq_chip_data(d);
1146 unsigned int irq_mask = 1 << get_gpio_index(gpio); 1138 unsigned int irq_mask = GPIO_BIT(bank, gpio);
1147 u32 trigger = irqd_get_trigger_type(d); 1139 u32 trigger = irqd_get_trigger_type(d);
1148 unsigned long flags; 1140 unsigned long flags;
1149 1141
1150 spin_lock_irqsave(&bank->lock, flags); 1142 spin_lock_irqsave(&bank->lock, flags);
1151 if (trigger) 1143 if (trigger)
1152 _set_gpio_triggering(bank, get_gpio_index(gpio), trigger); 1144 _set_gpio_triggering(bank, GPIO_INDEX(bank, gpio), trigger);
1153 1145
1154 /* For level-triggered GPIOs, the clearing must be done after 1146 /* For level-triggered GPIOs, the clearing must be done after
1155 * the HW source is cleared, thus after the handler has run */ 1147 * the HW source is cleared, thus after the handler has run */
@@ -1352,7 +1344,7 @@ static int gpio_get(struct gpio_chip *chip, unsigned offset)
1352 gpio = chip->base + offset; 1344 gpio = chip->base + offset;
1353 bank = get_gpio_bank(gpio); 1345 bank = get_gpio_bank(gpio);
1354 reg = bank->base; 1346 reg = bank->base;
1355 mask = 1 << get_gpio_index(gpio); 1347 mask = GPIO_BIT(bank, gpio);
1356 1348
1357 if (gpio_is_input(bank, mask)) 1349 if (gpio_is_input(bank, mask))
1358 return _get_gpio_datain(bank, gpio); 1350 return _get_gpio_datain(bank, gpio);