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authorKevin Hilman <khilman@ti.com>2011-04-21 12:17:35 -0400
committerKevin Hilman <khilman@ti.com>2011-06-16 14:13:46 -0400
commiteef4bec7bf2fa9953f6b8f371d5914d014f45d40 (patch)
tree9c81437aca15d8d5f4caed2e23d1072877c1e13c /drivers/gpio/gpio-omap.c
parentfa87931acb8203a1f40a3c637863ad238f70cd40 (diff)
gpio/omap: consolidate IRQ status handling, remove #ifdefs
Cleanup IRQ status handling by passing IRQ status register offsets via platform data. Cleans up clearing of GPIO IRQ status and GPIO ISR handler. Signed-off-by: Kevin Hilman <khilman@ti.com>
Diffstat (limited to 'drivers/gpio/gpio-omap.c')
-rw-r--r--drivers/gpio/gpio-omap.c66
1 files changed, 5 insertions, 61 deletions
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index 945642143e1b..bdf0132b70ec 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -481,46 +481,14 @@ static void _clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask)
481{ 481{
482 void __iomem *reg = bank->base; 482 void __iomem *reg = bank->base;
483 483
484 switch (bank->method) { 484 reg += bank->regs->irqstatus;
485#ifdef CONFIG_ARCH_OMAP15XX
486 case METHOD_GPIO_1510:
487 reg += OMAP1510_GPIO_INT_STATUS;
488 break;
489#endif
490#ifdef CONFIG_ARCH_OMAP16XX
491 case METHOD_GPIO_1610:
492 reg += OMAP1610_GPIO_IRQSTATUS1;
493 break;
494#endif
495#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
496 case METHOD_GPIO_7XX:
497 reg += OMAP7XX_GPIO_INT_STATUS;
498 break;
499#endif
500#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
501 case METHOD_GPIO_24XX:
502 reg += OMAP24XX_GPIO_IRQSTATUS1;
503 break;
504#endif
505#if defined(CONFIG_ARCH_OMAP4)
506 case METHOD_GPIO_44XX:
507 reg += OMAP4_GPIO_IRQSTATUS0;
508 break;
509#endif
510 default:
511 WARN_ON(1);
512 return;
513 }
514 __raw_writel(gpio_mask, reg); 485 __raw_writel(gpio_mask, reg);
515 486
516 /* Workaround for clearing DSP GPIO interrupts to allow retention */ 487 /* Workaround for clearing DSP GPIO interrupts to allow retention */
517 if (cpu_is_omap24xx() || cpu_is_omap34xx()) 488 if (bank->regs->irqstatus2) {
518 reg = bank->base + OMAP24XX_GPIO_IRQSTATUS2; 489 reg = bank->base + bank->regs->irqstatus2;
519 else if (cpu_is_omap44xx())
520 reg = bank->base + OMAP4_GPIO_IRQSTATUS1;
521
522 if (cpu_is_omap24xx() || cpu_is_omap34xx() || cpu_is_omap44xx())
523 __raw_writel(gpio_mask, reg); 490 __raw_writel(gpio_mask, reg);
491 }
524 492
525 /* Flush posted write for the irq status to avoid spurious interrupts */ 493 /* Flush posted write for the irq status to avoid spurious interrupts */
526 __raw_readl(reg); 494 __raw_readl(reg);
@@ -841,31 +809,7 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
841 chained_irq_enter(chip, desc); 809 chained_irq_enter(chip, desc);
842 810
843 bank = irq_get_handler_data(irq); 811 bank = irq_get_handler_data(irq);
844#ifdef CONFIG_ARCH_OMAP1 812 isr_reg = bank->base + bank->regs->irqstatus;
845 if (bank->method == METHOD_MPUIO)
846 isr_reg = bank->base +
847 OMAP_MPUIO_GPIO_INT / bank->stride;
848#endif
849#ifdef CONFIG_ARCH_OMAP15XX
850 if (bank->method == METHOD_GPIO_1510)
851 isr_reg = bank->base + OMAP1510_GPIO_INT_STATUS;
852#endif
853#if defined(CONFIG_ARCH_OMAP16XX)
854 if (bank->method == METHOD_GPIO_1610)
855 isr_reg = bank->base + OMAP1610_GPIO_IRQSTATUS1;
856#endif
857#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
858 if (bank->method == METHOD_GPIO_7XX)
859 isr_reg = bank->base + OMAP7XX_GPIO_INT_STATUS;
860#endif
861#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
862 if (bank->method == METHOD_GPIO_24XX)
863 isr_reg = bank->base + OMAP24XX_GPIO_IRQSTATUS1;
864#endif
865#if defined(CONFIG_ARCH_OMAP4)
866 if (bank->method == METHOD_GPIO_44XX)
867 isr_reg = bank->base + OMAP4_GPIO_IRQSTATUS0;
868#endif
869 813
870 if (WARN_ON(!isr_reg)) 814 if (WARN_ON(!isr_reg))
871 goto exit; 815 goto exit;