diff options
author | Charulatha V <charu@ti.com> | 2011-04-18 11:06:51 -0400 |
---|---|---|
committer | Tarun Kanti DebBarma <tarun.kanti@ti.com> | 2012-02-06 03:43:40 -0500 |
commit | 6d62e216b2ccbb8176dca73b6899b12a417bb22d (patch) | |
tree | f52895f475b0be9684056fb8bee75bd273f847ac /drivers/gpio/gpio-omap.c | |
parent | 0cde8d03dd297fa8e7e88cedeb498d0ed5b7776d (diff) |
gpio/omap: make gpio_context part of gpio_bank structure
Currently gpio_context array used to save gpio bank's context, is used only for
OMAP3 architecture. Move gpio_context as part of gpio_bank structure so that it
can be specific to each gpio bank and can be used for any OMAP architecture
Signed-off-by: Charulatha V <charu@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
Diffstat (limited to 'drivers/gpio/gpio-omap.c')
-rw-r--r-- | drivers/gpio/gpio-omap.c | 76 |
1 files changed, 34 insertions, 42 deletions
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c index 07efa15c3549..6788c8a2a770 100644 --- a/drivers/gpio/gpio-omap.c +++ b/drivers/gpio/gpio-omap.c | |||
@@ -30,6 +30,19 @@ | |||
30 | 30 | ||
31 | static LIST_HEAD(omap_gpio_list); | 31 | static LIST_HEAD(omap_gpio_list); |
32 | 32 | ||
33 | struct gpio_regs { | ||
34 | u32 irqenable1; | ||
35 | u32 irqenable2; | ||
36 | u32 wake_en; | ||
37 | u32 ctrl; | ||
38 | u32 oe; | ||
39 | u32 leveldetect0; | ||
40 | u32 leveldetect1; | ||
41 | u32 risingdetect; | ||
42 | u32 fallingdetect; | ||
43 | u32 dataout; | ||
44 | }; | ||
45 | |||
33 | struct gpio_bank { | 46 | struct gpio_bank { |
34 | struct list_head node; | 47 | struct list_head node; |
35 | unsigned long pbase; | 48 | unsigned long pbase; |
@@ -43,7 +56,7 @@ struct gpio_bank { | |||
43 | #endif | 56 | #endif |
44 | u32 non_wakeup_gpios; | 57 | u32 non_wakeup_gpios; |
45 | u32 enabled_non_wakeup_gpios; | 58 | u32 enabled_non_wakeup_gpios; |
46 | 59 | struct gpio_regs context; | |
47 | u32 saved_datain; | 60 | u32 saved_datain; |
48 | u32 saved_fallingdetect; | 61 | u32 saved_fallingdetect; |
49 | u32 saved_risingdetect; | 62 | u32 saved_risingdetect; |
@@ -66,23 +79,6 @@ struct gpio_bank { | |||
66 | struct omap_gpio_reg_offs *regs; | 79 | struct omap_gpio_reg_offs *regs; |
67 | }; | 80 | }; |
68 | 81 | ||
69 | #ifdef CONFIG_ARCH_OMAP3 | ||
70 | struct omap3_gpio_regs { | ||
71 | u32 irqenable1; | ||
72 | u32 irqenable2; | ||
73 | u32 wake_en; | ||
74 | u32 ctrl; | ||
75 | u32 oe; | ||
76 | u32 leveldetect0; | ||
77 | u32 leveldetect1; | ||
78 | u32 risingdetect; | ||
79 | u32 fallingdetect; | ||
80 | u32 dataout; | ||
81 | }; | ||
82 | |||
83 | static struct omap3_gpio_regs gpio_context[OMAP34XX_NR_GPIOS]; | ||
84 | #endif | ||
85 | |||
86 | #define GPIO_INDEX(bank, gpio) (gpio % bank->width) | 82 | #define GPIO_INDEX(bank, gpio) (gpio % bank->width) |
87 | #define GPIO_BIT(bank, gpio) (1 << GPIO_INDEX(bank, gpio)) | 83 | #define GPIO_BIT(bank, gpio) (1 << GPIO_INDEX(bank, gpio)) |
88 | 84 | ||
@@ -1499,33 +1495,31 @@ void omap2_gpio_resume_after_idle(void) | |||
1499 | void omap_gpio_save_context(void) | 1495 | void omap_gpio_save_context(void) |
1500 | { | 1496 | { |
1501 | struct gpio_bank *bank; | 1497 | struct gpio_bank *bank; |
1502 | int i = 0; | ||
1503 | 1498 | ||
1504 | list_for_each_entry(bank, &omap_gpio_list, node) { | 1499 | list_for_each_entry(bank, &omap_gpio_list, node) { |
1505 | i++; | ||
1506 | 1500 | ||
1507 | if (!bank->loses_context) | 1501 | if (!bank->loses_context) |
1508 | continue; | 1502 | continue; |
1509 | 1503 | ||
1510 | gpio_context[i].irqenable1 = | 1504 | bank->context.irqenable1 = |
1511 | __raw_readl(bank->base + OMAP24XX_GPIO_IRQENABLE1); | 1505 | __raw_readl(bank->base + OMAP24XX_GPIO_IRQENABLE1); |
1512 | gpio_context[i].irqenable2 = | 1506 | bank->context.irqenable2 = |
1513 | __raw_readl(bank->base + OMAP24XX_GPIO_IRQENABLE2); | 1507 | __raw_readl(bank->base + OMAP24XX_GPIO_IRQENABLE2); |
1514 | gpio_context[i].wake_en = | 1508 | bank->context.wake_en = |
1515 | __raw_readl(bank->base + OMAP24XX_GPIO_WAKE_EN); | 1509 | __raw_readl(bank->base + OMAP24XX_GPIO_WAKE_EN); |
1516 | gpio_context[i].ctrl = | 1510 | bank->context.ctrl = |
1517 | __raw_readl(bank->base + OMAP24XX_GPIO_CTRL); | 1511 | __raw_readl(bank->base + OMAP24XX_GPIO_CTRL); |
1518 | gpio_context[i].oe = | 1512 | bank->context.oe = |
1519 | __raw_readl(bank->base + OMAP24XX_GPIO_OE); | 1513 | __raw_readl(bank->base + OMAP24XX_GPIO_OE); |
1520 | gpio_context[i].leveldetect0 = | 1514 | bank->context.leveldetect0 = |
1521 | __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT0); | 1515 | __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT0); |
1522 | gpio_context[i].leveldetect1 = | 1516 | bank->context.leveldetect1 = |
1523 | __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT1); | 1517 | __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT1); |
1524 | gpio_context[i].risingdetect = | 1518 | bank->context.risingdetect = |
1525 | __raw_readl(bank->base + OMAP24XX_GPIO_RISINGDETECT); | 1519 | __raw_readl(bank->base + OMAP24XX_GPIO_RISINGDETECT); |
1526 | gpio_context[i].fallingdetect = | 1520 | bank->context.fallingdetect = |
1527 | __raw_readl(bank->base + OMAP24XX_GPIO_FALLINGDETECT); | 1521 | __raw_readl(bank->base + OMAP24XX_GPIO_FALLINGDETECT); |
1528 | gpio_context[i].dataout = | 1522 | bank->context.dataout = |
1529 | __raw_readl(bank->base + OMAP24XX_GPIO_DATAOUT); | 1523 | __raw_readl(bank->base + OMAP24XX_GPIO_DATAOUT); |
1530 | } | 1524 | } |
1531 | } | 1525 | } |
@@ -1533,33 +1527,31 @@ void omap_gpio_save_context(void) | |||
1533 | void omap_gpio_restore_context(void) | 1527 | void omap_gpio_restore_context(void) |
1534 | { | 1528 | { |
1535 | struct gpio_bank *bank; | 1529 | struct gpio_bank *bank; |
1536 | int i = 0; | ||
1537 | 1530 | ||
1538 | list_for_each_entry(bank, &omap_gpio_list, node) { | 1531 | list_for_each_entry(bank, &omap_gpio_list, node) { |
1539 | i++; | ||
1540 | 1532 | ||
1541 | if (!bank->loses_context) | 1533 | if (!bank->loses_context) |
1542 | continue; | 1534 | continue; |
1543 | 1535 | ||
1544 | __raw_writel(gpio_context[i].irqenable1, | 1536 | __raw_writel(bank->context.irqenable1, |
1545 | bank->base + OMAP24XX_GPIO_IRQENABLE1); | 1537 | bank->base + OMAP24XX_GPIO_IRQENABLE1); |
1546 | __raw_writel(gpio_context[i].irqenable2, | 1538 | __raw_writel(bank->context.irqenable2, |
1547 | bank->base + OMAP24XX_GPIO_IRQENABLE2); | 1539 | bank->base + OMAP24XX_GPIO_IRQENABLE2); |
1548 | __raw_writel(gpio_context[i].wake_en, | 1540 | __raw_writel(bank->context.wake_en, |
1549 | bank->base + OMAP24XX_GPIO_WAKE_EN); | 1541 | bank->base + OMAP24XX_GPIO_WAKE_EN); |
1550 | __raw_writel(gpio_context[i].ctrl, | 1542 | __raw_writel(bank->context.ctrl, |
1551 | bank->base + OMAP24XX_GPIO_CTRL); | 1543 | bank->base + OMAP24XX_GPIO_CTRL); |
1552 | __raw_writel(gpio_context[i].oe, | 1544 | __raw_writel(bank->context.oe, |
1553 | bank->base + OMAP24XX_GPIO_OE); | 1545 | bank->base + OMAP24XX_GPIO_OE); |
1554 | __raw_writel(gpio_context[i].leveldetect0, | 1546 | __raw_writel(bank->context.leveldetect0, |
1555 | bank->base + OMAP24XX_GPIO_LEVELDETECT0); | 1547 | bank->base + OMAP24XX_GPIO_LEVELDETECT0); |
1556 | __raw_writel(gpio_context[i].leveldetect1, | 1548 | __raw_writel(bank->context.leveldetect1, |
1557 | bank->base + OMAP24XX_GPIO_LEVELDETECT1); | 1549 | bank->base + OMAP24XX_GPIO_LEVELDETECT1); |
1558 | __raw_writel(gpio_context[i].risingdetect, | 1550 | __raw_writel(bank->context.risingdetect, |
1559 | bank->base + OMAP24XX_GPIO_RISINGDETECT); | 1551 | bank->base + OMAP24XX_GPIO_RISINGDETECT); |
1560 | __raw_writel(gpio_context[i].fallingdetect, | 1552 | __raw_writel(bank->context.fallingdetect, |
1561 | bank->base + OMAP24XX_GPIO_FALLINGDETECT); | 1553 | bank->base + OMAP24XX_GPIO_FALLINGDETECT); |
1562 | __raw_writel(gpio_context[i].dataout, | 1554 | __raw_writel(bank->context.dataout, |
1563 | bank->base + OMAP24XX_GPIO_DATAOUT); | 1555 | bank->base + OMAP24XX_GPIO_DATAOUT); |
1564 | } | 1556 | } |
1565 | } | 1557 | } |