Merge branch 'cgroup/for-3.7-fixes' into cgroup/for-3.8

This is to receive device_cgroup fixes so that further device_cgroup
changes can be made in cgroup/for-3.8.

Signed-off-by: Tejun Heo <tj@kernel.org>

1 files changed, 6 insertions, 1 deletions

diff --git a/drivers/gpio/gpio-mvebu.c b/drivers/gpio/gpio-mvebu.c
index 902af437eaf2..cf7afb9eb61a 100644
--- a/drivers/gpio/gpio-mvebu.c
+++ b/drivers/gpio/gpio-mvebu.c
@@ -244,6 +244,8 @@ static int mvebu_gpio_direction_output(struct gpio_chip *chip, unsigned pin,
         if (ret)
                 return ret;
 
+        mvebu_gpio_set(chip, pin, value);
+
         spin_lock_irqsave(&mvchip->lock, flags);
         u = readl_relaxed(mvebu_gpioreg_io_conf(mvchip));
         u &= ~(1 << pin);
@@ -381,11 +383,13 @@ static int mvebu_gpio_irq_set_type(struct irq_data *d, unsigned int type)
                 u = readl_relaxed(mvebu_gpioreg_in_pol(mvchip));
                 u &= ~(1 << pin);
                 writel_relaxed(u, mvebu_gpioreg_in_pol(mvchip));
+                break;
         case IRQ_TYPE_EDGE_FALLING:
         case IRQ_TYPE_LEVEL_LOW:
                 u = readl_relaxed(mvebu_gpioreg_in_pol(mvchip));
                 u |= 1 << pin;
                 writel_relaxed(u, mvebu_gpioreg_in_pol(mvchip));
+                break;
         case IRQ_TYPE_EDGE_BOTH: {
                 u32 v;
 
@@ -401,6 +405,7 @@ static int mvebu_gpio_irq_set_type(struct irq_data *d, unsigned int type)
                 else
                         u &= ~(1 << pin);       /* rising */
                 writel_relaxed(u, mvebu_gpioreg_in_pol(mvchip));
+                break;
         }
         }
         return 0;
@@ -641,7 +646,7 @@ static int __devinit mvebu_gpio_probe(struct platform_device *pdev)
         ct->handler = handle_edge_irq;
         ct->chip.name = mvchip->chip.label;
 
-        irq_setup_generic_chip(gc, IRQ_MSK(ngpios), IRQ_GC_INIT_MASK_CACHE,
+        irq_setup_generic_chip(gc, IRQ_MSK(ngpios), 0,
                                IRQ_NOREQUEST, IRQ_LEVEL | IRQ_NOPROBE);
 
         /* Setup irq domain on top of the generic chip. */