diff options
author | Linus Walleij <linus.walleij@linaro.org> | 2013-12-04 08:42:46 -0500 |
---|---|---|
committer | Linus Walleij <linus.walleij@linaro.org> | 2013-12-04 08:42:46 -0500 |
commit | 9fb1f39eb2d6707d265087ee186376e24995f55a (patch) | |
tree | 044991cf1953b02b3f820f458600fb816d913b61 /drivers/gpio/gpio-lpc32xx.c | |
parent | b7d0a28a9f65c4f8a547ceece820b8167a854968 (diff) |
gpio/pinctrl: make gpio_chip members typed boolean
This switches the two members of struct gpio_chip that were
defined as unsigned foo:1 to bool, because that is indeed what
they are. Switch all users in the gpio and pinctrl subsystems
to assign these values with true/false instead of 0/1. The
users outside these subsystems will survive since true/false
is 1/0, atleast we set some kind of more strict typing example.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/gpio/gpio-lpc32xx.c')
-rw-r--r-- | drivers/gpio/gpio-lpc32xx.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/gpio/gpio-lpc32xx.c b/drivers/gpio/gpio-lpc32xx.c index a7093e010149..225344d66404 100644 --- a/drivers/gpio/gpio-lpc32xx.c +++ b/drivers/gpio/gpio-lpc32xx.c | |||
@@ -448,7 +448,7 @@ static struct lpc32xx_gpio_chip lpc32xx_gpiochip[] = { | |||
448 | .base = LPC32XX_GPIO_P0_GRP, | 448 | .base = LPC32XX_GPIO_P0_GRP, |
449 | .ngpio = LPC32XX_GPIO_P0_MAX, | 449 | .ngpio = LPC32XX_GPIO_P0_MAX, |
450 | .names = gpio_p0_names, | 450 | .names = gpio_p0_names, |
451 | .can_sleep = 0, | 451 | .can_sleep = false, |
452 | }, | 452 | }, |
453 | .gpio_grp = &gpio_grp_regs_p0, | 453 | .gpio_grp = &gpio_grp_regs_p0, |
454 | }, | 454 | }, |
@@ -464,7 +464,7 @@ static struct lpc32xx_gpio_chip lpc32xx_gpiochip[] = { | |||
464 | .base = LPC32XX_GPIO_P1_GRP, | 464 | .base = LPC32XX_GPIO_P1_GRP, |
465 | .ngpio = LPC32XX_GPIO_P1_MAX, | 465 | .ngpio = LPC32XX_GPIO_P1_MAX, |
466 | .names = gpio_p1_names, | 466 | .names = gpio_p1_names, |
467 | .can_sleep = 0, | 467 | .can_sleep = false, |
468 | }, | 468 | }, |
469 | .gpio_grp = &gpio_grp_regs_p1, | 469 | .gpio_grp = &gpio_grp_regs_p1, |
470 | }, | 470 | }, |
@@ -479,7 +479,7 @@ static struct lpc32xx_gpio_chip lpc32xx_gpiochip[] = { | |||
479 | .base = LPC32XX_GPIO_P2_GRP, | 479 | .base = LPC32XX_GPIO_P2_GRP, |
480 | .ngpio = LPC32XX_GPIO_P2_MAX, | 480 | .ngpio = LPC32XX_GPIO_P2_MAX, |
481 | .names = gpio_p2_names, | 481 | .names = gpio_p2_names, |
482 | .can_sleep = 0, | 482 | .can_sleep = false, |
483 | }, | 483 | }, |
484 | .gpio_grp = &gpio_grp_regs_p2, | 484 | .gpio_grp = &gpio_grp_regs_p2, |
485 | }, | 485 | }, |
@@ -495,7 +495,7 @@ static struct lpc32xx_gpio_chip lpc32xx_gpiochip[] = { | |||
495 | .base = LPC32XX_GPIO_P3_GRP, | 495 | .base = LPC32XX_GPIO_P3_GRP, |
496 | .ngpio = LPC32XX_GPIO_P3_MAX, | 496 | .ngpio = LPC32XX_GPIO_P3_MAX, |
497 | .names = gpio_p3_names, | 497 | .names = gpio_p3_names, |
498 | .can_sleep = 0, | 498 | .can_sleep = false, |
499 | }, | 499 | }, |
500 | .gpio_grp = &gpio_grp_regs_p3, | 500 | .gpio_grp = &gpio_grp_regs_p3, |
501 | }, | 501 | }, |
@@ -509,7 +509,7 @@ static struct lpc32xx_gpio_chip lpc32xx_gpiochip[] = { | |||
509 | .base = LPC32XX_GPI_P3_GRP, | 509 | .base = LPC32XX_GPI_P3_GRP, |
510 | .ngpio = LPC32XX_GPI_P3_MAX, | 510 | .ngpio = LPC32XX_GPI_P3_MAX, |
511 | .names = gpi_p3_names, | 511 | .names = gpi_p3_names, |
512 | .can_sleep = 0, | 512 | .can_sleep = false, |
513 | }, | 513 | }, |
514 | .gpio_grp = &gpio_grp_regs_p3, | 514 | .gpio_grp = &gpio_grp_regs_p3, |
515 | }, | 515 | }, |
@@ -523,7 +523,7 @@ static struct lpc32xx_gpio_chip lpc32xx_gpiochip[] = { | |||
523 | .base = LPC32XX_GPO_P3_GRP, | 523 | .base = LPC32XX_GPO_P3_GRP, |
524 | .ngpio = LPC32XX_GPO_P3_MAX, | 524 | .ngpio = LPC32XX_GPO_P3_MAX, |
525 | .names = gpo_p3_names, | 525 | .names = gpo_p3_names, |
526 | .can_sleep = 0, | 526 | .can_sleep = false, |
527 | }, | 527 | }, |
528 | .gpio_grp = &gpio_grp_regs_p3, | 528 | .gpio_grp = &gpio_grp_regs_p3, |
529 | }, | 529 | }, |