diff options
author | Mika Westerberg <mika.westerberg@linux.intel.com> | 2012-04-05 05:15:16 -0400 |
---|---|---|
committer | Grant Likely <grant.likely@secretlab.ca> | 2012-04-06 00:38:23 -0400 |
commit | b3e35af2b0ea9ad1618e01f40a1ffee83333ef35 (patch) | |
tree | 1ccbeb72bab9f989076780a466f82ab4602ef90f /drivers/gpio/gpio-langwell.c | |
parent | 8302c7413814e26959f69d36a0dcc1f945573bc9 (diff) |
gpio/langwell: allocate IRQ descriptors dynamically for SPARSE_IRQ
Since x86 is using SPARSE_IRQ by default nowadays it means that we need to
allocate IRQ descriptors dynamically using irq_alloc_descs() otherwise the
genirq code fails to convert our irq numbers to suitable descriptors.
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Diffstat (limited to 'drivers/gpio/gpio-langwell.c')
-rw-r--r-- | drivers/gpio/gpio-langwell.c | 16 |
1 files changed, 13 insertions, 3 deletions
diff --git a/drivers/gpio/gpio-langwell.c b/drivers/gpio/gpio-langwell.c index 0bea41b8a226..bc15ae3d7cf2 100644 --- a/drivers/gpio/gpio-langwell.c +++ b/drivers/gpio/gpio-langwell.c | |||
@@ -306,6 +306,7 @@ static int __devinit lnw_gpio_probe(struct pci_dev *pdev, | |||
306 | u32 irq_base; | 306 | u32 irq_base; |
307 | u32 gpio_base; | 307 | u32 gpio_base; |
308 | int retval = 0; | 308 | int retval = 0; |
309 | int ngpio = id->driver_data; | ||
309 | 310 | ||
310 | retval = pci_enable_device(pdev); | 311 | retval = pci_enable_device(pdev); |
311 | if (retval) | 312 | if (retval) |
@@ -344,8 +345,15 @@ static int __devinit lnw_gpio_probe(struct pci_dev *pdev, | |||
344 | retval = -ENOMEM; | 345 | retval = -ENOMEM; |
345 | goto err3; | 346 | goto err3; |
346 | } | 347 | } |
348 | |||
349 | retval = irq_alloc_descs(-1, irq_base, ngpio, 0); | ||
350 | if (retval < 0) { | ||
351 | dev_err(&pdev->dev, "can't allocate IRQ descs\n"); | ||
352 | goto err3; | ||
353 | } | ||
354 | lnw->irq_base = retval; | ||
355 | |||
347 | lnw->reg_base = base; | 356 | lnw->reg_base = base; |
348 | lnw->irq_base = irq_base; | ||
349 | lnw->chip.label = dev_name(&pdev->dev); | 357 | lnw->chip.label = dev_name(&pdev->dev); |
350 | lnw->chip.request = lnw_gpio_request; | 358 | lnw->chip.request = lnw_gpio_request; |
351 | lnw->chip.direction_input = lnw_gpio_direction_input; | 359 | lnw->chip.direction_input = lnw_gpio_direction_input; |
@@ -354,14 +362,14 @@ static int __devinit lnw_gpio_probe(struct pci_dev *pdev, | |||
354 | lnw->chip.set = lnw_gpio_set; | 362 | lnw->chip.set = lnw_gpio_set; |
355 | lnw->chip.to_irq = lnw_gpio_to_irq; | 363 | lnw->chip.to_irq = lnw_gpio_to_irq; |
356 | lnw->chip.base = gpio_base; | 364 | lnw->chip.base = gpio_base; |
357 | lnw->chip.ngpio = id->driver_data; | 365 | lnw->chip.ngpio = ngpio; |
358 | lnw->chip.can_sleep = 0; | 366 | lnw->chip.can_sleep = 0; |
359 | lnw->pdev = pdev; | 367 | lnw->pdev = pdev; |
360 | pci_set_drvdata(pdev, lnw); | 368 | pci_set_drvdata(pdev, lnw); |
361 | retval = gpiochip_add(&lnw->chip); | 369 | retval = gpiochip_add(&lnw->chip); |
362 | if (retval) { | 370 | if (retval) { |
363 | dev_err(&pdev->dev, "langwell gpiochip_add error %d\n", retval); | 371 | dev_err(&pdev->dev, "langwell gpiochip_add error %d\n", retval); |
364 | goto err3; | 372 | goto err4; |
365 | } | 373 | } |
366 | irq_set_handler_data(pdev->irq, lnw); | 374 | irq_set_handler_data(pdev->irq, lnw); |
367 | irq_set_chained_handler(pdev->irq, lnw_irq_handler); | 375 | irq_set_chained_handler(pdev->irq, lnw_irq_handler); |
@@ -378,6 +386,8 @@ static int __devinit lnw_gpio_probe(struct pci_dev *pdev, | |||
378 | 386 | ||
379 | return 0; | 387 | return 0; |
380 | 388 | ||
389 | err4: | ||
390 | irq_free_descs(lnw->irq_base, ngpio); | ||
381 | err3: | 391 | err3: |
382 | pci_release_regions(pdev); | 392 | pci_release_regions(pdev); |
383 | err2: | 393 | err2: |