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authorStefan Richter <stefanr@s5r6.in-berlin.de>2010-06-12 14:35:21 -0400
committerStefan Richter <stefanr@s5r6.in-berlin.de>2010-06-19 07:01:41 -0400
commitb384cf18873da1ed100662aa7373edf5883a1c24 (patch)
tree2c4f488315855554dd430d0cc1e8969333f26d54 /drivers/firewire
parentc8a94ded57e9cc2498d401b2f5c856213a3e19fb (diff)
firewire: core: combine some repeated code
All of these CSRs have the same read/ write/ aynthing-else handling, except for CSR_PRIORITY_BUDGET which might not be implemented. The CSR_CYCLE_TIME read handler implementation accepted 4-byte-sized block write requests before this change but this is just silly; the register is only required to support quadlet read and write requests like the other r/w CSR core and Serial-Bus-dependent registers. Signed-off-by: Stefan Richter <stefanr@s5r6.in-berlin.de>
Diffstat (limited to 'drivers/firewire')
-rw-r--r--drivers/firewire/core-transaction.c84
1 files changed, 15 insertions, 69 deletions
diff --git a/drivers/firewire/core-transaction.c b/drivers/firewire/core-transaction.c
index 87d69cddb231..b8f6db6a0494 100644
--- a/drivers/firewire/core-transaction.c
+++ b/drivers/firewire/core-transaction.c
@@ -1006,38 +1006,30 @@ static void handle_registers(struct fw_card *card, struct fw_request *request,
1006 unsigned long flags; 1006 unsigned long flags;
1007 1007
1008 switch (reg) { 1008 switch (reg) {
1009 case CSR_STATE_CLEAR: 1009 case CSR_PRIORITY_BUDGET:
1010 if (tcode == TCODE_READ_QUADLET_REQUEST) 1010 if (!card->priority_budget_implemented) {
1011 *data = cpu_to_be32(card->driver-> 1011 rcode = RCODE_ADDRESS_ERROR;
1012 read_csr_reg(card, CSR_STATE_CLEAR)); 1012 break;
1013 else if (tcode == TCODE_WRITE_QUADLET_REQUEST) 1013 }
1014 card->driver->write_csr_reg(card, CSR_STATE_CLEAR, 1014 /* else fall through */
1015 be32_to_cpu(*data));
1016 else
1017 rcode = RCODE_TYPE_ERROR;
1018 break;
1019
1020 case CSR_STATE_SET:
1021 if (tcode == TCODE_READ_QUADLET_REQUEST)
1022 *data = cpu_to_be32(card->driver->
1023 read_csr_reg(card, CSR_STATE_SET));
1024 else if (tcode == TCODE_WRITE_QUADLET_REQUEST)
1025 card->driver->write_csr_reg(card, CSR_STATE_SET,
1026 be32_to_cpu(*data));
1027 else
1028 rcode = RCODE_TYPE_ERROR;
1029 break;
1030 1015
1031 case CSR_NODE_IDS: 1016 case CSR_NODE_IDS:
1032 /* 1017 /*
1033 * per IEEE 1394-2008 8.3.22.3, not IEEE 1394.1-2004 3.2.8 1018 * per IEEE 1394-2008 8.3.22.3, not IEEE 1394.1-2004 3.2.8
1034 * and 9.6, but interoperable with IEEE 1394.1-2004 bridges 1019 * and 9.6, but interoperable with IEEE 1394.1-2004 bridges
1035 */ 1020 */
1021 /* fall through */
1022
1023 case CSR_STATE_CLEAR:
1024 case CSR_STATE_SET:
1025 case CSR_CYCLE_TIME:
1026 case CSR_BUS_TIME:
1027 case CSR_BUSY_TIMEOUT:
1036 if (tcode == TCODE_READ_QUADLET_REQUEST) 1028 if (tcode == TCODE_READ_QUADLET_REQUEST)
1037 *data = cpu_to_be32(card->driver-> 1029 *data = cpu_to_be32(card->driver->
1038 read_csr_reg(card, CSR_NODE_IDS)); 1030 read_csr_reg(card, reg));
1039 else if (tcode == TCODE_WRITE_QUADLET_REQUEST) 1031 else if (tcode == TCODE_WRITE_QUADLET_REQUEST)
1040 card->driver->write_csr_reg(card, CSR_NODE_IDS, 1032 card->driver->write_csr_reg(card, reg,
1041 be32_to_cpu(*data)); 1033 be32_to_cpu(*data));
1042 else 1034 else
1043 rcode = RCODE_TYPE_ERROR; 1035 rcode = RCODE_TYPE_ERROR;
@@ -1078,52 +1070,6 @@ static void handle_registers(struct fw_card *card, struct fw_request *request,
1078 } 1070 }
1079 break; 1071 break;
1080 1072
1081 case CSR_CYCLE_TIME:
1082 if (TCODE_IS_READ_REQUEST(tcode) && length == 4)
1083 *data = cpu_to_be32(card->driver->
1084 read_csr_reg(card, CSR_CYCLE_TIME));
1085 else if (tcode == TCODE_WRITE_QUADLET_REQUEST)
1086 card->driver->write_csr_reg(card, CSR_CYCLE_TIME,
1087 be32_to_cpu(*data));
1088 else
1089 rcode = RCODE_TYPE_ERROR;
1090 break;
1091
1092 case CSR_BUS_TIME:
1093 if (tcode == TCODE_READ_QUADLET_REQUEST)
1094 *data = cpu_to_be32(card->driver->
1095 read_csr_reg(card, CSR_BUS_TIME));
1096 else if (tcode == TCODE_WRITE_QUADLET_REQUEST)
1097 card->driver->write_csr_reg(card, CSR_BUS_TIME,
1098 be32_to_cpu(*data));
1099 else
1100 rcode = RCODE_TYPE_ERROR;
1101 break;
1102
1103 case CSR_BUSY_TIMEOUT:
1104 if (tcode == TCODE_READ_QUADLET_REQUEST)
1105 *data = cpu_to_be32(card->driver->
1106 read_csr_reg(card, CSR_BUSY_TIMEOUT));
1107 else if (tcode == TCODE_WRITE_QUADLET_REQUEST)
1108 card->driver->write_csr_reg(card, CSR_BUSY_TIMEOUT,
1109 be32_to_cpu(*data));
1110 else
1111 rcode = RCODE_TYPE_ERROR;
1112 break;
1113
1114 case CSR_PRIORITY_BUDGET:
1115 if (!card->priority_budget_implemented)
1116 rcode = RCODE_ADDRESS_ERROR;
1117 else if (tcode == TCODE_READ_QUADLET_REQUEST)
1118 *data = cpu_to_be32(card->driver->
1119 read_csr_reg(card, CSR_PRIORITY_BUDGET));
1120 else if (tcode == TCODE_WRITE_QUADLET_REQUEST)
1121 card->driver->write_csr_reg(card, CSR_PRIORITY_BUDGET,
1122 be32_to_cpu(*data));
1123 else
1124 rcode = RCODE_TYPE_ERROR;
1125 break;
1126
1127 case CSR_MAINT_UTILITY: 1073 case CSR_MAINT_UTILITY:
1128 if (tcode == TCODE_READ_QUADLET_REQUEST) 1074 if (tcode == TCODE_READ_QUADLET_REQUEST)
1129 *data = card->maint_utility_register; 1075 *data = card->maint_utility_register;