diff options
author | Clemens Ladisch <clemens@ladisch.de> | 2010-04-01 10:40:18 -0400 |
---|---|---|
committer | Stefan Richter <stefanr@s5r6.in-berlin.de> | 2010-04-10 10:51:14 -0400 |
commit | e7014dada041982ae12ba7fd1967ca0ab0243e04 (patch) | |
tree | b82e8047c6f00cfdfd9254a9cdcb66867a673e74 /drivers/firewire | |
parent | 4a96b4fcd6b35e9233df07b3c9ab38091edcfe7e (diff) |
firewire: ohci: do not clear PHY interrupt status inadvertently
The interrupt status bits in PHY register 5 are cleared by writing a one
bit. To avoid clearing them unadvertently, do not write them back when
they were read as set, but only when they have been explicitly requested
to be set.
Signed-off-by: Clemens Ladisch <clemens@ladisch.de>
Signed-off-by: Stefan Richter <stefanr@s5r6.in-berlin.de>
Diffstat (limited to 'drivers/firewire')
-rw-r--r-- | drivers/firewire/core.h | 1 | ||||
-rw-r--r-- | drivers/firewire/ohci.c | 7 |
2 files changed, 8 insertions, 0 deletions
diff --git a/drivers/firewire/core.h b/drivers/firewire/core.h index fb0321300cce..b2a7b651473a 100644 --- a/drivers/firewire/core.h +++ b/drivers/firewire/core.h | |||
@@ -28,6 +28,7 @@ struct fw_packet; | |||
28 | #define PHY_CONTENDER 0x40 | 28 | #define PHY_CONTENDER 0x40 |
29 | #define PHY_BUS_RESET 0x40 | 29 | #define PHY_BUS_RESET 0x40 |
30 | #define PHY_BUS_SHORT_RESET 0x40 | 30 | #define PHY_BUS_SHORT_RESET 0x40 |
31 | #define PHY_INT_STATUS_BITS 0x3c | ||
31 | 32 | ||
32 | #define BANDWIDTH_AVAILABLE_INITIAL 4915 | 33 | #define BANDWIDTH_AVAILABLE_INITIAL 4915 |
33 | #define BROADCAST_CHANNEL_INITIAL (1 << 31 | 31) | 34 | #define BROADCAST_CHANNEL_INITIAL (1 << 31 | 31) |
diff --git a/drivers/firewire/ohci.c b/drivers/firewire/ohci.c index 8ebccda94df9..525848f71c34 100644 --- a/drivers/firewire/ohci.c +++ b/drivers/firewire/ohci.c | |||
@@ -490,6 +490,13 @@ static int ohci_update_phy_reg(struct fw_card *card, int addr, | |||
490 | if (err < 0) | 490 | if (err < 0) |
491 | return err; | 491 | return err; |
492 | 492 | ||
493 | /* | ||
494 | * The interrupt status bits are cleared by writing a one bit. | ||
495 | * Avoid clearing them unless explicitly requested in set_bits. | ||
496 | */ | ||
497 | if (addr == 5) | ||
498 | clear_bits |= PHY_INT_STATUS_BITS; | ||
499 | |||
493 | old = (old & ~clear_bits) | set_bits; | 500 | old = (old & ~clear_bits) | set_bits; |
494 | reg_write(ohci, OHCI1394_PhyControl, | 501 | reg_write(ohci, OHCI1394_PhyControl, |
495 | OHCI1394_PhyControl_Write(addr, old)); | 502 | OHCI1394_PhyControl_Write(addr, old)); |