diff options
author | Stefan Richter <stefanr@s5r6.in-berlin.de> | 2010-02-14 12:47:07 -0500 |
---|---|---|
committer | Stefan Richter <stefanr@s5r6.in-berlin.de> | 2010-02-19 14:51:10 -0500 |
commit | 1c1517efe173599ca2f1526ce7a04521cd424a9f (patch) | |
tree | 72c9cfdb9481c689ecad6573e12e766ca5038cbc /drivers/firewire | |
parent | b677532b971276f48e82578b4d829fb4382e7b41 (diff) |
firewire: ohci: enable cycle timer fix on ALi and NEC controllers
Discussed in "read_cycle_timer backwards for sub-cycle 0000, 0001",
http://thread.gmane.org/gmane.linux.kernel.firewire.devel/13704
Known bad controllers:
ALi M5271, listed by lspci as M5253 [10b9:5253]
NEC OrangeLink [1033:00cd] (rev 03)
NEC uPD72874 [1033:00f2] (rev 01)
VIA VT6306 [1106:3044] (rev 46)
VIA VT6308P, listed by lspci as rev c0
Reported-by: Pieter Palmers <pieterp@joow.be>
Reported-by: HÃ¥kan Johansson <f96hajo@chalmers.se>
Reported-by: Clemens Ladisch <clemens@ladisch.de>
Signed-off-by: Stefan Richter <stefanr@s5r6.in-berlin.de>
Diffstat (limited to 'drivers/firewire')
-rw-r--r-- | drivers/firewire/ohci.c | 13 |
1 files changed, 8 insertions, 5 deletions
diff --git a/drivers/firewire/ohci.c b/drivers/firewire/ohci.c index d6ba897b2197..bf5e11284421 100644 --- a/drivers/firewire/ohci.c +++ b/drivers/firewire/ohci.c | |||
@@ -1817,13 +1817,14 @@ static u64 ohci_get_bus_time(struct fw_card *card) | |||
1817 | c2 = reg_read(ohci, OHCI1394_IsochronousCycleTimer); | 1817 | c2 = reg_read(ohci, OHCI1394_IsochronousCycleTimer); |
1818 | } else { | 1818 | } else { |
1819 | /* | 1819 | /* |
1820 | * VIA controllers have two bugs when updating the iso cycle | 1820 | * Some controllers exhibit one or more of the following bugs |
1821 | * timer register: | 1821 | * when updating the iso cycle timer register: |
1822 | * 1) When the lowest six bits are wrapping around to zero, | 1822 | * - When the lowest six bits are wrapping around to zero, |
1823 | * a read that happens at the same time will return garbage | 1823 | * a read that happens at the same time will return garbage |
1824 | * in the lowest ten bits. | 1824 | * in the lowest ten bits. |
1825 | * 2) When the cycleOffset field wraps around to zero, the | 1825 | * - When the cycleOffset field wraps around to zero, the |
1826 | * cycleCount field is not incremented for about 60 ns. | 1826 | * cycleCount field is not incremented for about 60 ns. |
1827 | * - Occasionally, the entire register reads zero. | ||
1827 | * | 1828 | * |
1828 | * To catch these, we read the register three times and ensure | 1829 | * To catch these, we read the register three times and ensure |
1829 | * that the difference between each two consecutive reads is | 1830 | * that the difference between each two consecutive reads is |
@@ -2542,7 +2543,9 @@ static int __devinit pci_probe(struct pci_dev *dev, | |||
2542 | #endif | 2543 | #endif |
2543 | ohci->bus_reset_packet_quirk = dev->vendor == PCI_VENDOR_ID_TI; | 2544 | ohci->bus_reset_packet_quirk = dev->vendor == PCI_VENDOR_ID_TI; |
2544 | 2545 | ||
2545 | ohci->iso_cycle_timer_quirk = dev->vendor == PCI_VENDOR_ID_VIA; | 2546 | ohci->iso_cycle_timer_quirk = dev->vendor == PCI_VENDOR_ID_AL || |
2547 | dev->vendor == PCI_VENDOR_ID_NEC || | ||
2548 | dev->vendor == PCI_VENDOR_ID_VIA; | ||
2546 | 2549 | ||
2547 | ar_context_init(&ohci->ar_request_ctx, ohci, | 2550 | ar_context_init(&ohci->ar_request_ctx, ohci, |
2548 | OHCI1394_AsReqRcvContextControlSet); | 2551 | OHCI1394_AsReqRcvContextControlSet); |