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authorClemens Ladisch <clemens@ladisch.de>2010-11-30 02:24:32 -0500
committerStefan Richter <stefanr@s5r6.in-berlin.de>2010-12-13 14:39:14 -0500
commit8327b37b18addfc6f8cf41a2f1a4490b656377b9 (patch)
treeff9f3ccefccc5ab3b6bf0b5b7690af6a451230cc /drivers/firewire
parente597e9898abe45beff4696159c7fe5c96f53e581 (diff)
firewire: ohci: properly clear posted write errors
To remove the error information from the controller's queue and to allow more posted writes, the driver has to read the failed posted write address before clearing the postedWriteErr interrupt bit. Signed-off-by: Clemens Ladisch <clemens@ladisch.de> (Stefan R:) The spec is somewhat fuzzy about the actual requirements. To err on the safe side, let's do these two read accesses. Signed-off-by: Stefan Richter <stefanr@s5r6.in-berlin.de>
Diffstat (limited to 'drivers/firewire')
-rw-r--r--drivers/firewire/ohci.c15
1 files changed, 12 insertions, 3 deletions
diff --git a/drivers/firewire/ohci.c b/drivers/firewire/ohci.c
index 276324d741df..0031ec6e1f00 100644
--- a/drivers/firewire/ohci.c
+++ b/drivers/firewire/ohci.c
@@ -1790,8 +1790,12 @@ static irqreturn_t irq_handler(int irq, void *data)
1790 if (!event || !~event) 1790 if (!event || !~event)
1791 return IRQ_NONE; 1791 return IRQ_NONE;
1792 1792
1793 /* busReset must not be cleared yet, see OHCI 1.1 clause 7.2.3.2 */ 1793 /*
1794 reg_write(ohci, OHCI1394_IntEventClear, event & ~OHCI1394_busReset); 1794 * busReset and postedWriteErr must not be cleared yet
1795 * (OHCI 1.1 clauses 7.2.3.2 and 13.2.8.1)
1796 */
1797 reg_write(ohci, OHCI1394_IntEventClear,
1798 event & ~(OHCI1394_busReset | OHCI1394_postedWriteErr));
1795 log_irqs(event); 1799 log_irqs(event);
1796 1800
1797 if (event & OHCI1394_selfIDComplete) 1801 if (event & OHCI1394_selfIDComplete)
@@ -1831,8 +1835,13 @@ static irqreturn_t irq_handler(int irq, void *data)
1831 fw_error("Register access failure - " 1835 fw_error("Register access failure - "
1832 "please notify linux1394-devel@lists.sf.net\n"); 1836 "please notify linux1394-devel@lists.sf.net\n");
1833 1837
1834 if (unlikely(event & OHCI1394_postedWriteErr)) 1838 if (unlikely(event & OHCI1394_postedWriteErr)) {
1839 reg_read(ohci, OHCI1394_PostedWriteAddressHi);
1840 reg_read(ohci, OHCI1394_PostedWriteAddressLo);
1841 reg_write(ohci, OHCI1394_IntEventClear,
1842 OHCI1394_postedWriteErr);
1835 fw_error("PCI posted write error\n"); 1843 fw_error("PCI posted write error\n");
1844 }
1836 1845
1837 if (unlikely(event & OHCI1394_cycleTooLong)) { 1846 if (unlikely(event & OHCI1394_cycleTooLong)) {
1838 if (printk_ratelimit()) 1847 if (printk_ratelimit())