diff options
author | Clemens Ladisch <clemens@ladisch.de> | 2011-04-11 03:56:12 -0400 |
---|---|---|
committer | Stefan Richter <stefanr@s5r6.in-berlin.de> | 2011-04-19 14:00:10 -0400 |
commit | ecf8328e59447b83a1f79628487e0e9f8801db84 (patch) | |
tree | 20ea90d6a38687a48c28ad185c612d0dece86e6f /drivers/firewire | |
parent | 115881d395959b75c8c3bb94913f2ce869b8aa7a (diff) |
firewire: ohci: do not start DMA contexts before link is enabled
OHCI 1.1 5.7.3 not only forbids enabling or starting any DMA contexts
before the linkEnable bit is set, but also explicitly warns of undefined
behaviour if this order is violated.
Don't violate it then.
Signed-off-by: Clemens Ladisch <clemens@ladisch.de>
Signed-off-by: Stefan Richter <stefanr@s5r6.in-berlin.de>
Diffstat (limited to 'drivers/firewire')
-rw-r--r-- | drivers/firewire/ohci.c | 13 |
1 files changed, 7 insertions, 6 deletions
diff --git a/drivers/firewire/ohci.c b/drivers/firewire/ohci.c index f903d7b6f34a..dfb3cb774a79 100644 --- a/drivers/firewire/ohci.c +++ b/drivers/firewire/ohci.c | |||
@@ -2066,8 +2066,6 @@ static int ohci_enable(struct fw_card *card, | |||
2066 | 2066 | ||
2067 | reg_write(ohci, OHCI1394_SelfIDBuffer, ohci->self_id_bus); | 2067 | reg_write(ohci, OHCI1394_SelfIDBuffer, ohci->self_id_bus); |
2068 | reg_write(ohci, OHCI1394_LinkControlSet, | 2068 | reg_write(ohci, OHCI1394_LinkControlSet, |
2069 | OHCI1394_LinkControl_rcvSelfID | | ||
2070 | OHCI1394_LinkControl_rcvPhyPkt | | ||
2071 | OHCI1394_LinkControl_cycleTimerEnable | | 2069 | OHCI1394_LinkControl_cycleTimerEnable | |
2072 | OHCI1394_LinkControl_cycleMaster); | 2070 | OHCI1394_LinkControl_cycleMaster); |
2073 | 2071 | ||
@@ -2094,9 +2092,6 @@ static int ohci_enable(struct fw_card *card, | |||
2094 | reg_write(ohci, OHCI1394_FairnessControl, 0); | 2092 | reg_write(ohci, OHCI1394_FairnessControl, 0); |
2095 | card->priority_budget_implemented = ohci->pri_req_max != 0; | 2093 | card->priority_budget_implemented = ohci->pri_req_max != 0; |
2096 | 2094 | ||
2097 | ar_context_run(&ohci->ar_request_ctx); | ||
2098 | ar_context_run(&ohci->ar_response_ctx); | ||
2099 | |||
2100 | reg_write(ohci, OHCI1394_PhyUpperBound, 0x00010000); | 2095 | reg_write(ohci, OHCI1394_PhyUpperBound, 0x00010000); |
2101 | reg_write(ohci, OHCI1394_IntEventClear, ~0); | 2096 | reg_write(ohci, OHCI1394_IntEventClear, ~0); |
2102 | reg_write(ohci, OHCI1394_IntMaskClear, ~0); | 2097 | reg_write(ohci, OHCI1394_IntMaskClear, ~0); |
@@ -2186,7 +2181,13 @@ static int ohci_enable(struct fw_card *card, | |||
2186 | reg_write(ohci, OHCI1394_HCControlSet, | 2181 | reg_write(ohci, OHCI1394_HCControlSet, |
2187 | OHCI1394_HCControl_linkEnable | | 2182 | OHCI1394_HCControl_linkEnable | |
2188 | OHCI1394_HCControl_BIBimageValid); | 2183 | OHCI1394_HCControl_BIBimageValid); |
2189 | flush_writes(ohci); | 2184 | |
2185 | reg_write(ohci, OHCI1394_LinkControlSet, | ||
2186 | OHCI1394_LinkControl_rcvSelfID | | ||
2187 | OHCI1394_LinkControl_rcvPhyPkt); | ||
2188 | |||
2189 | ar_context_run(&ohci->ar_request_ctx); | ||
2190 | ar_context_run(&ohci->ar_response_ctx); /* also flushes writes */ | ||
2190 | 2191 | ||
2191 | /* We are ready to go, reset bus to finish initialization. */ | 2192 | /* We are ready to go, reset bus to finish initialization. */ |
2192 | fw_schedule_bus_reset(&ohci->card, false, true); | 2193 | fw_schedule_bus_reset(&ohci->card, false, true); |