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authorClemens Ladisch <clemens@ladisch.de>2010-04-01 10:43:59 -0400
committerStefan Richter <stefanr@s5r6.in-berlin.de>2010-04-10 10:51:14 -0400
commit54672386ccf36ffa21d1de8e75624af83f9b0eeb (patch)
tree4151332eab6070ffcda77012a3afc99e15425b5b /drivers/firewire/ohci.c
parent925e7a6504966b838c519f009086982c68e0666f (diff)
firewire: ohci: fix up configuration of TI chips
On TI chips (OHCI-Lynx and later), enable link enhancements features that TI recommends to be used. None of these are required for proper operation, but they are safe and nice to have. In theory, these bits should have been set by default, but in practice, some BIOS/EEPROM writers apparently do not read the datasheet, or get spooked by names like "unfair". Signed-off-by: Clemens Ladisch <clemens@ladisch.de> Signed-off-by: Stefan Richter <stefanr@s5r6.in-berlin.de>
Diffstat (limited to 'drivers/firewire/ohci.c')
-rw-r--r--drivers/firewire/ohci.c19
1 files changed, 18 insertions, 1 deletions
diff --git a/drivers/firewire/ohci.c b/drivers/firewire/ohci.c
index e934713f3fce..6a27a0ef3b63 100644
--- a/drivers/firewire/ohci.c
+++ b/drivers/firewire/ohci.c
@@ -2431,7 +2431,7 @@ static int __devinit pci_probe(struct pci_dev *dev,
2431 const struct pci_device_id *ent) 2431 const struct pci_device_id *ent)
2432{ 2432{
2433 struct fw_ohci *ohci; 2433 struct fw_ohci *ohci;
2434 u32 bus_options, max_receive, link_speed, version; 2434 u32 bus_options, max_receive, link_speed, version, link_enh;
2435 u64 guid; 2435 u64 guid;
2436 int i, err, n_ir, n_it; 2436 int i, err, n_ir, n_it;
2437 size_t size; 2437 size_t size;
@@ -2484,6 +2484,23 @@ static int __devinit pci_probe(struct pci_dev *dev,
2484 if (param_quirks) 2484 if (param_quirks)
2485 ohci->quirks = param_quirks; 2485 ohci->quirks = param_quirks;
2486 2486
2487 /* TI OHCI-Lynx and compatible: set recommended configuration bits. */
2488 if (dev->vendor == PCI_VENDOR_ID_TI) {
2489 pci_read_config_dword(dev, PCI_CFG_TI_LinkEnh, &link_enh);
2490
2491 /* adjust latency of ATx FIFO: use 1.7 KB threshold */
2492 link_enh &= ~TI_LinkEnh_atx_thresh_mask;
2493 link_enh |= TI_LinkEnh_atx_thresh_1_7K;
2494
2495 /* use priority arbitration for asynchronous responses */
2496 link_enh |= TI_LinkEnh_enab_unfair;
2497
2498 /* required for aPhyEnhanceEnable to work */
2499 link_enh |= TI_LinkEnh_enab_accel;
2500
2501 pci_write_config_dword(dev, PCI_CFG_TI_LinkEnh, link_enh);
2502 }
2503
2487 ar_context_init(&ohci->ar_request_ctx, ohci, 2504 ar_context_init(&ohci->ar_request_ctx, ohci,
2488 OHCI1394_AsReqRcvContextControlSet); 2505 OHCI1394_AsReqRcvContextControlSet);
2489 2506