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authorBorislav Petkov <borislav.petkov@amd.com>2012-09-14 14:25:37 -0400
committerBorislav Petkov <bp@alien8.de>2012-11-28 05:56:30 -0500
commitd5c6770d4cb27bc33aa433cf8fb848ad9af6644b (patch)
treeb334cce3aaa3535e60585834a43031f51606e66b /drivers/edac
parentd824c7718b78b6a5afae7fc78731b70318cd076f (diff)
MCE, AMD: Dump error status
Dump error status after decoding the error which describes the error disposition. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
Diffstat (limited to 'drivers/edac')
-rw-r--r--drivers/edac/mce_amd.c22
-rw-r--r--drivers/edac/mce_amd.h6
2 files changed, 22 insertions, 6 deletions
diff --git a/drivers/edac/mce_amd.c b/drivers/edac/mce_amd.c
index f856a2531cec..ad637572d8c7 100644
--- a/drivers/edac/mce_amd.c
+++ b/drivers/edac/mce_amd.c
@@ -667,6 +667,22 @@ static bool amd_filter_mce(struct mce *m)
667 return false; 667 return false;
668} 668}
669 669
670static const char *decode_error_status(struct mce *m)
671{
672 if (m->status & MCI_STATUS_UC) {
673 if (m->status & MCI_STATUS_PCC)
674 return "System Fatal error.";
675 if (m->mcgstatus & MCG_STATUS_RIPV)
676 return "Uncorrected, software restartable error.";
677 return "Uncorrected, software containable error.";
678 }
679
680 if (m->status & MCI_STATUS_DEFERRED)
681 return "Deferred error.";
682
683 return "Corrected error, no action required.";
684}
685
670int amd_decode_mce(struct notifier_block *nb, unsigned long val, void *data) 686int amd_decode_mce(struct notifier_block *nb, unsigned long val, void *data)
671{ 687{
672 struct mce *m = (struct mce *)data; 688 struct mce *m = (struct mce *)data;
@@ -712,6 +728,8 @@ int amd_decode_mce(struct notifier_block *nb, unsigned long val, void *data)
712 break; 728 break;
713 } 729 }
714 730
731 pr_emerg(HW_ERR "Error Status: %s\n", decode_error_status(m));
732
715 pr_emerg(HW_ERR "CPU:%d (%x:%x:%x) MC%d_STATUS[%s|%s|%s|%s|%s", 733 pr_emerg(HW_ERR "CPU:%d (%x:%x:%x) MC%d_STATUS[%s|%s|%s|%s|%s",
716 m->extcpu, 734 m->extcpu,
717 c->x86, c->x86_model, c->x86_mask, 735 c->x86, c->x86_model, c->x86_mask,
@@ -724,8 +742,8 @@ int amd_decode_mce(struct notifier_block *nb, unsigned long val, void *data)
724 742
725 if (c->x86 == 0x15) 743 if (c->x86 == 0x15)
726 pr_cont("|%s|%s", 744 pr_cont("|%s|%s",
727 ((m->status & BIT_64(44)) ? "Deferred" : "-"), 745 ((m->status & MCI_STATUS_DEFERRED) ? "Deferred" : "-"),
728 ((m->status & BIT_64(43)) ? "Poison" : "-")); 746 ((m->status & MCI_STATUS_POISON) ? "Poison" : "-"));
729 747
730 /* do the two bits[14:13] together */ 748 /* do the two bits[14:13] together */
731 ecc = (m->status >> 45) & 0x3; 749 ecc = (m->status >> 45) & 0x3;
diff --git a/drivers/edac/mce_amd.h b/drivers/edac/mce_amd.h
index 942f382ecb64..679679951e23 100644
--- a/drivers/edac/mce_amd.h
+++ b/drivers/edac/mce_amd.h
@@ -29,10 +29,8 @@
29#define R4(x) (((x) >> 4) & 0xf) 29#define R4(x) (((x) >> 4) & 0xf)
30#define R4_MSG(x) ((R4(x) < 9) ? rrrr_msgs[R4(x)] : "Wrong R4!") 30#define R4_MSG(x) ((R4(x) < 9) ? rrrr_msgs[R4(x)] : "Wrong R4!")
31 31
32/* 32#define MCI_STATUS_DEFERRED BIT_64(44)
33 * F3x4C bits (MCi_STATUS' high half) 33#define MCI_STATUS_POISON BIT_64(43)
34 */
35#define NBSH_ERR_CPU_VAL BIT(24)
36 34
37enum tt_ids { 35enum tt_ids {
38 TT_INSTR = 0, 36 TT_INSTR = 0,