diff options
author | Aristeu Rozanski <arozansk@redhat.com> | 2013-10-30 12:26:56 -0400 |
---|---|---|
committer | Mauro Carvalho Chehab <m.chehab@samsung.com> | 2013-11-14 13:20:37 -0500 |
commit | ef1e8d03b13126261c6e7dcf058fb5d80d34b33c (patch) | |
tree | f8f6c67c6e28adc0336c395bcc2ce468d015ef2b /drivers/edac | |
parent | 5e01dc7b26d9f24f39abace5da98ccbd6a5ceb52 (diff) |
sb_edac: make RANK_CFG_A value part of sbridge_info
This is in preparation of Ivy Bridge support.
Signed-off-by: Aristeu Rozanski <arozansk@redhat.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
Diffstat (limited to 'drivers/edac')
-rw-r--r-- | drivers/edac/sb_edac.c | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/drivers/edac/sb_edac.c b/drivers/edac/sb_edac.c index e04462b60756..3f8c890d79c6 100644 --- a/drivers/edac/sb_edac.c +++ b/drivers/edac/sb_edac.c | |||
@@ -262,7 +262,7 @@ static const u32 correrrthrsld[] = { | |||
262 | 262 | ||
263 | /* Device 17, function 0 */ | 263 | /* Device 17, function 0 */ |
264 | 264 | ||
265 | #define RANK_CFG_A 0x0328 | 265 | #define SB_RANK_CFG_A 0x0328 |
266 | 266 | ||
267 | #define IS_RDIMM_ENABLED(reg) GET_BITFIELD(reg, 11, 11) | 267 | #define IS_RDIMM_ENABLED(reg) GET_BITFIELD(reg, 11, 11) |
268 | 268 | ||
@@ -275,6 +275,7 @@ static const u32 correrrthrsld[] = { | |||
275 | 275 | ||
276 | struct sbridge_info { | 276 | struct sbridge_info { |
277 | u32 mcmtr; | 277 | u32 mcmtr; |
278 | u32 rankcfgr; | ||
278 | }; | 279 | }; |
279 | 280 | ||
280 | struct sbridge_channel { | 281 | struct sbridge_channel { |
@@ -520,6 +521,8 @@ static int get_dimm_config(struct mem_ctl_info *mci) | |||
520 | enum edac_type mode; | 521 | enum edac_type mode; |
521 | enum mem_type mtype; | 522 | enum mem_type mtype; |
522 | 523 | ||
524 | pvt->info.rankcfgr = SB_RANK_CFG_A; | ||
525 | |||
523 | pci_read_config_dword(pvt->pci_br, SAD_TARGET, ®); | 526 | pci_read_config_dword(pvt->pci_br, SAD_TARGET, ®); |
524 | pvt->sbridge_dev->source_id = SOURCE_ID(reg); | 527 | pvt->sbridge_dev->source_id = SOURCE_ID(reg); |
525 | 528 | ||
@@ -558,7 +561,8 @@ static int get_dimm_config(struct mem_ctl_info *mci) | |||
558 | } | 561 | } |
559 | 562 | ||
560 | if (pvt->pci_ddrio) { | 563 | if (pvt->pci_ddrio) { |
561 | pci_read_config_dword(pvt->pci_ddrio, RANK_CFG_A, ®); | 564 | pci_read_config_dword(pvt->pci_ddrio, pvt->info.rankcfgr, |
565 | ®); | ||
562 | if (IS_RDIMM_ENABLED(reg)) { | 566 | if (IS_RDIMM_ENABLED(reg)) { |
563 | /* FIXME: Can also be LRDIMM */ | 567 | /* FIXME: Can also be LRDIMM */ |
564 | edac_dbg(0, "Memory is registered\n"); | 568 | edac_dbg(0, "Memory is registered\n"); |