diff options
author | Mauro Carvalho Chehab <mchehab@redhat.com> | 2012-04-16 14:11:20 -0400 |
---|---|---|
committer | Mauro Carvalho Chehab <mchehab@redhat.com> | 2012-05-28 18:13:45 -0400 |
commit | a583ac6ca809907dcf3e5e2dd12250b23ceda7c2 (patch) | |
tree | 9eeeff05fcf4767883e6b94c0bf97f04af893f75 /drivers/edac | |
parent | ad4d6e2311487299beaf36bd890c96569c691482 (diff) |
mv64x60_edac: convert driver to use the new edac ABI
The legacy edac ABI is going to be removed. Port the driver to use
and benefit from the new API functionality.
Cc: Borislav Petkov <borislav.petkov@amd.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'drivers/edac')
-rw-r--r-- | drivers/edac/mv64x60_edac.c | 25 |
1 files changed, 19 insertions, 6 deletions
diff --git a/drivers/edac/mv64x60_edac.c b/drivers/edac/mv64x60_edac.c index 281e24528599..289a6cc859b4 100644 --- a/drivers/edac/mv64x60_edac.c +++ b/drivers/edac/mv64x60_edac.c | |||
@@ -611,12 +611,17 @@ static void mv64x60_mc_check(struct mem_ctl_info *mci) | |||
611 | 611 | ||
612 | /* first bit clear in ECC Err Reg, 1 bit error, correctable by HW */ | 612 | /* first bit clear in ECC Err Reg, 1 bit error, correctable by HW */ |
613 | if (!(reg & 0x1)) | 613 | if (!(reg & 0x1)) |
614 | edac_mc_handle_ce(mci, err_addr >> PAGE_SHIFT, | 614 | edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, |
615 | err_addr & PAGE_MASK, syndrome, 0, 0, | 615 | err_addr >> PAGE_SHIFT, |
616 | mci->ctl_name); | 616 | err_addr & PAGE_MASK, syndrome, |
617 | 0, 0, -1, | ||
618 | mci->ctl_name, "", NULL); | ||
617 | else /* 2 bit error, UE */ | 619 | else /* 2 bit error, UE */ |
618 | edac_mc_handle_ue(mci, err_addr >> PAGE_SHIFT, | 620 | edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, |
619 | err_addr & PAGE_MASK, 0, mci->ctl_name); | 621 | err_addr >> PAGE_SHIFT, |
622 | err_addr & PAGE_MASK, 0, | ||
623 | 0, 0, -1, | ||
624 | mci->ctl_name, "", NULL); | ||
620 | 625 | ||
621 | /* clear the error */ | 626 | /* clear the error */ |
622 | out_le32(pdata->mc_vbase + MV64X60_SDRAM_ERR_ADDR, 0); | 627 | out_le32(pdata->mc_vbase + MV64X60_SDRAM_ERR_ADDR, 0); |
@@ -695,6 +700,7 @@ static void mv64x60_init_csrows(struct mem_ctl_info *mci, | |||
695 | static int __devinit mv64x60_mc_err_probe(struct platform_device *pdev) | 700 | static int __devinit mv64x60_mc_err_probe(struct platform_device *pdev) |
696 | { | 701 | { |
697 | struct mem_ctl_info *mci; | 702 | struct mem_ctl_info *mci; |
703 | struct edac_mc_layer layers[2]; | ||
698 | struct mv64x60_mc_pdata *pdata; | 704 | struct mv64x60_mc_pdata *pdata; |
699 | struct resource *r; | 705 | struct resource *r; |
700 | u32 ctl; | 706 | u32 ctl; |
@@ -703,7 +709,14 @@ static int __devinit mv64x60_mc_err_probe(struct platform_device *pdev) | |||
703 | if (!devres_open_group(&pdev->dev, mv64x60_mc_err_probe, GFP_KERNEL)) | 709 | if (!devres_open_group(&pdev->dev, mv64x60_mc_err_probe, GFP_KERNEL)) |
704 | return -ENOMEM; | 710 | return -ENOMEM; |
705 | 711 | ||
706 | mci = edac_mc_alloc(sizeof(struct mv64x60_mc_pdata), 1, 1, edac_mc_idx); | 712 | layers[0].type = EDAC_MC_LAYER_CHIP_SELECT; |
713 | layers[0].size = 1; | ||
714 | layers[0].is_virt_csrow = true; | ||
715 | layers[1].type = EDAC_MC_LAYER_CHANNEL; | ||
716 | layers[1].size = 1; | ||
717 | layers[1].is_virt_csrow = false; | ||
718 | mci = new_edac_mc_alloc(edac_mc_idx, ARRAY_SIZE(layers), layers, | ||
719 | sizeof(struct mv64x60_mc_pdata)); | ||
707 | if (!mci) { | 720 | if (!mci) { |
708 | printk(KERN_ERR "%s: No memory for CPU err\n", __func__); | 721 | printk(KERN_ERR "%s: No memory for CPU err\n", __func__); |
709 | devres_release_group(&pdev->dev, mv64x60_mc_err_probe); | 722 | devres_release_group(&pdev->dev, mv64x60_mc_err_probe); |