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authorLinus Torvalds <torvalds@linux-foundation.org>2010-03-03 12:25:37 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2010-03-03 12:25:37 -0500
commiteaa5eec739637f32f8733d528ff0b94fd62b1214 (patch)
treec9568668b920ad677b9a82be02e83b173d20c7d5 /drivers/edac
parent2a32f2db132264c356aea30a8270d3e68d96c509 (diff)
parentd95cf4de6a1c9c1025ac375bc6d2da6af18fdf35 (diff)
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp: amd64_edac: Simplify ECC override handling
Diffstat (limited to 'drivers/edac')
-rw-r--r--drivers/edac/amd64_edac.c37
-rw-r--r--drivers/edac/amd64_edac.h3
2 files changed, 21 insertions, 19 deletions
diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
index 7cd1cdcbe0f5..cf17dbb8014f 100644
--- a/drivers/edac/amd64_edac.c
+++ b/drivers/edac/amd64_edac.c
@@ -2553,14 +2553,14 @@ static int amd64_toggle_ecc_err_reporting(struct amd64_pvt *pvt, bool on)
2553 2553
2554 if (on) { 2554 if (on) {
2555 if (reg->l & K8_MSR_MCGCTL_NBE) 2555 if (reg->l & K8_MSR_MCGCTL_NBE)
2556 pvt->flags.ecc_report = 1; 2556 pvt->flags.nb_mce_enable = 1;
2557 2557
2558 reg->l |= K8_MSR_MCGCTL_NBE; 2558 reg->l |= K8_MSR_MCGCTL_NBE;
2559 } else { 2559 } else {
2560 /* 2560 /*
2561 * Turn off ECC reporting only when it was off before 2561 * Turn off NB MCE reporting only when it was off before
2562 */ 2562 */
2563 if (!pvt->flags.ecc_report) 2563 if (!pvt->flags.nb_mce_enable)
2564 reg->l &= ~K8_MSR_MCGCTL_NBE; 2564 reg->l &= ~K8_MSR_MCGCTL_NBE;
2565 } 2565 }
2566 } 2566 }
@@ -2571,22 +2571,11 @@ static int amd64_toggle_ecc_err_reporting(struct amd64_pvt *pvt, bool on)
2571 return 0; 2571 return 0;
2572} 2572}
2573 2573
2574/*
2575 * Only if 'ecc_enable_override' is set AND BIOS had ECC disabled, do "we"
2576 * enable it.
2577 */
2578static void amd64_enable_ecc_error_reporting(struct mem_ctl_info *mci) 2574static void amd64_enable_ecc_error_reporting(struct mem_ctl_info *mci)
2579{ 2575{
2580 struct amd64_pvt *pvt = mci->pvt_info; 2576 struct amd64_pvt *pvt = mci->pvt_info;
2581 u32 value, mask = K8_NBCTL_CECCEn | K8_NBCTL_UECCEn; 2577 u32 value, mask = K8_NBCTL_CECCEn | K8_NBCTL_UECCEn;
2582 2578
2583 if (!ecc_enable_override)
2584 return;
2585
2586 amd64_printk(KERN_WARNING,
2587 "'ecc_enable_override' parameter is active, "
2588 "Enabling AMD ECC hardware now: CAUTION\n");
2589
2590 amd64_read_pci_cfg(pvt->misc_f3_ctl, K8_NBCTL, &value); 2579 amd64_read_pci_cfg(pvt->misc_f3_ctl, K8_NBCTL, &value);
2591 2580
2592 /* turn on UECCn and CECCEn bits */ 2581 /* turn on UECCn and CECCEn bits */
@@ -2611,6 +2600,8 @@ static void amd64_enable_ecc_error_reporting(struct mem_ctl_info *mci)
2611 "This node reports that DRAM ECC is " 2600 "This node reports that DRAM ECC is "
2612 "currently Disabled; ENABLING now\n"); 2601 "currently Disabled; ENABLING now\n");
2613 2602
2603 pvt->flags.nb_ecc_prev = 0;
2604
2614 /* Attempt to turn on DRAM ECC Enable */ 2605 /* Attempt to turn on DRAM ECC Enable */
2615 value |= K8_NBCFG_ECC_ENABLE; 2606 value |= K8_NBCFG_ECC_ENABLE;
2616 pci_write_config_dword(pvt->misc_f3_ctl, K8_NBCFG, value); 2607 pci_write_config_dword(pvt->misc_f3_ctl, K8_NBCFG, value);
@@ -2625,7 +2616,10 @@ static void amd64_enable_ecc_error_reporting(struct mem_ctl_info *mci)
2625 amd64_printk(KERN_DEBUG, 2616 amd64_printk(KERN_DEBUG,
2626 "Hardware accepted DRAM ECC Enable\n"); 2617 "Hardware accepted DRAM ECC Enable\n");
2627 } 2618 }
2619 } else {
2620 pvt->flags.nb_ecc_prev = 1;
2628 } 2621 }
2622
2629 debugf0("NBCFG(2)= 0x%x CHIPKILL= %s ECC_ENABLE= %s\n", value, 2623 debugf0("NBCFG(2)= 0x%x CHIPKILL= %s ECC_ENABLE= %s\n", value,
2630 (value & K8_NBCFG_CHIPKILL) ? "Enabled" : "Disabled", 2624 (value & K8_NBCFG_CHIPKILL) ? "Enabled" : "Disabled",
2631 (value & K8_NBCFG_ECC_ENABLE) ? "Enabled" : "Disabled"); 2625 (value & K8_NBCFG_ECC_ENABLE) ? "Enabled" : "Disabled");
@@ -2644,12 +2638,18 @@ static void amd64_restore_ecc_error_reporting(struct amd64_pvt *pvt)
2644 value &= ~mask; 2638 value &= ~mask;
2645 value |= pvt->old_nbctl; 2639 value |= pvt->old_nbctl;
2646 2640
2647 /* restore the NB Enable MCGCTL bit */
2648 pci_write_config_dword(pvt->misc_f3_ctl, K8_NBCTL, value); 2641 pci_write_config_dword(pvt->misc_f3_ctl, K8_NBCTL, value);
2649 2642
2643 /* restore previous BIOS DRAM ECC "off" setting which we force-enabled */
2644 if (!pvt->flags.nb_ecc_prev) {
2645 amd64_read_pci_cfg(pvt->misc_f3_ctl, K8_NBCFG, &value);
2646 value &= ~K8_NBCFG_ECC_ENABLE;
2647 pci_write_config_dword(pvt->misc_f3_ctl, K8_NBCFG, value);
2648 }
2649
2650 /* restore the NB Enable MCGCTL bit */
2650 if (amd64_toggle_ecc_err_reporting(pvt, OFF)) 2651 if (amd64_toggle_ecc_err_reporting(pvt, OFF))
2651 amd64_printk(KERN_WARNING, "Error restoring ECC reporting over " 2652 amd64_printk(KERN_WARNING, "Error restoring NB MCGCTL settings!\n");
2652 "MCGCTL!\n");
2653} 2653}
2654 2654
2655/* 2655/*
@@ -2690,8 +2690,9 @@ static int amd64_check_ecc_enabled(struct amd64_pvt *pvt)
2690 if (!ecc_enable_override) { 2690 if (!ecc_enable_override) {
2691 amd64_printk(KERN_NOTICE, "%s", ecc_msg); 2691 amd64_printk(KERN_NOTICE, "%s", ecc_msg);
2692 return -ENODEV; 2692 return -ENODEV;
2693 } else {
2694 amd64_printk(KERN_WARNING, "Forcing ECC checking on!\n");
2693 } 2695 }
2694 ecc_enable_override = 0;
2695 } 2696 }
2696 2697
2697 return 0; 2698 return 0;
diff --git a/drivers/edac/amd64_edac.h b/drivers/edac/amd64_edac.h
index 41bc561e5981..0d4bf5638243 100644
--- a/drivers/edac/amd64_edac.h
+++ b/drivers/edac/amd64_edac.h
@@ -487,7 +487,8 @@ struct amd64_pvt {
487 /* misc settings */ 487 /* misc settings */
488 struct flags { 488 struct flags {
489 unsigned long cf8_extcfg:1; 489 unsigned long cf8_extcfg:1;
490 unsigned long ecc_report:1; 490 unsigned long nb_mce_enable:1;
491 unsigned long nb_ecc_prev:1;
491 } flags; 492 } flags;
492}; 493};
493 494