diff options
author | Borislav Petkov <borislav.petkov@amd.com> | 2010-12-13 13:21:07 -0500 |
---|---|---|
committer | Borislav Petkov <borislav.petkov@amd.com> | 2011-03-17 09:46:14 -0400 |
commit | f678b8ccce69dcf9c597e3029ee35421ba62a215 (patch) | |
tree | 49194173601c7d446864f0aae69c8c1f149fef96 /drivers/edac | |
parent | c8e518d5673d6b694ab843ee586438cdff0b3809 (diff) |
amd64_edac: Replace huge bitmasks with a macro
Replace hard to read hex constants with a continuous masks macro.
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
Diffstat (limited to 'drivers/edac')
-rw-r--r-- | drivers/edac/amd64_edac.c | 19 |
1 files changed, 9 insertions, 10 deletions
diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c index 32e323198f7c..aed7f7bbc5d2 100644 --- a/drivers/edac/amd64_edac.c +++ b/drivers/edac/amd64_edac.c | |||
@@ -570,7 +570,7 @@ static u64 sys_addr_to_dram_addr(struct mem_ctl_info *mci, u64 sys_addr) | |||
570 | * section 3.4.2 of AMD publication 24592: AMD x86-64 Architecture | 570 | * section 3.4.2 of AMD publication 24592: AMD x86-64 Architecture |
571 | * Programmer's Manual Volume 1 Application Programming. | 571 | * Programmer's Manual Volume 1 Application Programming. |
572 | */ | 572 | */ |
573 | dram_addr = (sys_addr & 0xffffffffffull) - dram_base; | 573 | dram_addr = (sys_addr & GENMASK(0, 39)) - dram_base; |
574 | 574 | ||
575 | debugf2("using DRAM Base register to translate SysAddr 0x%lx to " | 575 | debugf2("using DRAM Base register to translate SysAddr 0x%lx to " |
576 | "DramAddr 0x%lx\n", (unsigned long)sys_addr, | 576 | "DramAddr 0x%lx\n", (unsigned long)sys_addr, |
@@ -607,8 +607,8 @@ static u64 dram_addr_to_input_addr(struct mem_ctl_info *mci, u64 dram_addr) | |||
607 | * concerning translating a DramAddr to an InputAddr. | 607 | * concerning translating a DramAddr to an InputAddr. |
608 | */ | 608 | */ |
609 | intlv_shift = num_node_interleave_bits(dram_intlv_en(pvt, 0)); | 609 | intlv_shift = num_node_interleave_bits(dram_intlv_en(pvt, 0)); |
610 | input_addr = ((dram_addr >> intlv_shift) & 0xffffff000ull) + | 610 | input_addr = ((dram_addr >> intlv_shift) & GENMASK(12, 35)) + |
611 | (dram_addr & 0xfff); | 611 | (dram_addr & 0xfff); |
612 | 612 | ||
613 | debugf2(" Intlv Shift=%d DramAddr=0x%lx maps to InputAddr=0x%lx\n", | 613 | debugf2(" Intlv Shift=%d DramAddr=0x%lx maps to InputAddr=0x%lx\n", |
614 | intlv_shift, (unsigned long)dram_addr, | 614 | intlv_shift, (unsigned long)dram_addr, |
@@ -667,8 +667,8 @@ static u64 input_addr_to_dram_addr(struct mem_ctl_info *mci, u64 input_addr) | |||
667 | return input_addr; | 667 | return input_addr; |
668 | } | 668 | } |
669 | 669 | ||
670 | bits = ((input_addr & 0xffffff000ull) << intlv_shift) + | 670 | bits = ((input_addr & GENMASK(12, 35)) << intlv_shift) + |
671 | (input_addr & 0xfff); | 671 | (input_addr & 0xfff); |
672 | 672 | ||
673 | intlv_sel = dram_intlv_sel(pvt, node_id) & ((1 << intlv_shift) - 1); | 673 | intlv_sel = dram_intlv_sel(pvt, node_id) & ((1 << intlv_shift) - 1); |
674 | dram_addr = bits + (intlv_sel << 12); | 674 | dram_addr = bits + (intlv_sel << 12); |
@@ -1399,21 +1399,20 @@ static int f10_match_to_this_node(struct amd64_pvt *pvt, int range, | |||
1399 | chan_addr = f10_get_norm_dct_addr(pvt, range, sys_addr, | 1399 | chan_addr = f10_get_norm_dct_addr(pvt, range, sys_addr, |
1400 | high_range, dct_sel_base); | 1400 | high_range, dct_sel_base); |
1401 | 1401 | ||
1402 | /* remove Node ID (in case of memory interleaving) */ | 1402 | /* remove Node ID (in case of node interleaving) */ |
1403 | tmp = chan_addr & 0xFC0; | 1403 | tmp = chan_addr & 0xFC0; |
1404 | 1404 | ||
1405 | chan_addr = ((chan_addr >> hweight8(intlv_en)) & 0xFFFFFFFFF000ULL) | tmp; | 1405 | chan_addr = ((chan_addr >> hweight8(intlv_en)) & GENMASK(12, 47)) | tmp; |
1406 | 1406 | ||
1407 | /* remove channel interleave and hash */ | 1407 | /* remove channel interleave and hash */ |
1408 | if (dct_interleave_enabled(pvt) && | 1408 | if (dct_interleave_enabled(pvt) && |
1409 | !dct_high_range_enabled(pvt) && | 1409 | !dct_high_range_enabled(pvt) && |
1410 | !dct_ganging_enabled(pvt)) { | 1410 | !dct_ganging_enabled(pvt)) { |
1411 | if (dct_sel_interleave_addr(pvt) != 1) | 1411 | if (dct_sel_interleave_addr(pvt) != 1) |
1412 | chan_addr = (chan_addr >> 1) & 0xFFFFFFFFFFFFFFC0ULL; | 1412 | chan_addr = (chan_addr >> 1) & GENMASK(6, 63); |
1413 | else { | 1413 | else { |
1414 | tmp = chan_addr & 0xFC0; | 1414 | tmp = chan_addr & 0xFC0; |
1415 | chan_addr = ((chan_addr & 0xFFFFFFFFFFFFC000ULL) >> 1) | 1415 | chan_addr = ((chan_addr & GENMASK(14, 63)) >> 1) | tmp; |
1416 | | tmp; | ||
1417 | } | 1416 | } |
1418 | } | 1417 | } |
1419 | 1418 | ||