diff options
author | Keith Mannthey <kmannth@us.ibm.com> | 2009-10-26 19:50:11 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2009-10-29 10:39:30 -0400 |
commit | c2494ace990c5d37cfe66911b85d28e6945eadfc (patch) | |
tree | 4ac1a117d2b579e70edf33c3c3831d2ced7b10ca /drivers/edac | |
parent | 0616fb003d4f799c4be62275242fc7ff9a968f84 (diff) |
edac: i5100 fix initialization code
Allow csrows to properly initialize when the topology only has active
channels on 2 and 3. This new check allows proper detection and
initialization in this topology. Only checking the first mrt that
represented channels 0 and 1 is not sufficient.
I also fixed up the related debug information path. I can submit as a 2nd
patch if needed.
Signed-off-by: Keith Mannthey <kmannth@us.ibm.com>
Acked-by: Aristeu Rozanski <aris@ruivo.org>
Signed-off-by: Doug Thompson <dougthompson@xmission.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'drivers/edac')
-rw-r--r-- | drivers/edac/i5000_edac.c | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/drivers/edac/i5000_edac.c b/drivers/edac/i5000_edac.c index d335086f4a26..77a9579d7167 100644 --- a/drivers/edac/i5000_edac.c +++ b/drivers/edac/i5000_edac.c | |||
@@ -1173,7 +1173,7 @@ static void i5000_get_mc_regs(struct mem_ctl_info *mci) | |||
1173 | pci_read_config_word(pvt->branch_1, where, | 1173 | pci_read_config_word(pvt->branch_1, where, |
1174 | &pvt->b1_mtr[slot_row]); | 1174 | &pvt->b1_mtr[slot_row]); |
1175 | debugf2("MTR%d where=0x%x B1 value=0x%x\n", slot_row, | 1175 | debugf2("MTR%d where=0x%x B1 value=0x%x\n", slot_row, |
1176 | where, pvt->b0_mtr[slot_row]); | 1176 | where, pvt->b1_mtr[slot_row]); |
1177 | } else { | 1177 | } else { |
1178 | pvt->b1_mtr[slot_row] = 0; | 1178 | pvt->b1_mtr[slot_row] = 0; |
1179 | } | 1179 | } |
@@ -1232,7 +1232,7 @@ static int i5000_init_csrows(struct mem_ctl_info *mci) | |||
1232 | struct csrow_info *p_csrow; | 1232 | struct csrow_info *p_csrow; |
1233 | int empty, channel_count; | 1233 | int empty, channel_count; |
1234 | int max_csrows; | 1234 | int max_csrows; |
1235 | int mtr; | 1235 | int mtr, mtr1; |
1236 | int csrow_megs; | 1236 | int csrow_megs; |
1237 | int channel; | 1237 | int channel; |
1238 | int csrow; | 1238 | int csrow; |
@@ -1251,9 +1251,10 @@ static int i5000_init_csrows(struct mem_ctl_info *mci) | |||
1251 | 1251 | ||
1252 | /* use branch 0 for the basis */ | 1252 | /* use branch 0 for the basis */ |
1253 | mtr = pvt->b0_mtr[csrow >> 1]; | 1253 | mtr = pvt->b0_mtr[csrow >> 1]; |
1254 | mtr1 = pvt->b1_mtr[csrow >> 1]; | ||
1254 | 1255 | ||
1255 | /* if no DIMMS on this row, continue */ | 1256 | /* if no DIMMS on this row, continue */ |
1256 | if (!MTR_DIMMS_PRESENT(mtr)) | 1257 | if (!MTR_DIMMS_PRESENT(mtr) && !MTR_DIMMS_PRESENT(mtr1)) |
1257 | continue; | 1258 | continue; |
1258 | 1259 | ||
1259 | /* FAKE OUT VALUES, FIXME */ | 1260 | /* FAKE OUT VALUES, FIXME */ |