diff options
author | Peter Tyser <ptyser@xes-inc.com> | 2010-03-10 18:23:11 -0500 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2010-03-12 18:52:40 -0500 |
commit | 21768639be419d00275ac4e58b863361d0c24ee4 (patch) | |
tree | 845cff5c080d41e41cd8a7c0f455348bbcd590fa /drivers/edac | |
parent | 8467005da3ef6104b89a4cc5e9c9d9445b75565f (diff) |
edac: mpc85xx mask ecc syndrome correctly
With a 64-bit wide data bus only the lowest 8-bits of the ECC syndrome are
relevant. With a 32-bit wide data bus only the lowest 16-bits are
relevant on most architectures.
Without this change, the ECC syndrome displayed can be mildly confusing,
eg:
EDAC MPC85xx MC1: syndrome: 0x25252525
When in reality the ECC syndrome is 0x25.
A variety of Freescale manuals say a variety of different things about how
to decode the CAPTURE_ECC (syndrome) register. I don't have a system with
a 32-bit bus to test on, but I believe the change is correct. It'd be
good to get an ACK from someone at Freescale about this change though.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Doug Thompson <dougthompson@xmission.com>
Cc: Kumar Gala <galak@gate.crashing.org>
Cc: Dave Jiang <djiang@mvista.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'drivers/edac')
-rw-r--r-- | drivers/edac/mpc85xx_edac.c | 12 | ||||
-rw-r--r-- | drivers/edac/mpc85xx_edac.h | 3 |
2 files changed, 14 insertions, 1 deletions
diff --git a/drivers/edac/mpc85xx_edac.c b/drivers/edac/mpc85xx_edac.c index ecd5928d7110..6d0114a1b77e 100644 --- a/drivers/edac/mpc85xx_edac.c +++ b/drivers/edac/mpc85xx_edac.c | |||
@@ -672,6 +672,7 @@ static void mpc85xx_mc_check(struct mem_ctl_info *mci) | |||
672 | { | 672 | { |
673 | struct mpc85xx_mc_pdata *pdata = mci->pvt_info; | 673 | struct mpc85xx_mc_pdata *pdata = mci->pvt_info; |
674 | struct csrow_info *csrow; | 674 | struct csrow_info *csrow; |
675 | u32 bus_width; | ||
675 | u32 err_detect; | 676 | u32 err_detect; |
676 | u32 syndrome; | 677 | u32 syndrome; |
677 | u32 err_addr; | 678 | u32 err_addr; |
@@ -692,6 +693,15 @@ static void mpc85xx_mc_check(struct mem_ctl_info *mci) | |||
692 | } | 693 | } |
693 | 694 | ||
694 | syndrome = in_be32(pdata->mc_vbase + MPC85XX_MC_CAPTURE_ECC); | 695 | syndrome = in_be32(pdata->mc_vbase + MPC85XX_MC_CAPTURE_ECC); |
696 | |||
697 | /* Mask off appropriate bits of syndrome based on bus width */ | ||
698 | bus_width = (in_be32(pdata->mc_vbase + MPC85XX_MC_DDR_SDRAM_CFG) & | ||
699 | DSC_DBW_MASK) ? 32 : 64; | ||
700 | if (bus_width == 64) | ||
701 | syndrome &= 0xff; | ||
702 | else | ||
703 | syndrome &= 0xffff; | ||
704 | |||
695 | err_addr = in_be32(pdata->mc_vbase + MPC85XX_MC_CAPTURE_ADDRESS); | 705 | err_addr = in_be32(pdata->mc_vbase + MPC85XX_MC_CAPTURE_ADDRESS); |
696 | pfn = err_addr >> PAGE_SHIFT; | 706 | pfn = err_addr >> PAGE_SHIFT; |
697 | 707 | ||
@@ -707,7 +717,7 @@ static void mpc85xx_mc_check(struct mem_ctl_info *mci) | |||
707 | mpc85xx_mc_printk(mci, KERN_ERR, "Capture Data Low: %#8.8x\n", | 717 | mpc85xx_mc_printk(mci, KERN_ERR, "Capture Data Low: %#8.8x\n", |
708 | in_be32(pdata->mc_vbase + | 718 | in_be32(pdata->mc_vbase + |
709 | MPC85XX_MC_CAPTURE_DATA_LO)); | 719 | MPC85XX_MC_CAPTURE_DATA_LO)); |
710 | mpc85xx_mc_printk(mci, KERN_ERR, "syndrome: %#8.8x\n", syndrome); | 720 | mpc85xx_mc_printk(mci, KERN_ERR, "syndrome: %#2.2x\n", syndrome); |
711 | mpc85xx_mc_printk(mci, KERN_ERR, "err addr: %#8.8x\n", err_addr); | 721 | mpc85xx_mc_printk(mci, KERN_ERR, "err addr: %#8.8x\n", err_addr); |
712 | mpc85xx_mc_printk(mci, KERN_ERR, "PFN: %#8.8x\n", pfn); | 722 | mpc85xx_mc_printk(mci, KERN_ERR, "PFN: %#8.8x\n", pfn); |
713 | 723 | ||
diff --git a/drivers/edac/mpc85xx_edac.h b/drivers/edac/mpc85xx_edac.h index 52432ee7c4b9..cb24df839460 100644 --- a/drivers/edac/mpc85xx_edac.h +++ b/drivers/edac/mpc85xx_edac.h | |||
@@ -48,6 +48,9 @@ | |||
48 | #define DSC_MEM_EN 0x80000000 | 48 | #define DSC_MEM_EN 0x80000000 |
49 | #define DSC_ECC_EN 0x20000000 | 49 | #define DSC_ECC_EN 0x20000000 |
50 | #define DSC_RD_EN 0x10000000 | 50 | #define DSC_RD_EN 0x10000000 |
51 | #define DSC_DBW_MASK 0x00180000 | ||
52 | #define DSC_DBW_32 0x00080000 | ||
53 | #define DSC_DBW_64 0x00000000 | ||
51 | 54 | ||
52 | #define DSC_SDTYPE_MASK 0x07000000 | 55 | #define DSC_SDTYPE_MASK 0x07000000 |
53 | 56 | ||