diff options
author | Alan Cox <alan@linux.intel.com> | 2009-11-07 22:34:27 -0500 |
---|---|---|
committer | Mauro Carvalho Chehab <mchehab@redhat.com> | 2010-05-10 10:49:32 -0400 |
commit | 486dd09f129da01cd02b212ba48dce987488b860 (patch) | |
tree | 3f9531916d16a75edda06073a8febccb978214b0 /drivers/edac | |
parent | de06eeef5809a69ff4daaae2bd63977e5404553d (diff) |
edac: i7core_edac produces undefined behaviour on 32bit
Fix the shifts up
Signed-off-by: Alan Cox <alan@linux.intel.com>
Acked-by: Doug Thompson <dougthompson@xmission.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'drivers/edac')
-rw-r--r-- | drivers/edac/i7core_edac.c | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/drivers/edac/i7core_edac.c b/drivers/edac/i7core_edac.c index b6fce2e38e3d..bd7c727030a3 100644 --- a/drivers/edac/i7core_edac.c +++ b/drivers/edac/i7core_edac.c | |||
@@ -916,41 +916,41 @@ static ssize_t i7core_inject_enable_store(struct mem_ctl_info *mci, | |||
916 | 916 | ||
917 | /* Sets pvt->inject.dimm mask */ | 917 | /* Sets pvt->inject.dimm mask */ |
918 | if (pvt->inject.dimm < 0) | 918 | if (pvt->inject.dimm < 0) |
919 | mask |= 1L << 41; | 919 | mask |= 1LL << 41; |
920 | else { | 920 | else { |
921 | if (pvt->channel[pvt->inject.channel].dimms > 2) | 921 | if (pvt->channel[pvt->inject.channel].dimms > 2) |
922 | mask |= (pvt->inject.dimm & 0x3L) << 35; | 922 | mask |= (pvt->inject.dimm & 0x3LL) << 35; |
923 | else | 923 | else |
924 | mask |= (pvt->inject.dimm & 0x1L) << 36; | 924 | mask |= (pvt->inject.dimm & 0x1LL) << 36; |
925 | } | 925 | } |
926 | 926 | ||
927 | /* Sets pvt->inject.rank mask */ | 927 | /* Sets pvt->inject.rank mask */ |
928 | if (pvt->inject.rank < 0) | 928 | if (pvt->inject.rank < 0) |
929 | mask |= 1L << 40; | 929 | mask |= 1LL << 40; |
930 | else { | 930 | else { |
931 | if (pvt->channel[pvt->inject.channel].dimms > 2) | 931 | if (pvt->channel[pvt->inject.channel].dimms > 2) |
932 | mask |= (pvt->inject.rank & 0x1L) << 34; | 932 | mask |= (pvt->inject.rank & 0x1LL) << 34; |
933 | else | 933 | else |
934 | mask |= (pvt->inject.rank & 0x3L) << 34; | 934 | mask |= (pvt->inject.rank & 0x3LL) << 34; |
935 | } | 935 | } |
936 | 936 | ||
937 | /* Sets pvt->inject.bank mask */ | 937 | /* Sets pvt->inject.bank mask */ |
938 | if (pvt->inject.bank < 0) | 938 | if (pvt->inject.bank < 0) |
939 | mask |= 1L << 39; | 939 | mask |= 1LL << 39; |
940 | else | 940 | else |
941 | mask |= (pvt->inject.bank & 0x15L) << 30; | 941 | mask |= (pvt->inject.bank & 0x15LL) << 30; |
942 | 942 | ||
943 | /* Sets pvt->inject.page mask */ | 943 | /* Sets pvt->inject.page mask */ |
944 | if (pvt->inject.page < 0) | 944 | if (pvt->inject.page < 0) |
945 | mask |= 1L << 38; | 945 | mask |= 1LL << 38; |
946 | else | 946 | else |
947 | mask |= (pvt->inject.page & 0xffffL) << 14; | 947 | mask |= (pvt->inject.page & 0xffff) << 14; |
948 | 948 | ||
949 | /* Sets pvt->inject.column mask */ | 949 | /* Sets pvt->inject.column mask */ |
950 | if (pvt->inject.col < 0) | 950 | if (pvt->inject.col < 0) |
951 | mask |= 1L << 37; | 951 | mask |= 1LL << 37; |
952 | else | 952 | else |
953 | mask |= (pvt->inject.col & 0x3fffL); | 953 | mask |= (pvt->inject.col & 0x3fff); |
954 | 954 | ||
955 | /* | 955 | /* |
956 | * bit 0: REPEAT_EN | 956 | * bit 0: REPEAT_EN |