diff options
author | Tony Lindgren <tony@atomide.com> | 2010-02-17 17:08:58 -0500 |
---|---|---|
committer | Tony Lindgren <tony@atomide.com> | 2010-02-17 17:08:58 -0500 |
commit | 80c20d543d142ee54ec85259b77aaf0b83c32db5 (patch) | |
tree | 364017b2c001939bbb645dcc20d565c1f71b13a8 /drivers/edac | |
parent | d6a2d9b800276140abf352908abbd0c240890692 (diff) | |
parent | b72c7d543589736d43da531566490dd31572f5ca (diff) |
Merge branch 'omap-fixes-for-linus' into omap-for-linus
Diffstat (limited to 'drivers/edac')
-rw-r--r-- | drivers/edac/amd64_edac.c | 15 | ||||
-rw-r--r-- | drivers/edac/mpc85xx_edac.c | 8 |
2 files changed, 10 insertions, 13 deletions
diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c index 000dc67b85b7..3391e6739d06 100644 --- a/drivers/edac/amd64_edac.c +++ b/drivers/edac/amd64_edac.c | |||
@@ -2658,10 +2658,11 @@ static void amd64_restore_ecc_error_reporting(struct amd64_pvt *pvt) | |||
2658 | * the memory system completely. A command line option allows to force-enable | 2658 | * the memory system completely. A command line option allows to force-enable |
2659 | * hardware ECC later in amd64_enable_ecc_error_reporting(). | 2659 | * hardware ECC later in amd64_enable_ecc_error_reporting(). |
2660 | */ | 2660 | */ |
2661 | static const char *ecc_warning = | 2661 | static const char *ecc_msg = |
2662 | "WARNING: ECC is disabled by BIOS. Module will NOT be loaded.\n" | 2662 | "ECC disabled in the BIOS or no ECC capability, module will not load.\n" |
2663 | " Either Enable ECC in the BIOS, or set 'ecc_enable_override'.\n" | 2663 | " Either enable ECC checking or force module loading by setting " |
2664 | " Also, use of the override can cause unknown side effects.\n"; | 2664 | "'ecc_enable_override'.\n" |
2665 | " (Note that use of the override may cause unknown side effects.)\n"; | ||
2665 | 2666 | ||
2666 | static int amd64_check_ecc_enabled(struct amd64_pvt *pvt) | 2667 | static int amd64_check_ecc_enabled(struct amd64_pvt *pvt) |
2667 | { | 2668 | { |
@@ -2673,7 +2674,7 @@ static int amd64_check_ecc_enabled(struct amd64_pvt *pvt) | |||
2673 | 2674 | ||
2674 | ecc_enabled = !!(value & K8_NBCFG_ECC_ENABLE); | 2675 | ecc_enabled = !!(value & K8_NBCFG_ECC_ENABLE); |
2675 | if (!ecc_enabled) | 2676 | if (!ecc_enabled) |
2676 | amd64_printk(KERN_WARNING, "This node reports that Memory ECC " | 2677 | amd64_printk(KERN_NOTICE, "This node reports that Memory ECC " |
2677 | "is currently disabled, set F3x%x[22] (%s).\n", | 2678 | "is currently disabled, set F3x%x[22] (%s).\n", |
2678 | K8_NBCFG, pci_name(pvt->misc_f3_ctl)); | 2679 | K8_NBCFG, pci_name(pvt->misc_f3_ctl)); |
2679 | else | 2680 | else |
@@ -2681,13 +2682,13 @@ static int amd64_check_ecc_enabled(struct amd64_pvt *pvt) | |||
2681 | 2682 | ||
2682 | nb_mce_en = amd64_nb_mce_bank_enabled_on_node(pvt->mc_node_id); | 2683 | nb_mce_en = amd64_nb_mce_bank_enabled_on_node(pvt->mc_node_id); |
2683 | if (!nb_mce_en) | 2684 | if (!nb_mce_en) |
2684 | amd64_printk(KERN_WARNING, "NB MCE bank disabled, set MSR " | 2685 | amd64_printk(KERN_NOTICE, "NB MCE bank disabled, set MSR " |
2685 | "0x%08x[4] on node %d to enable.\n", | 2686 | "0x%08x[4] on node %d to enable.\n", |
2686 | MSR_IA32_MCG_CTL, pvt->mc_node_id); | 2687 | MSR_IA32_MCG_CTL, pvt->mc_node_id); |
2687 | 2688 | ||
2688 | if (!ecc_enabled || !nb_mce_en) { | 2689 | if (!ecc_enabled || !nb_mce_en) { |
2689 | if (!ecc_enable_override) { | 2690 | if (!ecc_enable_override) { |
2690 | amd64_printk(KERN_WARNING, "%s", ecc_warning); | 2691 | amd64_printk(KERN_NOTICE, "%s", ecc_msg); |
2691 | return -ENODEV; | 2692 | return -ENODEV; |
2692 | } | 2693 | } |
2693 | ecc_enable_override = 0; | 2694 | ecc_enable_override = 0; |
diff --git a/drivers/edac/mpc85xx_edac.c b/drivers/edac/mpc85xx_edac.c index cf27402af97b..ecd5928d7110 100644 --- a/drivers/edac/mpc85xx_edac.c +++ b/drivers/edac/mpc85xx_edac.c | |||
@@ -804,8 +804,8 @@ static void __devinit mpc85xx_init_csrows(struct mem_ctl_info *mci) | |||
804 | end <<= (24 - PAGE_SHIFT); | 804 | end <<= (24 - PAGE_SHIFT); |
805 | end |= (1 << (24 - PAGE_SHIFT)) - 1; | 805 | end |= (1 << (24 - PAGE_SHIFT)) - 1; |
806 | 806 | ||
807 | csrow->first_page = start >> PAGE_SHIFT; | 807 | csrow->first_page = start; |
808 | csrow->last_page = end >> PAGE_SHIFT; | 808 | csrow->last_page = end; |
809 | csrow->nr_pages = end + 1 - start; | 809 | csrow->nr_pages = end + 1 - start; |
810 | csrow->grain = 8; | 810 | csrow->grain = 8; |
811 | csrow->mtype = mtype; | 811 | csrow->mtype = mtype; |
@@ -892,10 +892,6 @@ static int __devinit mpc85xx_mc_err_probe(struct of_device *op, | |||
892 | 892 | ||
893 | mpc85xx_init_csrows(mci); | 893 | mpc85xx_init_csrows(mci); |
894 | 894 | ||
895 | #ifdef CONFIG_EDAC_DEBUG | ||
896 | edac_mc_register_mcidev_debug((struct attribute **)debug_attr); | ||
897 | #endif | ||
898 | |||
899 | /* store the original error disable bits */ | 895 | /* store the original error disable bits */ |
900 | orig_ddr_err_disable = | 896 | orig_ddr_err_disable = |
901 | in_be32(pdata->mc_vbase + MPC85XX_MC_ERR_DISABLE); | 897 | in_be32(pdata->mc_vbase + MPC85XX_MC_ERR_DISABLE); |