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authorMauro Carvalho Chehab <mchehab@redhat.com>2009-07-20 17:48:18 -0400
committerMauro Carvalho Chehab <mchehab@redhat.com>2010-05-10 10:44:54 -0400
commit17cb7b0cf78c14913c5410eff2ce03e1d9c8d958 (patch)
treea6b33de71178535232cfc1e1ac8da0d401112305 /drivers/edac
parent086271a0374bf0b9ce033aac9fb60530c421ad65 (diff)
i7core_edac: Some cleanups at displayed info
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'drivers/edac')
-rw-r--r--drivers/edac/i7core_edac.c21
1 files changed, 9 insertions, 12 deletions
diff --git a/drivers/edac/i7core_edac.c b/drivers/edac/i7core_edac.c
index fd00e0299ca1..86af14840b88 100644
--- a/drivers/edac/i7core_edac.c
+++ b/drivers/edac/i7core_edac.c
@@ -453,8 +453,8 @@ static int get_dimm_config(struct mem_ctl_info *mci, int *csrow, u8 socket)
453 pci_read_config_dword(pdev, MC_MAX_DOD, &pvt->info.max_dod); 453 pci_read_config_dword(pdev, MC_MAX_DOD, &pvt->info.max_dod);
454 pci_read_config_dword(pdev, MC_CHANNEL_MAPPER, &pvt->info.ch_map); 454 pci_read_config_dword(pdev, MC_CHANNEL_MAPPER, &pvt->info.ch_map);
455 455
456 debugf0("MC control=0x%08x status=0x%08x dod=0x%08x map=0x%08x\n", 456 debugf0("QPI %d control=0x%08x status=0x%08x dod=0x%08x map=0x%08x\n",
457 pvt->info.mc_control, pvt->info.mc_status, 457 socket, pvt->info.mc_control, pvt->info.mc_status,
458 pvt->info.max_dod, pvt->info.ch_map); 458 pvt->info.max_dod, pvt->info.ch_map);
459 459
460 if (ECC_ENABLED(pvt)) { 460 if (ECC_ENABLED(pvt)) {
@@ -469,16 +469,14 @@ static int get_dimm_config(struct mem_ctl_info *mci, int *csrow, u8 socket)
469 } 469 }
470 470
471 /* FIXME: need to handle the error codes */ 471 /* FIXME: need to handle the error codes */
472 debugf0("DOD Max limits: DIMMS: %d, %d-ranked, %d-banked\n", 472 debugf0("DOD Max limits: DIMMS: %d, %d-ranked, %d-banked "
473 "x%x x 0x%x\n",
473 numdimms(pvt->info.max_dod), 474 numdimms(pvt->info.max_dod),
474 numrank(pvt->info.max_dod >> 2), 475 numrank(pvt->info.max_dod >> 2),
475 numbank(pvt->info.max_dod >> 4)); 476 numbank(pvt->info.max_dod >> 4));
476 debugf0("DOD Max rows x colums = 0x%x x 0x%x\n",
477 numrow(pvt->info.max_dod >> 6), 477 numrow(pvt->info.max_dod >> 6),
478 numcol(pvt->info.max_dod >> 9)); 478 numcol(pvt->info.max_dod >> 9));
479 479
480 debugf0("Memory channel configuration:\n");
481
482 for (i = 0; i < NUM_CHANS; i++) { 480 for (i = 0; i < NUM_CHANS; i++) {
483 u32 data, dimm_dod[3], value[8]; 481 u32 data, dimm_dod[3], value[8];
484 482
@@ -544,10 +542,9 @@ static int get_dimm_config(struct mem_ctl_info *mci, int *csrow, u8 socket)
544 542
545 pvt->channel[socket][i].dimms++; 543 pvt->channel[socket][i].dimms++;
546 544
547 debugf0("\tdimm %d (0x%08x) %d Mb offset: %x, " 545 debugf0("\tdimm %d %d Mb offset: %x, "
548 "numbank: %d,\n\t\t" 546 "bank: %d, rank: %d, row: %#x, col: %#x\n",
549 "numrank: %d, numrow: %#x, numcol: %#x\n", 547 j, size,
550 j, dimm_dod[j], size,
551 RANKOFFSET(dimm_dod[j]), 548 RANKOFFSET(dimm_dod[j]),
552 banks, ranks, rows, cols); 549 banks, ranks, rows, cols);
553 550
@@ -599,9 +596,9 @@ static int get_dimm_config(struct mem_ctl_info *mci, int *csrow, u8 socket)
599 pci_read_config_dword(pdev, MC_SAG_CH_5, &value[5]); 596 pci_read_config_dword(pdev, MC_SAG_CH_5, &value[5]);
600 pci_read_config_dword(pdev, MC_SAG_CH_6, &value[6]); 597 pci_read_config_dword(pdev, MC_SAG_CH_6, &value[6]);
601 pci_read_config_dword(pdev, MC_SAG_CH_7, &value[7]); 598 pci_read_config_dword(pdev, MC_SAG_CH_7, &value[7]);
602 debugf0("\t[%i] DIVBY3\tREMOVED\tOFFSET\n", i); 599 debugf1("\t[%i] DIVBY3\tREMOVED\tOFFSET\n", i);
603 for (j = 0; j < 8; j++) 600 for (j = 0; j < 8; j++)
604 debugf0("\t\t%#x\t%#x\t%#x\n", 601 debugf1("\t\t%#x\t%#x\t%#x\n",
605 (value[j] >> 27) & 0x1, 602 (value[j] >> 27) & 0x1,
606 (value[j] >> 24) & 0x7, 603 (value[j] >> 24) & 0x7,
607 (value[j] && ((1 << 24) - 1))); 604 (value[j] && ((1 << 24) - 1)));