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authorArvind R <arvino55@gmail.com>2011-01-25 12:08:27 -0500
committerJiri Kosina <jkosina@suse.cz>2011-02-17 10:44:45 -0500
commit7ba9957581a889ce19919a0cdc1cef9f04e5e3a8 (patch)
treeff10350cf36aaa5a1a3ade9746c671c39694a8d6 /drivers/edac/i82975x_edac.c
parentb0a4bb830e099a31bec79452268639a7d8c2c1e4 (diff)
edac: correct commented info
wrong comments in i82975x driver corrected Signed-off-by: Arvind R. <arvino55@gmail.com> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
Diffstat (limited to 'drivers/edac/i82975x_edac.c')
-rw-r--r--drivers/edac/i82975x_edac.c10
1 files changed, 3 insertions, 7 deletions
diff --git a/drivers/edac/i82975x_edac.c b/drivers/edac/i82975x_edac.c
index 5e3acb4eecc9..8ec4e9eef72f 100644
--- a/drivers/edac/i82975x_edac.c
+++ b/drivers/edac/i82975x_edac.c
@@ -160,8 +160,8 @@ NOTE: Only ONE of the three must be enabled
160 * 3:2 Rank 1 architecture 160 * 3:2 Rank 1 architecture
161 * 1:0 Rank 0 architecture 161 * 1:0 Rank 0 architecture
162 * 162 *
163 * 00 => x16 devices; i.e 4 banks 163 * 00 => 4 banks
164 * 01 => x8 devices; i.e 8 banks 164 * 01 => 8 banks
165 */ 165 */
166#define I82975X_C0BNKARC 0x10e 166#define I82975X_C0BNKARC 0x10e
167#define I82975X_C1BNKARC 0x18e 167#define I82975X_C1BNKARC 0x18e
@@ -344,11 +344,7 @@ static int dual_channel_active(void __iomem *mch_window)
344static enum dev_type i82975x_dram_type(void __iomem *mch_window, int rank) 344static enum dev_type i82975x_dram_type(void __iomem *mch_window, int rank)
345{ 345{
346 /* 346 /*
347 * ASUS P5W DH either does not program this register or programs 347 * ECC is possible on i92975x ONLY with DEV_X8
348 * it wrong!
349 * ECC is possible on i92975x ONLY with DEV_X8 which should mean 'val'
350 * for each rank should be 01b - the LSB of the word should be 0x55;
351 * but it reads 0!
352 */ 348 */
353 return DEV_X8; 349 return DEV_X8;
354} 350}