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authorMauro Carvalho Chehab <mchehab@redhat.com>2012-01-28 07:09:38 -0500
committerMauro Carvalho Chehab <mchehab@redhat.com>2012-05-28 18:10:58 -0400
commita895bf8b1e1ea4c032a8fa8a09475a2ce09fe77a (patch)
tree79a1110d0f4a6f2d50d870fa77d11a5311fee4fc /drivers/edac/i5400_edac.c
parent5e2af0c09e60d11dd8297e259a9ca2b3d92d2cf4 (diff)
edac: move nr_pages to dimm struct
The number of pages is a dimm property. Move it to the dimm struct. After this change, it is possible to add sysfs nodes for the DIMM's that will properly represent the DIMM stick properties, including its size. A TODO fix here is to properly represent dual-rank/quad-rank DIMMs when the memory controller represents the memory via chip select rows. Reviewed-by: Aristeu Rozanski <arozansk@redhat.com> Acked-by: Borislav Petkov <borislav.petkov@amd.com> Acked-by: Chris Metcalf <cmetcalf@tilera.com> Cc: Doug Thompson <norsk5@yahoo.com> Cc: Mark Gross <mark.gross@intel.com> Cc: Jason Uhlenkott <juhlenko@akamai.com> Cc: Tim Small <tim@buttersideup.com> Cc: Ranganathan Desikan <ravi@jetztechnologies.com> Cc: "Arvind R." <arvino55@gmail.com> Cc: Olof Johansson <olof@lixom.net> Cc: Egor Martovetsky <egor@pasemi.com> Cc: Michal Marek <mmarek@suse.cz> Cc: Jiri Kosina <jkosina@suse.cz> Cc: Joe Perches <joe@perches.com> Cc: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Hitoshi Mitake <h.mitake@gmail.com> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: "Niklas Söderlund" <niklas.soderlund@ericsson.com> Cc: Shaohui Xie <Shaohui.Xie@freescale.com> Cc: Josh Boyer <jwboyer@gmail.com> Cc: linuxppc-dev@lists.ozlabs.org Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'drivers/edac/i5400_edac.c')
-rw-r--r--drivers/edac/i5400_edac.c9
1 files changed, 3 insertions, 6 deletions
diff --git a/drivers/edac/i5400_edac.c b/drivers/edac/i5400_edac.c
index 6f85dcb34019..6543f4a8367b 100644
--- a/drivers/edac/i5400_edac.c
+++ b/drivers/edac/i5400_edac.c
@@ -1156,7 +1156,7 @@ static int i5400_init_csrows(struct mem_ctl_info *mci)
1156 int empty, channel_count; 1156 int empty, channel_count;
1157 int max_csrows; 1157 int max_csrows;
1158 int mtr; 1158 int mtr;
1159 int csrow_megs; 1159 int size_mb;
1160 int channel; 1160 int channel;
1161 int csrow; 1161 int csrow;
1162 struct dimm_info *dimm; 1162 struct dimm_info *dimm;
@@ -1171,8 +1171,6 @@ static int i5400_init_csrows(struct mem_ctl_info *mci)
1171 for (csrow = 0; csrow < max_csrows; csrow++) { 1171 for (csrow = 0; csrow < max_csrows; csrow++) {
1172 p_csrow = &mci->csrows[csrow]; 1172 p_csrow = &mci->csrows[csrow];
1173 1173
1174 p_csrow->csrow_idx = csrow;
1175
1176 /* use branch 0 for the basis */ 1174 /* use branch 0 for the basis */
1177 mtr = determine_mtr(pvt, csrow, 0); 1175 mtr = determine_mtr(pvt, csrow, 0);
1178 1176
@@ -1180,12 +1178,11 @@ static int i5400_init_csrows(struct mem_ctl_info *mci)
1180 if (!MTR_DIMMS_PRESENT(mtr)) 1178 if (!MTR_DIMMS_PRESENT(mtr))
1181 continue; 1179 continue;
1182 1180
1183 csrow_megs = 0;
1184 for (channel = 0; channel < pvt->maxch; channel++) { 1181 for (channel = 0; channel < pvt->maxch; channel++) {
1185 csrow_megs += pvt->dimm_info[csrow][channel].megabytes; 1182 size_mb = pvt->dimm_info[csrow][channel].megabytes;
1186 1183
1187 p_csrow->nr_pages = csrow_megs << 8;
1188 dimm = p_csrow->channels[channel].dimm; 1184 dimm = p_csrow->channels[channel].dimm;
1185 dimm->nr_pages = size_mb << 8;
1189 dimm->grain = 8; 1186 dimm->grain = 8;
1190 dimm->dtype = MTR_DRAM_WIDTH(mtr) ? DEV_X8 : DEV_X4; 1187 dimm->dtype = MTR_DRAM_WIDTH(mtr) ? DEV_X8 : DEV_X4;
1191 dimm->mtype = MEM_RDDR2; 1188 dimm->mtype = MEM_RDDR2;