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authorMauro Carvalho Chehab <mchehab@redhat.com>2012-04-16 14:09:46 -0400
committerMauro Carvalho Chehab <mchehab@redhat.com>2012-05-28 18:11:01 -0400
commit702df64053e440344ccb53035cb6959f17a97151 (patch)
treeb025aaf1c64814d1673a69d48c91ba83bd429f7e /drivers/edac/i5000_edac.c
parent95b93287c6eac639538fb0a2689d3ecc2916c0ec (diff)
i5000_edac: convert driver to use the new edac ABI
The legacy edac ABI is going to be removed. Port the driver to use and benefit from the new API functionality. Cc: Doug Thompson <norsk5@yahoo.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'drivers/edac/i5000_edac.c')
-rw-r--r--drivers/edac/i5000_edac.c60
1 files changed, 39 insertions, 21 deletions
diff --git a/drivers/edac/i5000_edac.c b/drivers/edac/i5000_edac.c
index f3a1a3e1e4e1..fdbc57cb7287 100644
--- a/drivers/edac/i5000_edac.c
+++ b/drivers/edac/i5000_edac.c
@@ -533,13 +533,14 @@ static void i5000_process_fatal_error_info(struct mem_ctl_info *mci,
533 533
534 /* Form out message */ 534 /* Form out message */
535 snprintf(msg, sizeof(msg), 535 snprintf(msg, sizeof(msg),
536 "(Branch=%d DRAM-Bank=%d RDWR=%s RAS=%d CAS=%d " 536 "Bank=%d RAS=%d CAS=%d FATAL Err=0x%x (%s)",
537 "FATAL Err=0x%x (%s))", 537 bank, ras, cas, allErrors, specific);
538 branch >> 1, bank, rdwr ? "Write" : "Read", ras, cas,
539 allErrors, specific);
540 538
541 /* Call the helper to output message */ 539 /* Call the helper to output message */
542 edac_mc_handle_fbd_ue(mci, rank, channel, channel + 1, msg); 540 edac_mc_handle_error(HW_EVENT_ERR_FATAL, mci, 0, 0, 0,
541 branch >> 1, -1, rank,
542 rdwr ? "Write error" : "Read error",
543 msg, NULL);
543} 544}
544 545
545/* 546/*
@@ -633,13 +634,14 @@ static void i5000_process_nonfatal_error_info(struct mem_ctl_info *mci,
633 634
634 /* Form out message */ 635 /* Form out message */
635 snprintf(msg, sizeof(msg), 636 snprintf(msg, sizeof(msg),
636 "(Branch=%d DRAM-Bank=%d RDWR=%s RAS=%d " 637 "Rank=%d Bank=%d RAS=%d CAS=%d, UE Err=0x%x (%s)",
637 "CAS=%d, UE Err=0x%x (%s))", 638 rank, bank, ras, cas, ue_errors, specific);
638 branch >> 1, bank, rdwr ? "Write" : "Read", ras, cas,
639 ue_errors, specific);
640 639
641 /* Call the helper to output message */ 640 /* Call the helper to output message */
642 edac_mc_handle_fbd_ue(mci, rank, channel, channel + 1, msg); 641 edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 0, 0, 0,
642 channel >> 1, -1, rank,
643 rdwr ? "Write error" : "Read error",
644 msg, NULL);
643 } 645 }
644 646
645 /* Check correctable errors */ 647 /* Check correctable errors */
@@ -685,13 +687,16 @@ static void i5000_process_nonfatal_error_info(struct mem_ctl_info *mci,
685 687
686 /* Form out message */ 688 /* Form out message */
687 snprintf(msg, sizeof(msg), 689 snprintf(msg, sizeof(msg),
688 "(Branch=%d DRAM-Bank=%d RDWR=%s RAS=%d " 690 "Rank=%d Bank=%d RDWR=%s RAS=%d "
689 "CAS=%d, CE Err=0x%x (%s))", branch >> 1, bank, 691 "CAS=%d, CE Err=0x%x (%s))", branch >> 1, bank,
690 rdwr ? "Write" : "Read", ras, cas, ce_errors, 692 rdwr ? "Write" : "Read", ras, cas, ce_errors,
691 specific); 693 specific);
692 694
693 /* Call the helper to output message */ 695 /* Call the helper to output message */
694 edac_mc_handle_fbd_ce(mci, rank, channel, msg); 696 edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, 0, 0, 0,
697 channel >> 1, channel % 2, rank,
698 rdwr ? "Write error" : "Read error",
699 msg, NULL);
695 } 700 }
696 701
697 if (!misc_messages) 702 if (!misc_messages)
@@ -731,11 +736,12 @@ static void i5000_process_nonfatal_error_info(struct mem_ctl_info *mci,
731 736
732 /* Form out message */ 737 /* Form out message */
733 snprintf(msg, sizeof(msg), 738 snprintf(msg, sizeof(msg),
734 "(Branch=%d Err=%#x (%s))", branch >> 1, 739 "Err=%#x (%s)", misc_errors, specific);
735 misc_errors, specific);
736 740
737 /* Call the helper to output message */ 741 /* Call the helper to output message */
738 edac_mc_handle_fbd_ce(mci, 0, 0, msg); 742 edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, 0, 0, 0,
743 branch >> 1, -1, -1,
744 "Misc error", msg, NULL);
739 } 745 }
740} 746}
741 747
@@ -1251,6 +1257,10 @@ static int i5000_init_csrows(struct mem_ctl_info *mci)
1251 1257
1252 empty = 1; /* Assume NO memory */ 1258 empty = 1; /* Assume NO memory */
1253 1259
1260 /*
1261 * TODO: it would be better to not use csrow here, filling
1262 * directly the dimm_info structs, based on branch, channel, dim number
1263 */
1254 for (csrow = 0; csrow < max_csrows; csrow++) { 1264 for (csrow = 0; csrow < max_csrows; csrow++) {
1255 p_csrow = &mci->csrows[csrow]; 1265 p_csrow = &mci->csrows[csrow];
1256 1266
@@ -1312,7 +1322,7 @@ static void i5000_enable_error_reporting(struct mem_ctl_info *mci)
1312} 1322}
1313 1323
1314/* 1324/*
1315 * i5000_get_dimm_and_channel_counts(pdev, &num_csrows, &num_channels) 1325 * i5000_get_dimm_and_channel_counts(pdev, &nr_csrows, &num_channels)
1316 * 1326 *
1317 * ask the device how many channels are present and how many CSROWS 1327 * ask the device how many channels are present and how many CSROWS
1318 * as well 1328 * as well
@@ -1343,10 +1353,10 @@ static void i5000_get_dimm_and_channel_counts(struct pci_dev *pdev,
1343static int i5000_probe1(struct pci_dev *pdev, int dev_idx) 1353static int i5000_probe1(struct pci_dev *pdev, int dev_idx)
1344{ 1354{
1345 struct mem_ctl_info *mci; 1355 struct mem_ctl_info *mci;
1356 struct edac_mc_layer layers[3];
1346 struct i5000_pvt *pvt; 1357 struct i5000_pvt *pvt;
1347 int num_channels; 1358 int num_channels;
1348 int num_dimms_per_channel; 1359 int num_dimms_per_channel;
1349 int num_csrows;
1350 1360
1351 debugf0("MC: %s: %s(), pdev bus %u dev=0x%x fn=0x%x\n", 1361 debugf0("MC: %s: %s(), pdev bus %u dev=0x%x fn=0x%x\n",
1352 __FILE__, __func__, 1362 __FILE__, __func__,
@@ -1372,13 +1382,21 @@ static int i5000_probe1(struct pci_dev *pdev, int dev_idx)
1372 */ 1382 */
1373 i5000_get_dimm_and_channel_counts(pdev, &num_dimms_per_channel, 1383 i5000_get_dimm_and_channel_counts(pdev, &num_dimms_per_channel,
1374 &num_channels); 1384 &num_channels);
1375 num_csrows = num_dimms_per_channel * 2;
1376 1385
1377 debugf0("MC: %s(): Number of - Channels= %d DIMMS= %d CSROWS= %d\n", 1386 debugf0("MC: %s(): Number of Branches=2 Channels= %d DIMMS= %d\n",
1378 __func__, num_channels, num_dimms_per_channel, num_csrows); 1387 __func__, num_channels, num_dimms_per_channel);
1379 1388
1380 /* allocate a new MC control structure */ 1389 /* allocate a new MC control structure */
1381 mci = edac_mc_alloc(sizeof(*pvt), num_csrows, num_channels, 0); 1390 layers[0].type = EDAC_MC_LAYER_BRANCH;
1391 layers[0].size = 2;
1392 layers[0].is_virt_csrow = true;
1393 layers[1].type = EDAC_MC_LAYER_CHANNEL;
1394 layers[1].size = num_channels;
1395 layers[1].is_virt_csrow = false;
1396 layers[2].type = EDAC_MC_LAYER_SLOT;
1397 layers[2].size = num_dimms_per_channel;
1398 layers[2].is_virt_csrow = true;
1399 mci = new_edac_mc_alloc(0, ARRAY_SIZE(layers), layers, sizeof(*pvt));
1382 1400
1383 if (mci == NULL) 1401 if (mci == NULL)
1384 return -ENOMEM; 1402 return -ENOMEM;