diff options
author | eric wollesen <ericw@xmtp.net> | 2007-02-12 03:53:08 -0500 |
---|---|---|
committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-02-12 12:48:32 -0500 |
commit | 9794f33ddedd878dd92fcf8b4834391840366919 (patch) | |
tree | b64ed2488fe95a1217d14704422cc467193f34a3 /drivers/edac/edac_mc.h | |
parent | 4f423ddf56e5ecb1fb2eac83b8e228e3d0aae0f6 (diff) |
[PATCH] EDAC: Add Fully-Buffered DIMM APIs to core
Eric Wollesen ported the Bluesmoke Memory Controller driver for the Intel
5000X/V/P (Blackford/Greencreek) chipset to the in kernel EDAC model.
This patch incorporates those required changes to the edac_mc.c and edac_mc.h
core files by added new Fully Buffered DIMM interface to the EDAC Core module.
Signed-off-by: eric wollesen <ericw@xmtp.net>
Signed-off-by: doug thompson <norsk5@xmission.com>
Acked-by: Alan Cox <alan@redhat.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'drivers/edac/edac_mc.h')
-rw-r--r-- | drivers/edac/edac_mc.h | 16 |
1 files changed, 15 insertions, 1 deletions
diff --git a/drivers/edac/edac_mc.h b/drivers/edac/edac_mc.h index c41986a9ed5b..713444cc4105 100644 --- a/drivers/edac/edac_mc.h +++ b/drivers/edac/edac_mc.h | |||
@@ -123,7 +123,9 @@ enum mem_type { | |||
123 | MEM_RDR, /* Registered single data rate SDRAM */ | 123 | MEM_RDR, /* Registered single data rate SDRAM */ |
124 | MEM_DDR, /* Double data rate SDRAM */ | 124 | MEM_DDR, /* Double data rate SDRAM */ |
125 | MEM_RDDR, /* Registered Double data rate SDRAM */ | 125 | MEM_RDDR, /* Registered Double data rate SDRAM */ |
126 | MEM_RMBS /* Rambus DRAM */ | 126 | MEM_RMBS, /* Rambus DRAM */ |
127 | MEM_DDR2, /* DDR2 RAM */ | ||
128 | MEM_FB_DDR2, /* fully buffered DDR2 */ | ||
127 | }; | 129 | }; |
128 | 130 | ||
129 | #define MEM_FLAG_EMPTY BIT(MEM_EMPTY) | 131 | #define MEM_FLAG_EMPTY BIT(MEM_EMPTY) |
@@ -137,6 +139,8 @@ enum mem_type { | |||
137 | #define MEM_FLAG_DDR BIT(MEM_DDR) | 139 | #define MEM_FLAG_DDR BIT(MEM_DDR) |
138 | #define MEM_FLAG_RDDR BIT(MEM_RDDR) | 140 | #define MEM_FLAG_RDDR BIT(MEM_RDDR) |
139 | #define MEM_FLAG_RMBS BIT(MEM_RMBS) | 141 | #define MEM_FLAG_RMBS BIT(MEM_RMBS) |
142 | #define MEM_FLAG_DDR2 BIT(MEM_DDR2) | ||
143 | #define MEM_FLAG_FB_DDR2 BIT(MEM_FB_DDR2) | ||
140 | 144 | ||
141 | /* chipset Error Detection and Correction capabilities and mode */ | 145 | /* chipset Error Detection and Correction capabilities and mode */ |
142 | enum edac_type { | 146 | enum edac_type { |
@@ -329,6 +333,7 @@ struct mem_ctl_info { | |||
329 | 333 | ||
330 | /* pointer to edac checking routine */ | 334 | /* pointer to edac checking routine */ |
331 | void (*edac_check) (struct mem_ctl_info * mci); | 335 | void (*edac_check) (struct mem_ctl_info * mci); |
336 | |||
332 | /* | 337 | /* |
333 | * Remaps memory pages: controller pages to physical pages. | 338 | * Remaps memory pages: controller pages to physical pages. |
334 | * For most MC's, this will be NULL. | 339 | * For most MC's, this will be NULL. |
@@ -453,6 +458,15 @@ extern void edac_mc_handle_ue(struct mem_ctl_info *mci, | |||
453 | int row, const char *msg); | 458 | int row, const char *msg); |
454 | extern void edac_mc_handle_ue_no_info(struct mem_ctl_info *mci, | 459 | extern void edac_mc_handle_ue_no_info(struct mem_ctl_info *mci, |
455 | const char *msg); | 460 | const char *msg); |
461 | extern void edac_mc_handle_fbd_ue(struct mem_ctl_info *mci, | ||
462 | unsigned int csrow, | ||
463 | unsigned int channel0, | ||
464 | unsigned int channel1, | ||
465 | char *msg); | ||
466 | extern void edac_mc_handle_fbd_ce(struct mem_ctl_info *mci, | ||
467 | unsigned int csrow, | ||
468 | unsigned int channel, | ||
469 | char *msg); | ||
456 | 470 | ||
457 | /* | 471 | /* |
458 | * This kmalloc's and initializes all the structures. | 472 | * This kmalloc's and initializes all the structures. |