diff options
author | Mauro Carvalho Chehab <mchehab@redhat.com> | 2012-04-24 14:05:43 -0400 |
---|---|---|
committer | Mauro Carvalho Chehab <mchehab@redhat.com> | 2012-06-11 12:23:45 -0400 |
commit | de3910eb79ac8c0f29a11224661c0ebaaf813039 (patch) | |
tree | 44584d6691588b2c18823260be0e44f0c9872d02 /drivers/edac/cell_edac.c | |
parent | e39f4ea9b01f137f9e6fa631f3e9088fb9175e91 (diff) |
edac: change the mem allocation scheme to make Documentation/kobject.txt happy
Kernel kobjects have rigid rules: each container object should be
dynamically allocated, and can't be allocated into a single kmalloc.
EDAC never obeyed this rule: it has a single malloc function that
allocates all needed data into a single kzalloc.
As this is not accepted anymore, change the allocation schema of the
EDAC *_info structs to enforce this Kernel standard.
Acked-by: Chris Metcalf <cmetcalf@tilera.com>
Cc: Aristeu Rozanski <arozansk@redhat.com>
Cc: Doug Thompson <norsk5@yahoo.com>
Cc: Greg K H <gregkh@linuxfoundation.org>
Cc: Borislav Petkov <borislav.petkov@amd.com>
Cc: Mark Gross <mark.gross@intel.com>
Cc: Tim Small <tim@buttersideup.com>
Cc: Ranganathan Desikan <ravi@jetztechnologies.com>
Cc: "Arvind R." <arvino55@gmail.com>
Cc: Olof Johansson <olof@lixom.net>
Cc: Egor Martovetsky <egor@pasemi.com>
Cc: Michal Marek <mmarek@suse.cz>
Cc: Jiri Kosina <jkosina@suse.cz>
Cc: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Hitoshi Mitake <h.mitake@gmail.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Shaohui Xie <Shaohui.Xie@freescale.com>
Cc: linuxppc-dev@lists.ozlabs.org
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'drivers/edac/cell_edac.c')
-rw-r--r-- | drivers/edac/cell_edac.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/edac/cell_edac.c b/drivers/edac/cell_edac.c index 2e5b95374dc6..478d8ee434df 100644 --- a/drivers/edac/cell_edac.c +++ b/drivers/edac/cell_edac.c | |||
@@ -33,7 +33,7 @@ struct cell_edac_priv | |||
33 | static void cell_edac_count_ce(struct mem_ctl_info *mci, int chan, u64 ar) | 33 | static void cell_edac_count_ce(struct mem_ctl_info *mci, int chan, u64 ar) |
34 | { | 34 | { |
35 | struct cell_edac_priv *priv = mci->pvt_info; | 35 | struct cell_edac_priv *priv = mci->pvt_info; |
36 | struct csrow_info *csrow = &mci->csrows[0]; | 36 | struct csrow_info *csrow = mci->csrows[0]; |
37 | unsigned long address, pfn, offset, syndrome; | 37 | unsigned long address, pfn, offset, syndrome; |
38 | 38 | ||
39 | dev_dbg(mci->pdev, "ECC CE err on node %d, channel %d, ar = 0x%016llx\n", | 39 | dev_dbg(mci->pdev, "ECC CE err on node %d, channel %d, ar = 0x%016llx\n", |
@@ -56,7 +56,7 @@ static void cell_edac_count_ce(struct mem_ctl_info *mci, int chan, u64 ar) | |||
56 | static void cell_edac_count_ue(struct mem_ctl_info *mci, int chan, u64 ar) | 56 | static void cell_edac_count_ue(struct mem_ctl_info *mci, int chan, u64 ar) |
57 | { | 57 | { |
58 | struct cell_edac_priv *priv = mci->pvt_info; | 58 | struct cell_edac_priv *priv = mci->pvt_info; |
59 | struct csrow_info *csrow = &mci->csrows[0]; | 59 | struct csrow_info *csrow = mci->csrows[0]; |
60 | unsigned long address, pfn, offset; | 60 | unsigned long address, pfn, offset; |
61 | 61 | ||
62 | dev_dbg(mci->pdev, "ECC UE err on node %d, channel %d, ar = 0x%016llx\n", | 62 | dev_dbg(mci->pdev, "ECC UE err on node %d, channel %d, ar = 0x%016llx\n", |
@@ -126,7 +126,7 @@ static void cell_edac_check(struct mem_ctl_info *mci) | |||
126 | 126 | ||
127 | static void __devinit cell_edac_init_csrows(struct mem_ctl_info *mci) | 127 | static void __devinit cell_edac_init_csrows(struct mem_ctl_info *mci) |
128 | { | 128 | { |
129 | struct csrow_info *csrow = &mci->csrows[0]; | 129 | struct csrow_info *csrow = mci->csrows[0]; |
130 | struct dimm_info *dimm; | 130 | struct dimm_info *dimm; |
131 | struct cell_edac_priv *priv = mci->pvt_info; | 131 | struct cell_edac_priv *priv = mci->pvt_info; |
132 | struct device_node *np; | 132 | struct device_node *np; |
@@ -150,7 +150,7 @@ static void __devinit cell_edac_init_csrows(struct mem_ctl_info *mci) | |||
150 | csrow->last_page = csrow->first_page + nr_pages - 1; | 150 | csrow->last_page = csrow->first_page + nr_pages - 1; |
151 | 151 | ||
152 | for (j = 0; j < csrow->nr_channels; j++) { | 152 | for (j = 0; j < csrow->nr_channels; j++) { |
153 | dimm = csrow->channels[j].dimm; | 153 | dimm = csrow->channels[j]->dimm; |
154 | dimm->mtype = MEM_XDR; | 154 | dimm->mtype = MEM_XDR; |
155 | dimm->edac_mode = EDAC_SECDED; | 155 | dimm->edac_mode = EDAC_SECDED; |
156 | dimm->nr_pages = nr_pages / csrow->nr_channels; | 156 | dimm->nr_pages = nr_pages / csrow->nr_channels; |