[PATCH] EDAC: probe1 cleanup 1-of-2

- Add lower-level functions that handle various parts of the initialization
  done by the xxx_probe1() functions.  Some of the xxx_probe1() functions are
  much too long and complicated (see "Chapter 5: Functions" in
  Documentation/CodingStyle).

- Cleanup of probe1() functions in EDAC

Signed-off-by: Doug Thompson <norsk5@xmission.com>
Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

1 files changed, 38 insertions, 36 deletions

diff --git a/drivers/edac/amd76x_edac.c b/drivers/edac/amd76x_edac.c
index 303cb500b377..702141c5501b 100644
--- a/drivers/edac/amd76x_edac.c
+++ b/drivers/edac/amd76x_edac.c
@@ -182,6 +182,38 @@ static void amd76x_check(struct mem_ctl_info *mci)
         amd76x_process_error_info(mci, &info, 1);
 }
 
+static void amd76x_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev,
+                enum edac_type edac_mode)
+{
+        struct csrow_info *csrow;
+        u32 mba, mba_base, mba_mask, dms;
+        int index;
+
+        for (index = 0; index < mci->nr_csrows; index++) {
+                csrow = &mci->csrows[index];
+
+                /* find the DRAM Chip Select Base address and mask */
+                pci_read_config_dword(pdev,
+                                      AMD76X_MEM_BASE_ADDR + (index * 4),
+                                      &mba);
+
+                if (!(mba & BIT(0)))
+                        continue;
+
+                mba_base = mba & 0xff800000UL;
+                mba_mask = ((mba & 0xff80) << 16) | 0x7fffffUL;
+                pci_read_config_dword(pdev, AMD76X_DRAM_MODE_STATUS, &dms);
+                csrow->first_page = mba_base >> PAGE_SHIFT;
+                csrow->nr_pages = (mba_mask + 1) >> PAGE_SHIFT;
+                csrow->last_page = csrow->first_page + csrow->nr_pages - 1;
+                csrow->page_mask = mba_mask >> PAGE_SHIFT;
+                csrow->grain = csrow->nr_pages << PAGE_SHIFT;
+                csrow->mtype = MEM_RDDR;
+                csrow->dtype = ((dms >> index) & 0x1) ? DEV_X4 : DEV_UNKNOWN;
+                csrow->edac_mode = edac_mode;
+        }
+}
+
 /**
  *      amd76x_probe1   -       Perform set up for detected device
  *      @pdev; PCI device detected
@@ -193,15 +225,13 @@ static void amd76x_check(struct mem_ctl_info *mci)
  */
 static int amd76x_probe1(struct pci_dev *pdev, int dev_idx)
 {
-        int rc = -ENODEV;
-        int index;
-        struct mem_ctl_info *mci = NULL;
-        enum edac_type ems_modes[] = {
+        static const enum edac_type ems_modes[] = {
                 EDAC_NONE,
                 EDAC_EC,
                 EDAC_SECDED,
                 EDAC_SECDED
         };
+        struct mem_ctl_info *mci = NULL;
         u32 ems;
         u32 ems_mode;
         struct amd76x_error_info discard;
@@ -212,8 +242,7 @@ static int amd76x_probe1(struct pci_dev *pdev, int dev_idx)
         mci = edac_mc_alloc(0, AMD76X_NR_CSROWS, AMD76X_NR_CHANS);
 
         if (mci == NULL) {
-                rc = -ENOMEM;
-                goto fail;
+                return -ENOMEM;
         }
 
         debugf0("%s(): mci = %p\n", __func__, mci);
@@ -228,33 +257,7 @@ static int amd76x_probe1(struct pci_dev *pdev, int dev_idx)
         mci->edac_check = amd76x_check;
         mci->ctl_page_to_phys = NULL;
 
-        for (index = 0; index < mci->nr_csrows; index++) {
-                struct csrow_info *csrow = &mci->csrows[index];
-                u32 mba;
-                u32 mba_base;
-                u32 mba_mask;
-                u32 dms;
-
-                /* find the DRAM Chip Select Base address and mask */
-                pci_read_config_dword(pdev,
-                                AMD76X_MEM_BASE_ADDR + (index * 4), &mba);
-
-                if (!(mba & BIT(0)))
-                        continue;
-
-                mba_base = mba & 0xff800000UL;
-                mba_mask = ((mba & 0xff80) << 16) | 0x7fffffUL;
-                pci_read_config_dword(pdev, AMD76X_DRAM_MODE_STATUS, &dms);
-                csrow->first_page = mba_base >> PAGE_SHIFT;
-                csrow->nr_pages = (mba_mask + 1) >> PAGE_SHIFT;
-                csrow->last_page = csrow->first_page + csrow->nr_pages - 1;
-                csrow->page_mask = mba_mask >> PAGE_SHIFT;
-                csrow->grain = csrow->nr_pages << PAGE_SHIFT;
-                csrow->mtype = MEM_RDDR;
-                csrow->dtype = ((dms >> index) & 0x1) ? DEV_X4 : DEV_UNKNOWN;
-                csrow->edac_mode = ems_modes[ems_mode];
-        }
-
+        amd76x_init_csrows(mci, pdev, ems_modes[ems_mode]);
         amd76x_get_error_info(mci, &discard);  /* clear counters */
 
         /* Here we assume that we will never see multiple instances of this
@@ -270,9 +273,8 @@ static int amd76x_probe1(struct pci_dev *pdev, int dev_idx)
         return 0;
 
 fail:
-        if (mci != NULL)
-                edac_mc_free(mci);
-        return rc;
+        edac_mc_free(mci);
+        return -ENODEV;
 }
 
 /* returns count (>= 0), or negative on error */