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authorMauro Carvalho Chehab <mchehab@redhat.com>2012-03-21 13:00:44 -0400
committerMauro Carvalho Chehab <mchehab@redhat.com>2012-06-11 12:23:40 -0400
commitc56087595fb6531f359925b581529f1b2aef10f1 (patch)
tree6077edee64747d06759378ba634a738b401657d1 /drivers/edac/amd64_edac_dbg.c
parentba004239e008a442bc327a57e227600fc1bd5ee7 (diff)
amd64_edac: convert sysfs logic to use struct device
Now that the EDAC core supports struct device, there's no sense on having any logic at the EDAC core to simulate it. So, instead of adding such logic there, change the logic at amd64_edac to use it. Reviewed-by: Aristeu Rozanski <arozansk@redhat.com> Cc: Doug Thompson <norsk5@yahoo.com> Cc: Borislav Petkov <borislav.petkov@amd.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'drivers/edac/amd64_edac_dbg.c')
-rw-r--r--drivers/edac/amd64_edac_dbg.c89
1 files changed, 45 insertions, 44 deletions
diff --git a/drivers/edac/amd64_edac_dbg.c b/drivers/edac/amd64_edac_dbg.c
index e3562288f4ce..2c1bbf740605 100644
--- a/drivers/edac/amd64_edac_dbg.c
+++ b/drivers/edac/amd64_edac_dbg.c
@@ -1,8 +1,11 @@
1#include "amd64_edac.h" 1#include "amd64_edac.h"
2 2
3#define EDAC_DCT_ATTR_SHOW(reg) \ 3#define EDAC_DCT_ATTR_SHOW(reg) \
4static ssize_t amd64_##reg##_show(struct mem_ctl_info *mci, char *data) \ 4static ssize_t amd64_##reg##_show(struct device *dev, \
5 struct device_attribute *mattr, \
6 char *data) \
5{ \ 7{ \
8 struct mem_ctl_info *mci = to_mci(dev); \
6 struct amd64_pvt *pvt = mci->pvt_info; \ 9 struct amd64_pvt *pvt = mci->pvt_info; \
7 return sprintf(data, "0x%016llx\n", (u64)pvt->reg); \ 10 return sprintf(data, "0x%016llx\n", (u64)pvt->reg); \
8} 11}
@@ -12,8 +15,12 @@ EDAC_DCT_ATTR_SHOW(dbam0);
12EDAC_DCT_ATTR_SHOW(top_mem); 15EDAC_DCT_ATTR_SHOW(top_mem);
13EDAC_DCT_ATTR_SHOW(top_mem2); 16EDAC_DCT_ATTR_SHOW(top_mem2);
14 17
15static ssize_t amd64_hole_show(struct mem_ctl_info *mci, char *data) 18static ssize_t amd64_hole_show(struct device *dev,
19 struct device_attribute *mattr,
20 char *data)
16{ 21{
22 struct mem_ctl_info *mci = to_mci(dev);
23
17 u64 hole_base = 0; 24 u64 hole_base = 0;
18 u64 hole_offset = 0; 25 u64 hole_offset = 0;
19 u64 hole_size = 0; 26 u64 hole_size = 0;
@@ -27,46 +34,40 @@ static ssize_t amd64_hole_show(struct mem_ctl_info *mci, char *data)
27/* 34/*
28 * update NUM_DBG_ATTRS in case you add new members 35 * update NUM_DBG_ATTRS in case you add new members
29 */ 36 */
30struct mcidev_sysfs_attribute amd64_dbg_attrs[] = { 37static DEVICE_ATTR(dhar, S_IRUGO, amd64_dhar_show, NULL);
38static DEVICE_ATTR(dbam, S_IRUGO, amd64_dbam0_show, NULL);
39static DEVICE_ATTR(topmem, S_IRUGO, amd64_top_mem_show, NULL);
40static DEVICE_ATTR(topmem2, S_IRUGO, amd64_top_mem2_show, NULL);
41static DEVICE_ATTR(dram_hole, S_IRUGO, amd64_hole_show, NULL);
42
43int amd64_create_sysfs_dbg_files(struct mem_ctl_info *mci)
44{
45 int rc;
46
47 rc = device_create_file(&mci->dev, &dev_attr_dhar);
48 if (rc < 0)
49 return rc;
50 rc = device_create_file(&mci->dev, &dev_attr_dbam);
51 if (rc < 0)
52 return rc;
53 rc = device_create_file(&mci->dev, &dev_attr_topmem);
54 if (rc < 0)
55 return rc;
56 rc = device_create_file(&mci->dev, &dev_attr_topmem2);
57 if (rc < 0)
58 return rc;
59 rc = device_create_file(&mci->dev, &dev_attr_dram_hole);
60 if (rc < 0)
61 return rc;
31 62
32 { 63 return 0;
33 .attr = { 64}
34 .name = "dhar", 65
35 .mode = (S_IRUGO) 66void amd64_remove_sysfs_dbg_files(struct mem_ctl_info *mci)
36 }, 67{
37 .show = amd64_dhar_show, 68 device_remove_file(&mci->dev, &dev_attr_dhar);
38 .store = NULL, 69 device_remove_file(&mci->dev, &dev_attr_dbam);
39 }, 70 device_remove_file(&mci->dev, &dev_attr_topmem);
40 { 71 device_remove_file(&mci->dev, &dev_attr_topmem2);
41 .attr = { 72 device_remove_file(&mci->dev, &dev_attr_dram_hole);
42 .name = "dbam", 73}
43 .mode = (S_IRUGO)
44 },
45 .show = amd64_dbam0_show,
46 .store = NULL,
47 },
48 {
49 .attr = {
50 .name = "topmem",
51 .mode = (S_IRUGO)
52 },
53 .show = amd64_top_mem_show,
54 .store = NULL,
55 },
56 {
57 .attr = {
58 .name = "topmem2",
59 .mode = (S_IRUGO)
60 },
61 .show = amd64_top_mem2_show,
62 .store = NULL,
63 },
64 {
65 .attr = {
66 .name = "dram_hole",
67 .mode = (S_IRUGO)
68 },
69 .show = amd64_hole_show,
70 .store = NULL,
71 },
72};