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authorBorislav Petkov <borislav.petkov@amd.com>2009-07-24 07:51:42 -0400
committerBorislav Petkov <borislav.petkov@amd.com>2009-09-14 12:59:17 -0400
commit549d042df240dfb4203bab40ad44f9336751b7d6 (patch)
treeaf357ed8eaf06c26f19d458686b6c7ea4e425a05 /drivers/edac/amd64_edac.h
parentecaf5606de65cdd04de5f526185fe28fb0df654e (diff)
x86, mce: pass mce info to EDAC for decoding
Move NB decoder along with required defines to EDAC MCE core. Add registration routines for further decoding of the MCE info in the AMD64 EDAC module. CC: Andi Kleen <andi@firstfloor.org> Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
Diffstat (limited to 'drivers/edac/amd64_edac.h')
-rw-r--r--drivers/edac/amd64_edac.h36
1 files changed, 0 insertions, 36 deletions
diff --git a/drivers/edac/amd64_edac.h b/drivers/edac/amd64_edac.h
index ecab0c9fd14e..8ea07e2715dc 100644
--- a/drivers/edac/amd64_edac.h
+++ b/drivers/edac/amd64_edac.h
@@ -346,24 +346,8 @@ enum {
346#define K8_NBSL_PP_OBS 0x2 346#define K8_NBSL_PP_OBS 0x2
347#define K8_NBSL_PP_GENERIC 0x3 347#define K8_NBSL_PP_GENERIC 0x3
348 348
349
350#define K8_NBSH 0x4C
351
352#define K8_NBSH_VALID_BIT BIT(31)
353#define K8_NBSH_OVERFLOW BIT(30)
354#define K8_NBSH_UC_ERR BIT(29)
355#define K8_NBSH_ERR_EN BIT(28)
356#define K8_NBSH_MISCV BIT(27)
357#define K8_NBSH_VALID_ERROR_ADDR BIT(26)
358#define K8_NBSH_PCC BIT(25)
359#define K8_NBSH_ERR_CPU_VAL BIT(24)
360#define K8_NBSH_CECC BIT(14)
361#define K8_NBSH_UECC BIT(13)
362#define K8_NBSH_ERR_SCRUBER BIT(8)
363
364#define EXTRACT_ERR_CPU_MAP(x) ((x) & 0xF) 349#define EXTRACT_ERR_CPU_MAP(x) ((x) & 0xF)
365 350
366
367#define K8_NBEAL 0x50 351#define K8_NBEAL 0x50
368#define K8_NBEAH 0x54 352#define K8_NBEAH 0x54
369#define K8_SCRCTRL 0x58 353#define K8_SCRCTRL 0x58
@@ -428,23 +412,6 @@ enum amd64_chipset_families {
428 F11_CPUS, 412 F11_CPUS,
429}; 413};
430 414
431/*
432 * Structure to hold:
433 *
434 * 1) dynamically read status and error address HW registers
435 * 2) sysfs entered values
436 * 3) MCE values
437 *
438 * Depends on entry into the modules
439 */
440struct err_regs {
441 u32 nbcfg;
442 u32 nbsh;
443 u32 nbsl;
444 u32 nbeah;
445 u32 nbeal;
446};
447
448/* Error injection control structure */ 415/* Error injection control structure */
449struct error_injection { 416struct error_injection {
450 u32 section; 417 u32 section;
@@ -610,8 +577,5 @@ static inline struct low_ops *family_ops(int index)
610#define F10_MIN_SCRUB_RATE_BITS 0x5 577#define F10_MIN_SCRUB_RATE_BITS 0x5
611#define F11_MIN_SCRUB_RATE_BITS 0x6 578#define F11_MIN_SCRUB_RATE_BITS 0x6
612 579
613void amd64_decode_nb_mce(struct mem_ctl_info *mci, struct err_regs *info,
614 int handle_errors);
615
616int amd64_get_dram_hole_info(struct mem_ctl_info *mci, u64 *hole_base, 580int amd64_get_dram_hole_info(struct mem_ctl_info *mci, u64 *hole_base,
617 u64 *hole_offset, u64 *hole_size); 581 u64 *hole_offset, u64 *hole_size);