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authorBorislav Petkov <bp@suse.de>2013-07-23 14:01:23 -0400
committerBorislav Petkov <bp@suse.de>2013-07-29 11:22:41 -0400
commitf0a56c480196a98479760862468cc95879df3de0 (patch)
tree0702dbc1a848f8d30cc57a7af052ff1e9e70feb9 /drivers/edac/amd64_edac.c
parentc542b53da9ffa4fe9de61149818a06aacae531f8 (diff)
amd64_edac: Fix single-channel setups
It can happen that configurations are running in a single-channel mode even with a dual-channel memory controller, by, say, putting the DIMMs only on the one channel and leaving the other empty. This causes a problem in init_csrows which implicitly assumes that when the second channel is enabled, i.e. channel 1, the struct dimm hierarchy will be present. Which is not. So always allocate two channels unconditionally. This provides for the nice side effect that the data structures are initialized so some day, when memory hotplug is supported, it should just work out of the box when all of a sudden a second channel appears. Reported-and-tested-by: Roger Leigh <rleigh@debian.org> Signed-off-by: Borislav Petkov <bp@suse.de>
Diffstat (limited to 'drivers/edac/amd64_edac.c')
-rw-r--r--drivers/edac/amd64_edac.c9
1 files changed, 8 insertions, 1 deletions
diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
index 8b6a0343c220..8b3d90143514 100644
--- a/drivers/edac/amd64_edac.c
+++ b/drivers/edac/amd64_edac.c
@@ -2470,8 +2470,15 @@ static int amd64_init_one_instance(struct pci_dev *F2)
2470 layers[0].size = pvt->csels[0].b_cnt; 2470 layers[0].size = pvt->csels[0].b_cnt;
2471 layers[0].is_virt_csrow = true; 2471 layers[0].is_virt_csrow = true;
2472 layers[1].type = EDAC_MC_LAYER_CHANNEL; 2472 layers[1].type = EDAC_MC_LAYER_CHANNEL;
2473 layers[1].size = pvt->channel_count; 2473
2474 /*
2475 * Always allocate two channels since we can have setups with DIMMs on
2476 * only one channel. Also, this simplifies handling later for the price
2477 * of a couple of KBs tops.
2478 */
2479 layers[1].size = 2;
2474 layers[1].is_virt_csrow = false; 2480 layers[1].is_virt_csrow = false;
2481
2475 mci = edac_mc_alloc(nid, ARRAY_SIZE(layers), layers, 0); 2482 mci = edac_mc_alloc(nid, ARRAY_SIZE(layers), layers, 0);
2476 if (!mci) 2483 if (!mci)
2477 goto err_siblings; 2484 goto err_siblings;