diff options
author | Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com> | 2014-02-20 11:28:46 -0500 |
---|---|---|
committer | Borislav Petkov <bp@suse.de> | 2014-02-27 12:03:16 -0500 |
commit | 85a8885bd0e00569108aa7b5e26b89c752e3cd51 (patch) | |
tree | 533aa7cdaad11096771f5f89c82fc75cec0e9787 /drivers/edac/amd64_edac.c | |
parent | f118920baf5994dfa8a5a66322892731480a8207 (diff) |
amd64_edac: Add support for newer F16h models
Extend ECC decoding support for F16h M30h. Tested on F16h M30h with ECC
turned on using mce_amd_inj module and the patch works fine.
Signed-off-by: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com>
Link: http://lkml.kernel.org/r/1392913726-16961-1-git-send-email-Aravind.Gopalakrishnan@amd.com
Tested-by: Arindam Nath <Arindam.Nath@amd.com>
Acked-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Diffstat (limited to 'drivers/edac/amd64_edac.c')
-rw-r--r-- | drivers/edac/amd64_edac.c | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c index 34380ccc3dd9..f8bf00010d45 100644 --- a/drivers/edac/amd64_edac.c +++ b/drivers/edac/amd64_edac.c | |||
@@ -1807,6 +1807,17 @@ static struct amd64_family_type family_types[] = { | |||
1807 | .read_dct_pci_cfg = f10_read_dct_pci_cfg, | 1807 | .read_dct_pci_cfg = f10_read_dct_pci_cfg, |
1808 | } | 1808 | } |
1809 | }, | 1809 | }, |
1810 | [F16_M30H_CPUS] = { | ||
1811 | .ctl_name = "F16h_M30h", | ||
1812 | .f1_id = PCI_DEVICE_ID_AMD_16H_M30H_NB_F1, | ||
1813 | .f3_id = PCI_DEVICE_ID_AMD_16H_M30H_NB_F3, | ||
1814 | .ops = { | ||
1815 | .early_channel_count = f1x_early_channel_count, | ||
1816 | .map_sysaddr_to_csrow = f1x_map_sysaddr_to_csrow, | ||
1817 | .dbam_to_cs = f16_dbam_to_chip_select, | ||
1818 | .read_dct_pci_cfg = f10_read_dct_pci_cfg, | ||
1819 | } | ||
1820 | }, | ||
1810 | }; | 1821 | }; |
1811 | 1822 | ||
1812 | /* | 1823 | /* |
@@ -2586,6 +2597,11 @@ static struct amd64_family_type *per_family_init(struct amd64_pvt *pvt) | |||
2586 | break; | 2597 | break; |
2587 | 2598 | ||
2588 | case 0x16: | 2599 | case 0x16: |
2600 | if (pvt->model == 0x30) { | ||
2601 | fam_type = &family_types[F16_M30H_CPUS]; | ||
2602 | pvt->ops = &family_types[F16_M30H_CPUS].ops; | ||
2603 | break; | ||
2604 | } | ||
2589 | fam_type = &family_types[F16_CPUS]; | 2605 | fam_type = &family_types[F16_CPUS]; |
2590 | pvt->ops = &family_types[F16_CPUS].ops; | 2606 | pvt->ops = &family_types[F16_CPUS].ops; |
2591 | break; | 2607 | break; |
@@ -2838,6 +2854,14 @@ static const struct pci_device_id amd64_pci_table[] = { | |||
2838 | .class = 0, | 2854 | .class = 0, |
2839 | .class_mask = 0, | 2855 | .class_mask = 0, |
2840 | }, | 2856 | }, |
2857 | { | ||
2858 | .vendor = PCI_VENDOR_ID_AMD, | ||
2859 | .device = PCI_DEVICE_ID_AMD_16H_M30H_NB_F2, | ||
2860 | .subvendor = PCI_ANY_ID, | ||
2861 | .subdevice = PCI_ANY_ID, | ||
2862 | .class = 0, | ||
2863 | .class_mask = 0, | ||
2864 | }, | ||
2841 | 2865 | ||
2842 | {0, } | 2866 | {0, } |
2843 | }; | 2867 | }; |