aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/edac/amd64_edac.c
diff options
context:
space:
mode:
authorBorislav Petkov <borislav.petkov@amd.com>2011-01-11 16:08:07 -0500
committerBorislav Petkov <borislav.petkov@amd.com>2011-03-17 09:46:20 -0400
commit95b0ef55cd8a8278b64c7ba98c29cda5f4e4b617 (patch)
tree95bb1fb585fe4a410d4f7065fa72f3c6b38b0956 /drivers/edac/amd64_edac.c
parent700466249f9bb787165da64d2615cee456d88751 (diff)
amd64_edac: Add support for interleaved region swapping
On revC3 and revE Fam10h machines and later, non-interleaved graphics framebuffer memory under the 16G mark can be swapped with a region located at the bottom of memory so that the GPU can use the interleaved region and thus two channels. Add support for that. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
Diffstat (limited to 'drivers/edac/amd64_edac.c')
-rw-r--r--drivers/edac/amd64_edac.c38
1 files changed, 38 insertions, 0 deletions
diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
index 7a7bd7785ed4..9ea1bb4a51e3 100644
--- a/drivers/edac/amd64_edac.c
+++ b/drivers/edac/amd64_edac.c
@@ -1331,6 +1331,42 @@ static int f10_lookup_addr_in_dct(u64 in_addr, u32 nid, u8 dct)
1331 return cs_found; 1331 return cs_found;
1332} 1332}
1333 1333
1334/*
1335 * See F2x10C. Non-interleaved graphics framebuffer memory under the 16G is
1336 * swapped with a region located at the bottom of memory so that the GPU can use
1337 * the interleaved region and thus two channels.
1338 */
1339static u64 f10_swap_interleaved_region(struct amd64_pvt *pvt, u64 sys_addr)
1340{
1341 u32 swap_reg, swap_base, swap_limit, rgn_size, tmp_addr;
1342
1343 if (boot_cpu_data.x86 == 0x10) {
1344 /* only revC3 and revE have that feature */
1345 if (boot_cpu_data.x86_model < 4 ||
1346 (boot_cpu_data.x86_model < 0xa &&
1347 boot_cpu_data.x86_mask < 3))
1348 return sys_addr;
1349 }
1350
1351 amd64_read_dct_pci_cfg(pvt, SWAP_INTLV_REG, &swap_reg);
1352
1353 if (!(swap_reg & 0x1))
1354 return sys_addr;
1355
1356 swap_base = (swap_reg >> 3) & 0x7f;
1357 swap_limit = (swap_reg >> 11) & 0x7f;
1358 rgn_size = (swap_reg >> 20) & 0x7f;
1359 tmp_addr = sys_addr >> 27;
1360
1361 if (!(sys_addr >> 34) &&
1362 (((tmp_addr >= swap_base) &&
1363 (tmp_addr <= swap_limit)) ||
1364 (tmp_addr < rgn_size)))
1365 return sys_addr ^ (u64)swap_base << 27;
1366
1367 return sys_addr;
1368}
1369
1334/* For a given @dram_range, check if @sys_addr falls within it. */ 1370/* For a given @dram_range, check if @sys_addr falls within it. */
1335static int f10_match_to_this_node(struct amd64_pvt *pvt, int range, 1371static int f10_match_to_this_node(struct amd64_pvt *pvt, int range,
1336 u64 sys_addr, int *nid, int *chan_sel) 1372 u64 sys_addr, int *nid, int *chan_sel)
@@ -1352,6 +1388,8 @@ static int f10_match_to_this_node(struct amd64_pvt *pvt, int range,
1352 (intlv_sel != ((sys_addr >> 12) & intlv_en))) 1388 (intlv_sel != ((sys_addr >> 12) & intlv_en)))
1353 return -EINVAL; 1389 return -EINVAL;
1354 1390
1391 sys_addr = f10_swap_interleaved_region(pvt, sys_addr);
1392
1355 dct_sel_base = dct_sel_baseaddr(pvt); 1393 dct_sel_base = dct_sel_baseaddr(pvt);
1356 1394
1357 /* 1395 /*