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authorLinus Torvalds <torvalds@linux-foundation.org>2011-08-11 11:58:41 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2011-08-11 11:58:41 -0400
commita9f729f0e28bb4e4ab0d9e9e3c1675fe4b910f47 (patch)
treecfc565cffeb30ffccc1438b1bd88b9a372ed26c3 /drivers/edac/Kconfig
parent54a33b190aa5386dd214b4ad02986445e20e83d1 (diff)
Revert "EDAC: Correct Kconfig dependencies"
This reverts commit af9d220bac41dc3201893e1601cc7c44f7da4498. It turns out that one was meant to be applied on top of the edac.git tree in -next that has more i7core_edac changes, but that wasn't clear in the original email. Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Acked-by: Borislav Petkov <borislav.petkov@amd.com> Cc: Randy Dunlap <rdunlap@xenotime.net> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'drivers/edac/Kconfig')
-rw-r--r--drivers/edac/Kconfig5
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/edac/Kconfig b/drivers/edac/Kconfig
index c422fead0855..af1a17d42bd7 100644
--- a/drivers/edac/Kconfig
+++ b/drivers/edac/Kconfig
@@ -41,7 +41,7 @@ config EDAC_DEBUG
41 41
42config EDAC_DECODE_MCE 42config EDAC_DECODE_MCE
43 tristate "Decode MCEs in human-readable form (only on AMD for now)" 43 tristate "Decode MCEs in human-readable form (only on AMD for now)"
44 depends on CPU_SUP_AMD && X86_MCE_AMD 44 depends on CPU_SUP_AMD && X86_MCE
45 default y 45 default y
46 ---help--- 46 ---help---
47 Enable this option if you want to decode Machine Check Exceptions 47 Enable this option if you want to decode Machine Check Exceptions
@@ -173,7 +173,8 @@ config EDAC_I5400
173 173
174config EDAC_I7CORE 174config EDAC_I7CORE
175 tristate "Intel i7 Core (Nehalem) processors" 175 tristate "Intel i7 Core (Nehalem) processors"
176 depends on EDAC_MM_EDAC && PCI && X86 && X86_MCE_INTEL 176 depends on EDAC_MM_EDAC && PCI && X86
177 select EDAC_MCE
177 help 178 help
178 Support for error detection and correction the Intel 179 Support for error detection and correction the Intel
179 i7 Core (Nehalem) Integrated Memory Controller that exists on 180 i7 Core (Nehalem) Integrated Memory Controller that exists on