diff options
author | Lars-Peter Clausen <lars@metafoo.de> | 2014-07-06 14:32:29 -0400 |
---|---|---|
committer | Vinod Koul <vinod.koul@intel.com> | 2014-07-15 12:31:04 -0400 |
commit | f6f2421c0a1cb6caffc85b13ab8f9bdd8f8278c3 (patch) | |
tree | 9c818d0ef907a35192da7b5768061fe93b16a1d8 /drivers/dma | |
parent | fbbcd9be96a0295e9d127e124f72fa0039f53d8e (diff) |
dmaengine: pl330: Merge dma_pl330_dmac and pl330_dmac structs
Both the dma_pl330_dmac and the pl330_dmac struct have the same lifetime and the
separation of them is a relict of this having been two different drivers in the
past. Merging them into one struct makes the code a bit simpler as it for
example allows to remove the pointers going back and forth between the two
structs.
While we are at it also directly embed the pl330_info struct into the
pl330_dmac struct as this allows to remove some more redundant fields.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Diffstat (limited to 'drivers/dma')
-rw-r--r-- | drivers/dma/pl330.c | 472 |
1 files changed, 192 insertions, 280 deletions
diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c index c5eeb64dce6f..e5fe9c764f53 100644 --- a/drivers/dma/pl330.c +++ b/drivers/dma/pl330.c | |||
@@ -282,20 +282,6 @@ struct pl330_config { | |||
282 | u32 irq_ns; | 282 | u32 irq_ns; |
283 | }; | 283 | }; |
284 | 284 | ||
285 | /* Handle to the DMAC provided to the PL330 core */ | ||
286 | struct pl330_info { | ||
287 | /* Owning device */ | ||
288 | struct device *dev; | ||
289 | /* Size of MicroCode buffers for each channel. */ | ||
290 | unsigned mcbufsz; | ||
291 | /* ioremap'ed address of PL330 registers. */ | ||
292 | void __iomem *base; | ||
293 | /* PL330 core data, Client must not touch it. */ | ||
294 | void *pl330_data; | ||
295 | /* Populated by the PL330 core driver during pl330_add */ | ||
296 | struct pl330_config pcfg; | ||
297 | }; | ||
298 | |||
299 | /** | 285 | /** |
300 | * Request Configuration. | 286 | * Request Configuration. |
301 | * The PL330 core does not modify this and uses the last | 287 | * The PL330 core does not modify this and uses the last |
@@ -426,30 +412,6 @@ enum pl330_dmac_state { | |||
426 | DYING, | 412 | DYING, |
427 | }; | 413 | }; |
428 | 414 | ||
429 | /* A DMAC */ | ||
430 | struct pl330_dmac { | ||
431 | spinlock_t lock; | ||
432 | /* Holds list of reqs with due callbacks */ | ||
433 | struct list_head req_done; | ||
434 | /* Pointer to platform specific stuff */ | ||
435 | struct pl330_info *pinfo; | ||
436 | /* Maximum possible events/irqs */ | ||
437 | int events[32]; | ||
438 | /* BUS address of MicroCode buffer */ | ||
439 | dma_addr_t mcode_bus; | ||
440 | /* CPU address of MicroCode buffer */ | ||
441 | void *mcode_cpu; | ||
442 | /* List of all Channel threads */ | ||
443 | struct pl330_thread *channels; | ||
444 | /* Pointer to the MANAGER thread */ | ||
445 | struct pl330_thread *manager; | ||
446 | /* To handle bad news in interrupt */ | ||
447 | struct tasklet_struct tasks; | ||
448 | struct _pl330_tbd dmac_tbd; | ||
449 | /* State of DMAC operation */ | ||
450 | enum pl330_dmac_state state; | ||
451 | }; | ||
452 | |||
453 | enum desc_status { | 415 | enum desc_status { |
454 | /* In the DMAC pool */ | 416 | /* In the DMAC pool */ |
455 | FREE, | 417 | FREE, |
@@ -490,7 +452,7 @@ struct dma_pl330_chan { | |||
490 | * As the parent, this DMAC also provides descriptors | 452 | * As the parent, this DMAC also provides descriptors |
491 | * to the channel. | 453 | * to the channel. |
492 | */ | 454 | */ |
493 | struct dma_pl330_dmac *dmac; | 455 | struct pl330_dmac *dmac; |
494 | 456 | ||
495 | /* To protect channel manipulation */ | 457 | /* To protect channel manipulation */ |
496 | spinlock_t lock; | 458 | spinlock_t lock; |
@@ -510,9 +472,7 @@ struct dma_pl330_chan { | |||
510 | bool cyclic; | 472 | bool cyclic; |
511 | }; | 473 | }; |
512 | 474 | ||
513 | struct dma_pl330_dmac { | 475 | struct pl330_dmac { |
514 | struct pl330_info pif; | ||
515 | |||
516 | /* DMA-Engine Device */ | 476 | /* DMA-Engine Device */ |
517 | struct dma_device ddma; | 477 | struct dma_device ddma; |
518 | 478 | ||
@@ -524,6 +484,32 @@ struct dma_pl330_dmac { | |||
524 | /* To protect desc_pool manipulation */ | 484 | /* To protect desc_pool manipulation */ |
525 | spinlock_t pool_lock; | 485 | spinlock_t pool_lock; |
526 | 486 | ||
487 | /* Size of MicroCode buffers for each channel. */ | ||
488 | unsigned mcbufsz; | ||
489 | /* ioremap'ed address of PL330 registers. */ | ||
490 | void __iomem *base; | ||
491 | /* Populated by the PL330 core driver during pl330_add */ | ||
492 | struct pl330_config pcfg; | ||
493 | |||
494 | spinlock_t lock; | ||
495 | /* Maximum possible events/irqs */ | ||
496 | int events[32]; | ||
497 | /* BUS address of MicroCode buffer */ | ||
498 | dma_addr_t mcode_bus; | ||
499 | /* CPU address of MicroCode buffer */ | ||
500 | void *mcode_cpu; | ||
501 | /* List of all Channel threads */ | ||
502 | struct pl330_thread *channels; | ||
503 | /* Pointer to the MANAGER thread */ | ||
504 | struct pl330_thread *manager; | ||
505 | /* To handle bad news in interrupt */ | ||
506 | struct tasklet_struct tasks; | ||
507 | struct _pl330_tbd dmac_tbd; | ||
508 | /* State of DMAC operation */ | ||
509 | enum pl330_dmac_state state; | ||
510 | /* Holds list of reqs with due callbacks */ | ||
511 | struct list_head req_done; | ||
512 | |||
527 | /* Peripheral channels connected to this DMAC */ | 513 | /* Peripheral channels connected to this DMAC */ |
528 | unsigned int num_peripherals; | 514 | unsigned int num_peripherals; |
529 | struct dma_pl330_chan *peripherals; /* keep at end */ | 515 | struct dma_pl330_chan *peripherals; /* keep at end */ |
@@ -568,9 +554,7 @@ static inline bool is_manager(struct pl330_thread *thrd) | |||
568 | /* If manager of the thread is in Non-Secure mode */ | 554 | /* If manager of the thread is in Non-Secure mode */ |
569 | static inline bool _manager_ns(struct pl330_thread *thrd) | 555 | static inline bool _manager_ns(struct pl330_thread *thrd) |
570 | { | 556 | { |
571 | struct pl330_dmac *pl330 = thrd->dmac; | 557 | return (thrd->dmac->pcfg.mode & DMAC_MODE_NS) ? true : false; |
572 | |||
573 | return (pl330->pinfo->pcfg.mode & DMAC_MODE_NS) ? true : false; | ||
574 | } | 558 | } |
575 | 559 | ||
576 | static inline u32 get_revision(u32 periph_id) | 560 | static inline u32 get_revision(u32 periph_id) |
@@ -928,7 +912,7 @@ static inline u32 _emit_GO(unsigned dry_run, u8 buf[], | |||
928 | /* Returns Time-Out */ | 912 | /* Returns Time-Out */ |
929 | static bool _until_dmac_idle(struct pl330_thread *thrd) | 913 | static bool _until_dmac_idle(struct pl330_thread *thrd) |
930 | { | 914 | { |
931 | void __iomem *regs = thrd->dmac->pinfo->base; | 915 | void __iomem *regs = thrd->dmac->base; |
932 | unsigned long loops = msecs_to_loops(5); | 916 | unsigned long loops = msecs_to_loops(5); |
933 | 917 | ||
934 | do { | 918 | do { |
@@ -948,7 +932,7 @@ static bool _until_dmac_idle(struct pl330_thread *thrd) | |||
948 | static inline void _execute_DBGINSN(struct pl330_thread *thrd, | 932 | static inline void _execute_DBGINSN(struct pl330_thread *thrd, |
949 | u8 insn[], bool as_manager) | 933 | u8 insn[], bool as_manager) |
950 | { | 934 | { |
951 | void __iomem *regs = thrd->dmac->pinfo->base; | 935 | void __iomem *regs = thrd->dmac->base; |
952 | u32 val; | 936 | u32 val; |
953 | 937 | ||
954 | val = (insn[0] << 16) | (insn[1] << 24); | 938 | val = (insn[0] << 16) | (insn[1] << 24); |
@@ -963,7 +947,7 @@ static inline void _execute_DBGINSN(struct pl330_thread *thrd, | |||
963 | 947 | ||
964 | /* If timed out due to halted state-machine */ | 948 | /* If timed out due to halted state-machine */ |
965 | if (_until_dmac_idle(thrd)) { | 949 | if (_until_dmac_idle(thrd)) { |
966 | dev_err(thrd->dmac->pinfo->dev, "DMAC halted!\n"); | 950 | dev_err(thrd->dmac->ddma.dev, "DMAC halted!\n"); |
967 | return; | 951 | return; |
968 | } | 952 | } |
969 | 953 | ||
@@ -988,7 +972,7 @@ static void mark_free(struct pl330_thread *thrd, int idx) | |||
988 | 972 | ||
989 | static inline u32 _state(struct pl330_thread *thrd) | 973 | static inline u32 _state(struct pl330_thread *thrd) |
990 | { | 974 | { |
991 | void __iomem *regs = thrd->dmac->pinfo->base; | 975 | void __iomem *regs = thrd->dmac->base; |
992 | u32 val; | 976 | u32 val; |
993 | 977 | ||
994 | if (is_manager(thrd)) | 978 | if (is_manager(thrd)) |
@@ -1046,7 +1030,7 @@ static inline u32 _state(struct pl330_thread *thrd) | |||
1046 | 1030 | ||
1047 | static void _stop(struct pl330_thread *thrd) | 1031 | static void _stop(struct pl330_thread *thrd) |
1048 | { | 1032 | { |
1049 | void __iomem *regs = thrd->dmac->pinfo->base; | 1033 | void __iomem *regs = thrd->dmac->base; |
1050 | u8 insn[6] = {0, 0, 0, 0, 0, 0}; | 1034 | u8 insn[6] = {0, 0, 0, 0, 0, 0}; |
1051 | 1035 | ||
1052 | if (_state(thrd) == PL330_STATE_FAULT_COMPLETING) | 1036 | if (_state(thrd) == PL330_STATE_FAULT_COMPLETING) |
@@ -1069,7 +1053,7 @@ static void _stop(struct pl330_thread *thrd) | |||
1069 | /* Start doing req 'idx' of thread 'thrd' */ | 1053 | /* Start doing req 'idx' of thread 'thrd' */ |
1070 | static bool _trigger(struct pl330_thread *thrd) | 1054 | static bool _trigger(struct pl330_thread *thrd) |
1071 | { | 1055 | { |
1072 | void __iomem *regs = thrd->dmac->pinfo->base; | 1056 | void __iomem *regs = thrd->dmac->base; |
1073 | struct _pl330_req *req; | 1057 | struct _pl330_req *req; |
1074 | struct pl330_req *r; | 1058 | struct pl330_req *r; |
1075 | struct _arg_GO go; | 1059 | struct _arg_GO go; |
@@ -1107,7 +1091,7 @@ static bool _trigger(struct pl330_thread *thrd) | |||
1107 | 1091 | ||
1108 | /* See 'Abort Sources' point-4 at Page 2-25 */ | 1092 | /* See 'Abort Sources' point-4 at Page 2-25 */ |
1109 | if (_manager_ns(thrd) && !ns) | 1093 | if (_manager_ns(thrd) && !ns) |
1110 | dev_info(thrd->dmac->pinfo->dev, "%s:%d Recipe for ABORT!\n", | 1094 | dev_info(thrd->dmac->ddma.dev, "%s:%d Recipe for ABORT!\n", |
1111 | __func__, __LINE__); | 1095 | __func__, __LINE__); |
1112 | 1096 | ||
1113 | go.chan = thrd->id; | 1097 | go.chan = thrd->id; |
@@ -1421,8 +1405,7 @@ static inline u32 _prepare_ccr(const struct pl330_reqcfg *rqc) | |||
1421 | */ | 1405 | */ |
1422 | static int pl330_submit_req(struct pl330_thread *thrd, struct pl330_req *r) | 1406 | static int pl330_submit_req(struct pl330_thread *thrd, struct pl330_req *r) |
1423 | { | 1407 | { |
1424 | struct pl330_dmac *pl330; | 1408 | struct pl330_dmac *pl330 = thrd->dmac; |
1425 | struct pl330_info *pi; | ||
1426 | struct _xfer_spec xs; | 1409 | struct _xfer_spec xs; |
1427 | unsigned long flags; | 1410 | unsigned long flags; |
1428 | void __iomem *regs; | 1411 | void __iomem *regs; |
@@ -1434,20 +1417,18 @@ static int pl330_submit_req(struct pl330_thread *thrd, struct pl330_req *r) | |||
1434 | if (!r || !thrd || thrd->free) | 1417 | if (!r || !thrd || thrd->free) |
1435 | return -EINVAL; | 1418 | return -EINVAL; |
1436 | 1419 | ||
1437 | pl330 = thrd->dmac; | 1420 | regs = thrd->dmac->base; |
1438 | pi = pl330->pinfo; | ||
1439 | regs = pi->base; | ||
1440 | 1421 | ||
1441 | if (pl330->state == DYING | 1422 | if (pl330->state == DYING |
1442 | || pl330->dmac_tbd.reset_chan & (1 << thrd->id)) { | 1423 | || pl330->dmac_tbd.reset_chan & (1 << thrd->id)) { |
1443 | dev_info(thrd->dmac->pinfo->dev, "%s:%d\n", | 1424 | dev_info(thrd->dmac->ddma.dev, "%s:%d\n", |
1444 | __func__, __LINE__); | 1425 | __func__, __LINE__); |
1445 | return -EAGAIN; | 1426 | return -EAGAIN; |
1446 | } | 1427 | } |
1447 | 1428 | ||
1448 | /* If request for non-existing peripheral */ | 1429 | /* If request for non-existing peripheral */ |
1449 | if (r->rqtype != DMA_MEM_TO_MEM && r->peri >= pi->pcfg.num_peri) { | 1430 | if (r->rqtype != DMA_MEM_TO_MEM && r->peri >= pl330->pcfg.num_peri) { |
1450 | dev_info(thrd->dmac->pinfo->dev, | 1431 | dev_info(thrd->dmac->ddma.dev, |
1451 | "%s:%d Invalid peripheral(%u)!\n", | 1432 | "%s:%d Invalid peripheral(%u)!\n", |
1452 | __func__, __LINE__, r->peri); | 1433 | __func__, __LINE__, r->peri); |
1453 | return -EINVAL; | 1434 | return -EINVAL; |
@@ -1484,9 +1465,8 @@ static int pl330_submit_req(struct pl330_thread *thrd, struct pl330_req *r) | |||
1484 | if (ret < 0) | 1465 | if (ret < 0) |
1485 | goto xfer_exit; | 1466 | goto xfer_exit; |
1486 | 1467 | ||
1487 | if (ret > pi->mcbufsz / 2) { | 1468 | if (ret > pl330->mcbufsz / 2) { |
1488 | dev_info(thrd->dmac->pinfo->dev, | 1469 | dev_info(pl330->ddma.dev, "%s:%d Trying increasing mcbufsz\n", |
1489 | "%s:%d Trying increasing mcbufsz\n", | ||
1490 | __func__, __LINE__); | 1470 | __func__, __LINE__); |
1491 | ret = -ENOMEM; | 1471 | ret = -ENOMEM; |
1492 | goto xfer_exit; | 1472 | goto xfer_exit; |
@@ -1527,7 +1507,6 @@ static void dma_pl330_rqcb(struct pl330_req *req, enum pl330_op_err err) | |||
1527 | static void pl330_dotask(unsigned long data) | 1507 | static void pl330_dotask(unsigned long data) |
1528 | { | 1508 | { |
1529 | struct pl330_dmac *pl330 = (struct pl330_dmac *) data; | 1509 | struct pl330_dmac *pl330 = (struct pl330_dmac *) data; |
1530 | struct pl330_info *pi = pl330->pinfo; | ||
1531 | unsigned long flags; | 1510 | unsigned long flags; |
1532 | int i; | 1511 | int i; |
1533 | 1512 | ||
@@ -1545,16 +1524,16 @@ static void pl330_dotask(unsigned long data) | |||
1545 | if (pl330->dmac_tbd.reset_mngr) { | 1524 | if (pl330->dmac_tbd.reset_mngr) { |
1546 | _stop(pl330->manager); | 1525 | _stop(pl330->manager); |
1547 | /* Reset all channels */ | 1526 | /* Reset all channels */ |
1548 | pl330->dmac_tbd.reset_chan = (1 << pi->pcfg.num_chan) - 1; | 1527 | pl330->dmac_tbd.reset_chan = (1 << pl330->pcfg.num_chan) - 1; |
1549 | /* Clear the reset flag */ | 1528 | /* Clear the reset flag */ |
1550 | pl330->dmac_tbd.reset_mngr = false; | 1529 | pl330->dmac_tbd.reset_mngr = false; |
1551 | } | 1530 | } |
1552 | 1531 | ||
1553 | for (i = 0; i < pi->pcfg.num_chan; i++) { | 1532 | for (i = 0; i < pl330->pcfg.num_chan; i++) { |
1554 | 1533 | ||
1555 | if (pl330->dmac_tbd.reset_chan & (1 << i)) { | 1534 | if (pl330->dmac_tbd.reset_chan & (1 << i)) { |
1556 | struct pl330_thread *thrd = &pl330->channels[i]; | 1535 | struct pl330_thread *thrd = &pl330->channels[i]; |
1557 | void __iomem *regs = pi->base; | 1536 | void __iomem *regs = pl330->base; |
1558 | enum pl330_op_err err; | 1537 | enum pl330_op_err err; |
1559 | 1538 | ||
1560 | _stop(thrd); | 1539 | _stop(thrd); |
@@ -1585,20 +1564,15 @@ static void pl330_dotask(unsigned long data) | |||
1585 | } | 1564 | } |
1586 | 1565 | ||
1587 | /* Returns 1 if state was updated, 0 otherwise */ | 1566 | /* Returns 1 if state was updated, 0 otherwise */ |
1588 | static int pl330_update(const struct pl330_info *pi) | 1567 | static int pl330_update(struct pl330_dmac *pl330) |
1589 | { | 1568 | { |
1590 | struct pl330_req *rqdone, *tmp; | 1569 | struct pl330_req *rqdone, *tmp; |
1591 | struct pl330_dmac *pl330; | ||
1592 | unsigned long flags; | 1570 | unsigned long flags; |
1593 | void __iomem *regs; | 1571 | void __iomem *regs; |
1594 | u32 val; | 1572 | u32 val; |
1595 | int id, ev, ret = 0; | 1573 | int id, ev, ret = 0; |
1596 | 1574 | ||
1597 | if (!pi || !pi->pl330_data) | 1575 | regs = pl330->base; |
1598 | return 0; | ||
1599 | |||
1600 | regs = pi->base; | ||
1601 | pl330 = pi->pl330_data; | ||
1602 | 1576 | ||
1603 | spin_lock_irqsave(&pl330->lock, flags); | 1577 | spin_lock_irqsave(&pl330->lock, flags); |
1604 | 1578 | ||
@@ -1608,13 +1582,13 @@ static int pl330_update(const struct pl330_info *pi) | |||
1608 | else | 1582 | else |
1609 | pl330->dmac_tbd.reset_mngr = false; | 1583 | pl330->dmac_tbd.reset_mngr = false; |
1610 | 1584 | ||
1611 | val = readl(regs + FSC) & ((1 << pi->pcfg.num_chan) - 1); | 1585 | val = readl(regs + FSC) & ((1 << pl330->pcfg.num_chan) - 1); |
1612 | pl330->dmac_tbd.reset_chan |= val; | 1586 | pl330->dmac_tbd.reset_chan |= val; |
1613 | if (val) { | 1587 | if (val) { |
1614 | int i = 0; | 1588 | int i = 0; |
1615 | while (i < pi->pcfg.num_chan) { | 1589 | while (i < pl330->pcfg.num_chan) { |
1616 | if (val & (1 << i)) { | 1590 | if (val & (1 << i)) { |
1617 | dev_info(pi->dev, | 1591 | dev_info(pl330->ddma.dev, |
1618 | "Reset Channel-%d\t CS-%x FTC-%x\n", | 1592 | "Reset Channel-%d\t CS-%x FTC-%x\n", |
1619 | i, readl(regs + CS(i)), | 1593 | i, readl(regs + CS(i)), |
1620 | readl(regs + FTC(i))); | 1594 | readl(regs + FTC(i))); |
@@ -1626,15 +1600,16 @@ static int pl330_update(const struct pl330_info *pi) | |||
1626 | 1600 | ||
1627 | /* Check which event happened i.e, thread notified */ | 1601 | /* Check which event happened i.e, thread notified */ |
1628 | val = readl(regs + ES); | 1602 | val = readl(regs + ES); |
1629 | if (pi->pcfg.num_events < 32 | 1603 | if (pl330->pcfg.num_events < 32 |
1630 | && val & ~((1 << pi->pcfg.num_events) - 1)) { | 1604 | && val & ~((1 << pl330->pcfg.num_events) - 1)) { |
1631 | pl330->dmac_tbd.reset_dmac = true; | 1605 | pl330->dmac_tbd.reset_dmac = true; |
1632 | dev_err(pi->dev, "%s:%d Unexpected!\n", __func__, __LINE__); | 1606 | dev_err(pl330->ddma.dev, "%s:%d Unexpected!\n", __func__, |
1607 | __LINE__); | ||
1633 | ret = 1; | 1608 | ret = 1; |
1634 | goto updt_exit; | 1609 | goto updt_exit; |
1635 | } | 1610 | } |
1636 | 1611 | ||
1637 | for (ev = 0; ev < pi->pcfg.num_events; ev++) { | 1612 | for (ev = 0; ev < pl330->pcfg.num_events; ev++) { |
1638 | if (val & (1 << ev)) { /* Event occurred */ | 1613 | if (val & (1 << ev)) { /* Event occurred */ |
1639 | struct pl330_thread *thrd; | 1614 | struct pl330_thread *thrd; |
1640 | u32 inten = readl(regs + INTEN); | 1615 | u32 inten = readl(regs + INTEN); |
@@ -1744,10 +1719,9 @@ static int pl330_chan_ctrl(struct pl330_thread *thrd, enum pl330_chan_op op) | |||
1744 | static inline int _alloc_event(struct pl330_thread *thrd) | 1719 | static inline int _alloc_event(struct pl330_thread *thrd) |
1745 | { | 1720 | { |
1746 | struct pl330_dmac *pl330 = thrd->dmac; | 1721 | struct pl330_dmac *pl330 = thrd->dmac; |
1747 | struct pl330_info *pi = pl330->pinfo; | ||
1748 | int ev; | 1722 | int ev; |
1749 | 1723 | ||
1750 | for (ev = 0; ev < pi->pcfg.num_events; ev++) | 1724 | for (ev = 0; ev < pl330->pcfg.num_events; ev++) |
1751 | if (pl330->events[ev] == -1) { | 1725 | if (pl330->events[ev] == -1) { |
1752 | pl330->events[ev] = thrd->id; | 1726 | pl330->events[ev] = thrd->id; |
1753 | return ev; | 1727 | return ev; |
@@ -1756,37 +1730,31 @@ static inline int _alloc_event(struct pl330_thread *thrd) | |||
1756 | return -1; | 1730 | return -1; |
1757 | } | 1731 | } |
1758 | 1732 | ||
1759 | static bool _chan_ns(const struct pl330_info *pi, int i) | 1733 | static bool _chan_ns(const struct pl330_dmac *pl330, int i) |
1760 | { | 1734 | { |
1761 | return pi->pcfg.irq_ns & (1 << i); | 1735 | return pl330->pcfg.irq_ns & (1 << i); |
1762 | } | 1736 | } |
1763 | 1737 | ||
1764 | /* Upon success, returns IdentityToken for the | 1738 | /* Upon success, returns IdentityToken for the |
1765 | * allocated channel, NULL otherwise. | 1739 | * allocated channel, NULL otherwise. |
1766 | */ | 1740 | */ |
1767 | static struct pl330_thread *pl330_request_channel(const struct pl330_info *pi) | 1741 | static struct pl330_thread *pl330_request_channel(struct pl330_dmac *pl330) |
1768 | { | 1742 | { |
1769 | struct pl330_thread *thrd = NULL; | 1743 | struct pl330_thread *thrd = NULL; |
1770 | struct pl330_dmac *pl330; | ||
1771 | unsigned long flags; | 1744 | unsigned long flags; |
1772 | int chans, i; | 1745 | int chans, i; |
1773 | 1746 | ||
1774 | if (!pi || !pi->pl330_data) | ||
1775 | return NULL; | ||
1776 | |||
1777 | pl330 = pi->pl330_data; | ||
1778 | |||
1779 | if (pl330->state == DYING) | 1747 | if (pl330->state == DYING) |
1780 | return NULL; | 1748 | return NULL; |
1781 | 1749 | ||
1782 | chans = pi->pcfg.num_chan; | 1750 | chans = pl330->pcfg.num_chan; |
1783 | 1751 | ||
1784 | spin_lock_irqsave(&pl330->lock, flags); | 1752 | spin_lock_irqsave(&pl330->lock, flags); |
1785 | 1753 | ||
1786 | for (i = 0; i < chans; i++) { | 1754 | for (i = 0; i < chans; i++) { |
1787 | thrd = &pl330->channels[i]; | 1755 | thrd = &pl330->channels[i]; |
1788 | if ((thrd->free) && (!_manager_ns(thrd) || | 1756 | if ((thrd->free) && (!_manager_ns(thrd) || |
1789 | _chan_ns(pi, i))) { | 1757 | _chan_ns(pl330, i))) { |
1790 | thrd->ev = _alloc_event(thrd); | 1758 | thrd->ev = _alloc_event(thrd); |
1791 | if (thrd->ev >= 0) { | 1759 | if (thrd->ev >= 0) { |
1792 | thrd->free = false; | 1760 | thrd->free = false; |
@@ -1810,10 +1778,9 @@ static struct pl330_thread *pl330_request_channel(const struct pl330_info *pi) | |||
1810 | static inline void _free_event(struct pl330_thread *thrd, int ev) | 1778 | static inline void _free_event(struct pl330_thread *thrd, int ev) |
1811 | { | 1779 | { |
1812 | struct pl330_dmac *pl330 = thrd->dmac; | 1780 | struct pl330_dmac *pl330 = thrd->dmac; |
1813 | struct pl330_info *pi = pl330->pinfo; | ||
1814 | 1781 | ||
1815 | /* If the event is valid and was held by the thread */ | 1782 | /* If the event is valid and was held by the thread */ |
1816 | if (ev >= 0 && ev < pi->pcfg.num_events | 1783 | if (ev >= 0 && ev < pl330->pcfg.num_events |
1817 | && pl330->events[ev] == thrd->id) | 1784 | && pl330->events[ev] == thrd->id) |
1818 | pl330->events[ev] = -1; | 1785 | pl330->events[ev] = -1; |
1819 | } | 1786 | } |
@@ -1842,72 +1809,70 @@ static void pl330_release_channel(struct pl330_thread *thrd) | |||
1842 | /* Initialize the structure for PL330 configuration, that can be used | 1809 | /* Initialize the structure for PL330 configuration, that can be used |
1843 | * by the client driver the make best use of the DMAC | 1810 | * by the client driver the make best use of the DMAC |
1844 | */ | 1811 | */ |
1845 | static void read_dmac_config(struct pl330_info *pi) | 1812 | static void read_dmac_config(struct pl330_dmac *pl330) |
1846 | { | 1813 | { |
1847 | void __iomem *regs = pi->base; | 1814 | void __iomem *regs = pl330->base; |
1848 | u32 val; | 1815 | u32 val; |
1849 | 1816 | ||
1850 | val = readl(regs + CRD) >> CRD_DATA_WIDTH_SHIFT; | 1817 | val = readl(regs + CRD) >> CRD_DATA_WIDTH_SHIFT; |
1851 | val &= CRD_DATA_WIDTH_MASK; | 1818 | val &= CRD_DATA_WIDTH_MASK; |
1852 | pi->pcfg.data_bus_width = 8 * (1 << val); | 1819 | pl330->pcfg.data_bus_width = 8 * (1 << val); |
1853 | 1820 | ||
1854 | val = readl(regs + CRD) >> CRD_DATA_BUFF_SHIFT; | 1821 | val = readl(regs + CRD) >> CRD_DATA_BUFF_SHIFT; |
1855 | val &= CRD_DATA_BUFF_MASK; | 1822 | val &= CRD_DATA_BUFF_MASK; |
1856 | pi->pcfg.data_buf_dep = val + 1; | 1823 | pl330->pcfg.data_buf_dep = val + 1; |
1857 | 1824 | ||
1858 | val = readl(regs + CR0) >> CR0_NUM_CHANS_SHIFT; | 1825 | val = readl(regs + CR0) >> CR0_NUM_CHANS_SHIFT; |
1859 | val &= CR0_NUM_CHANS_MASK; | 1826 | val &= CR0_NUM_CHANS_MASK; |
1860 | val += 1; | 1827 | val += 1; |
1861 | pi->pcfg.num_chan = val; | 1828 | pl330->pcfg.num_chan = val; |
1862 | 1829 | ||
1863 | val = readl(regs + CR0); | 1830 | val = readl(regs + CR0); |
1864 | if (val & CR0_PERIPH_REQ_SET) { | 1831 | if (val & CR0_PERIPH_REQ_SET) { |
1865 | val = (val >> CR0_NUM_PERIPH_SHIFT) & CR0_NUM_PERIPH_MASK; | 1832 | val = (val >> CR0_NUM_PERIPH_SHIFT) & CR0_NUM_PERIPH_MASK; |
1866 | val += 1; | 1833 | val += 1; |
1867 | pi->pcfg.num_peri = val; | 1834 | pl330->pcfg.num_peri = val; |
1868 | pi->pcfg.peri_ns = readl(regs + CR4); | 1835 | pl330->pcfg.peri_ns = readl(regs + CR4); |
1869 | } else { | 1836 | } else { |
1870 | pi->pcfg.num_peri = 0; | 1837 | pl330->pcfg.num_peri = 0; |
1871 | } | 1838 | } |
1872 | 1839 | ||
1873 | val = readl(regs + CR0); | 1840 | val = readl(regs + CR0); |
1874 | if (val & CR0_BOOT_MAN_NS) | 1841 | if (val & CR0_BOOT_MAN_NS) |
1875 | pi->pcfg.mode |= DMAC_MODE_NS; | 1842 | pl330->pcfg.mode |= DMAC_MODE_NS; |
1876 | else | 1843 | else |
1877 | pi->pcfg.mode &= ~DMAC_MODE_NS; | 1844 | pl330->pcfg.mode &= ~DMAC_MODE_NS; |
1878 | 1845 | ||
1879 | val = readl(regs + CR0) >> CR0_NUM_EVENTS_SHIFT; | 1846 | val = readl(regs + CR0) >> CR0_NUM_EVENTS_SHIFT; |
1880 | val &= CR0_NUM_EVENTS_MASK; | 1847 | val &= CR0_NUM_EVENTS_MASK; |
1881 | val += 1; | 1848 | val += 1; |
1882 | pi->pcfg.num_events = val; | 1849 | pl330->pcfg.num_events = val; |
1883 | 1850 | ||
1884 | pi->pcfg.irq_ns = readl(regs + CR3); | 1851 | pl330->pcfg.irq_ns = readl(regs + CR3); |
1885 | } | 1852 | } |
1886 | 1853 | ||
1887 | static inline void _reset_thread(struct pl330_thread *thrd) | 1854 | static inline void _reset_thread(struct pl330_thread *thrd) |
1888 | { | 1855 | { |
1889 | struct pl330_dmac *pl330 = thrd->dmac; | 1856 | struct pl330_dmac *pl330 = thrd->dmac; |
1890 | struct pl330_info *pi = pl330->pinfo; | ||
1891 | 1857 | ||
1892 | thrd->req[0].mc_cpu = pl330->mcode_cpu | 1858 | thrd->req[0].mc_cpu = pl330->mcode_cpu |
1893 | + (thrd->id * pi->mcbufsz); | 1859 | + (thrd->id * pl330->mcbufsz); |
1894 | thrd->req[0].mc_bus = pl330->mcode_bus | 1860 | thrd->req[0].mc_bus = pl330->mcode_bus |
1895 | + (thrd->id * pi->mcbufsz); | 1861 | + (thrd->id * pl330->mcbufsz); |
1896 | thrd->req[0].r = NULL; | 1862 | thrd->req[0].r = NULL; |
1897 | mark_free(thrd, 0); | 1863 | mark_free(thrd, 0); |
1898 | 1864 | ||
1899 | thrd->req[1].mc_cpu = thrd->req[0].mc_cpu | 1865 | thrd->req[1].mc_cpu = thrd->req[0].mc_cpu |
1900 | + pi->mcbufsz / 2; | 1866 | + pl330->mcbufsz / 2; |
1901 | thrd->req[1].mc_bus = thrd->req[0].mc_bus | 1867 | thrd->req[1].mc_bus = thrd->req[0].mc_bus |
1902 | + pi->mcbufsz / 2; | 1868 | + pl330->mcbufsz / 2; |
1903 | thrd->req[1].r = NULL; | 1869 | thrd->req[1].r = NULL; |
1904 | mark_free(thrd, 1); | 1870 | mark_free(thrd, 1); |
1905 | } | 1871 | } |
1906 | 1872 | ||
1907 | static int dmac_alloc_threads(struct pl330_dmac *pl330) | 1873 | static int dmac_alloc_threads(struct pl330_dmac *pl330) |
1908 | { | 1874 | { |
1909 | struct pl330_info *pi = pl330->pinfo; | 1875 | int chans = pl330->pcfg.num_chan; |
1910 | int chans = pi->pcfg.num_chan; | ||
1911 | struct pl330_thread *thrd; | 1876 | struct pl330_thread *thrd; |
1912 | int i; | 1877 | int i; |
1913 | 1878 | ||
@@ -1938,29 +1903,28 @@ static int dmac_alloc_threads(struct pl330_dmac *pl330) | |||
1938 | 1903 | ||
1939 | static int dmac_alloc_resources(struct pl330_dmac *pl330) | 1904 | static int dmac_alloc_resources(struct pl330_dmac *pl330) |
1940 | { | 1905 | { |
1941 | struct pl330_info *pi = pl330->pinfo; | 1906 | int chans = pl330->pcfg.num_chan; |
1942 | int chans = pi->pcfg.num_chan; | ||
1943 | int ret; | 1907 | int ret; |
1944 | 1908 | ||
1945 | /* | 1909 | /* |
1946 | * Alloc MicroCode buffer for 'chans' Channel threads. | 1910 | * Alloc MicroCode buffer for 'chans' Channel threads. |
1947 | * A channel's buffer offset is (Channel_Id * MCODE_BUFF_PERCHAN) | 1911 | * A channel's buffer offset is (Channel_Id * MCODE_BUFF_PERCHAN) |
1948 | */ | 1912 | */ |
1949 | pl330->mcode_cpu = dma_alloc_coherent(pi->dev, | 1913 | pl330->mcode_cpu = dma_alloc_coherent(pl330->ddma.dev, |
1950 | chans * pi->mcbufsz, | 1914 | chans * pl330->mcbufsz, |
1951 | &pl330->mcode_bus, GFP_KERNEL); | 1915 | &pl330->mcode_bus, GFP_KERNEL); |
1952 | if (!pl330->mcode_cpu) { | 1916 | if (!pl330->mcode_cpu) { |
1953 | dev_err(pi->dev, "%s:%d Can't allocate memory!\n", | 1917 | dev_err(pl330->ddma.dev, "%s:%d Can't allocate memory!\n", |
1954 | __func__, __LINE__); | 1918 | __func__, __LINE__); |
1955 | return -ENOMEM; | 1919 | return -ENOMEM; |
1956 | } | 1920 | } |
1957 | 1921 | ||
1958 | ret = dmac_alloc_threads(pl330); | 1922 | ret = dmac_alloc_threads(pl330); |
1959 | if (ret) { | 1923 | if (ret) { |
1960 | dev_err(pi->dev, "%s:%d Can't to create channels for DMAC!\n", | 1924 | dev_err(pl330->ddma.dev, "%s:%d Can't to create channels for DMAC!\n", |
1961 | __func__, __LINE__); | 1925 | __func__, __LINE__); |
1962 | dma_free_coherent(pi->dev, | 1926 | dma_free_coherent(pl330->ddma.dev, |
1963 | chans * pi->mcbufsz, | 1927 | chans * pl330->mcbufsz, |
1964 | pl330->mcode_cpu, pl330->mcode_bus); | 1928 | pl330->mcode_cpu, pl330->mcode_bus); |
1965 | return ret; | 1929 | return ret; |
1966 | } | 1930 | } |
@@ -1968,64 +1932,45 @@ static int dmac_alloc_resources(struct pl330_dmac *pl330) | |||
1968 | return 0; | 1932 | return 0; |
1969 | } | 1933 | } |
1970 | 1934 | ||
1971 | static int pl330_add(struct pl330_info *pi) | 1935 | static int pl330_add(struct pl330_dmac *pl330) |
1972 | { | 1936 | { |
1973 | struct pl330_dmac *pl330; | ||
1974 | void __iomem *regs; | 1937 | void __iomem *regs; |
1975 | int i, ret; | 1938 | int i, ret; |
1976 | 1939 | ||
1977 | if (!pi || !pi->dev) | 1940 | regs = pl330->base; |
1978 | return -EINVAL; | ||
1979 | |||
1980 | /* If already added */ | ||
1981 | if (pi->pl330_data) | ||
1982 | return -EINVAL; | ||
1983 | |||
1984 | regs = pi->base; | ||
1985 | 1941 | ||
1986 | /* Check if we can handle this DMAC */ | 1942 | /* Check if we can handle this DMAC */ |
1987 | if ((pi->pcfg.periph_id & 0xfffff) != PERIPH_ID_VAL) { | 1943 | if ((pl330->pcfg.periph_id & 0xfffff) != PERIPH_ID_VAL) { |
1988 | dev_err(pi->dev, "PERIPH_ID 0x%x !\n", pi->pcfg.periph_id); | 1944 | dev_err(pl330->ddma.dev, "PERIPH_ID 0x%x !\n", |
1945 | pl330->pcfg.periph_id); | ||
1989 | return -EINVAL; | 1946 | return -EINVAL; |
1990 | } | 1947 | } |
1991 | 1948 | ||
1992 | /* Read the configuration of the DMAC */ | 1949 | /* Read the configuration of the DMAC */ |
1993 | read_dmac_config(pi); | 1950 | read_dmac_config(pl330); |
1994 | 1951 | ||
1995 | if (pi->pcfg.num_events == 0) { | 1952 | if (pl330->pcfg.num_events == 0) { |
1996 | dev_err(pi->dev, "%s:%d Can't work without events!\n", | 1953 | dev_err(pl330->ddma.dev, "%s:%d Can't work without events!\n", |
1997 | __func__, __LINE__); | 1954 | __func__, __LINE__); |
1998 | return -EINVAL; | 1955 | return -EINVAL; |
1999 | } | 1956 | } |
2000 | 1957 | ||
2001 | pl330 = kzalloc(sizeof(*pl330), GFP_KERNEL); | ||
2002 | if (!pl330) { | ||
2003 | dev_err(pi->dev, "%s:%d Can't allocate memory!\n", | ||
2004 | __func__, __LINE__); | ||
2005 | return -ENOMEM; | ||
2006 | } | ||
2007 | |||
2008 | /* Assign the info structure and private data */ | ||
2009 | pl330->pinfo = pi; | ||
2010 | pi->pl330_data = pl330; | ||
2011 | |||
2012 | spin_lock_init(&pl330->lock); | 1958 | spin_lock_init(&pl330->lock); |
2013 | 1959 | ||
2014 | INIT_LIST_HEAD(&pl330->req_done); | 1960 | INIT_LIST_HEAD(&pl330->req_done); |
2015 | 1961 | ||
2016 | /* Use default MC buffer size if not provided */ | 1962 | /* Use default MC buffer size if not provided */ |
2017 | if (!pi->mcbufsz) | 1963 | if (!pl330->mcbufsz) |
2018 | pi->mcbufsz = MCODE_BUFF_PER_REQ * 2; | 1964 | pl330->mcbufsz = MCODE_BUFF_PER_REQ * 2; |
2019 | 1965 | ||
2020 | /* Mark all events as free */ | 1966 | /* Mark all events as free */ |
2021 | for (i = 0; i < pi->pcfg.num_events; i++) | 1967 | for (i = 0; i < pl330->pcfg.num_events; i++) |
2022 | pl330->events[i] = -1; | 1968 | pl330->events[i] = -1; |
2023 | 1969 | ||
2024 | /* Allocate resources needed by the DMAC */ | 1970 | /* Allocate resources needed by the DMAC */ |
2025 | ret = dmac_alloc_resources(pl330); | 1971 | ret = dmac_alloc_resources(pl330); |
2026 | if (ret) { | 1972 | if (ret) { |
2027 | dev_err(pi->dev, "Unable to create channels for DMAC\n"); | 1973 | dev_err(pl330->ddma.dev, "Unable to create channels for DMAC\n"); |
2028 | kfree(pl330); | ||
2029 | return ret; | 1974 | return ret; |
2030 | } | 1975 | } |
2031 | 1976 | ||
@@ -2038,13 +1983,11 @@ static int pl330_add(struct pl330_info *pi) | |||
2038 | 1983 | ||
2039 | static int dmac_free_threads(struct pl330_dmac *pl330) | 1984 | static int dmac_free_threads(struct pl330_dmac *pl330) |
2040 | { | 1985 | { |
2041 | struct pl330_info *pi = pl330->pinfo; | ||
2042 | int chans = pi->pcfg.num_chan; | ||
2043 | struct pl330_thread *thrd; | 1986 | struct pl330_thread *thrd; |
2044 | int i; | 1987 | int i; |
2045 | 1988 | ||
2046 | /* Release Channel threads */ | 1989 | /* Release Channel threads */ |
2047 | for (i = 0; i < chans; i++) { | 1990 | for (i = 0; i < pl330->pcfg.num_chan; i++) { |
2048 | thrd = &pl330->channels[i]; | 1991 | thrd = &pl330->channels[i]; |
2049 | pl330_release_channel(thrd); | 1992 | pl330_release_channel(thrd); |
2050 | } | 1993 | } |
@@ -2055,35 +1998,18 @@ static int dmac_free_threads(struct pl330_dmac *pl330) | |||
2055 | return 0; | 1998 | return 0; |
2056 | } | 1999 | } |
2057 | 2000 | ||
2058 | static void dmac_free_resources(struct pl330_dmac *pl330) | 2001 | static void pl330_del(struct pl330_dmac *pl330) |
2059 | { | ||
2060 | struct pl330_info *pi = pl330->pinfo; | ||
2061 | int chans = pi->pcfg.num_chan; | ||
2062 | |||
2063 | dmac_free_threads(pl330); | ||
2064 | |||
2065 | dma_free_coherent(pi->dev, chans * pi->mcbufsz, | ||
2066 | pl330->mcode_cpu, pl330->mcode_bus); | ||
2067 | } | ||
2068 | |||
2069 | static void pl330_del(struct pl330_info *pi) | ||
2070 | { | 2002 | { |
2071 | struct pl330_dmac *pl330; | ||
2072 | |||
2073 | if (!pi || !pi->pl330_data) | ||
2074 | return; | ||
2075 | |||
2076 | pl330 = pi->pl330_data; | ||
2077 | |||
2078 | pl330->state = UNINIT; | 2003 | pl330->state = UNINIT; |
2079 | 2004 | ||
2080 | tasklet_kill(&pl330->tasks); | 2005 | tasklet_kill(&pl330->tasks); |
2081 | 2006 | ||
2082 | /* Free DMAC resources */ | 2007 | /* Free DMAC resources */ |
2083 | dmac_free_resources(pl330); | 2008 | dmac_free_threads(pl330); |
2084 | 2009 | ||
2085 | kfree(pl330); | 2010 | dma_free_coherent(pl330->ddma.dev, |
2086 | pi->pl330_data = NULL; | 2011 | pl330->pcfg.num_chan * pl330->mcbufsz, pl330->mcode_cpu, |
2012 | pl330->mcode_bus); | ||
2087 | } | 2013 | } |
2088 | 2014 | ||
2089 | /* forward declaration */ | 2015 | /* forward declaration */ |
@@ -2124,7 +2050,7 @@ static inline void fill_queue(struct dma_pl330_chan *pch) | |||
2124 | } else { | 2050 | } else { |
2125 | /* Unacceptable request */ | 2051 | /* Unacceptable request */ |
2126 | desc->status = DONE; | 2052 | desc->status = DONE; |
2127 | dev_err(pch->dmac->pif.dev, "%s:%d Bad Desc(%d)\n", | 2053 | dev_err(pch->dmac->ddma.dev, "%s:%d Bad Desc(%d)\n", |
2128 | __func__, __LINE__, desc->txd.cookie); | 2054 | __func__, __LINE__, desc->txd.cookie); |
2129 | tasklet_schedule(&pch->task); | 2055 | tasklet_schedule(&pch->task); |
2130 | } | 2056 | } |
@@ -2198,23 +2124,26 @@ static struct dma_chan *of_dma_pl330_xlate(struct of_phandle_args *dma_spec, | |||
2198 | struct of_dma *ofdma) | 2124 | struct of_dma *ofdma) |
2199 | { | 2125 | { |
2200 | int count = dma_spec->args_count; | 2126 | int count = dma_spec->args_count; |
2201 | struct dma_pl330_dmac *pdmac = ofdma->of_dma_data; | 2127 | struct pl330_dmac *pl330 = ofdma->of_dma_data; |
2202 | unsigned int chan_id; | 2128 | unsigned int chan_id; |
2203 | 2129 | ||
2130 | if (!pl330) | ||
2131 | return NULL; | ||
2132 | |||
2204 | if (count != 1) | 2133 | if (count != 1) |
2205 | return NULL; | 2134 | return NULL; |
2206 | 2135 | ||
2207 | chan_id = dma_spec->args[0]; | 2136 | chan_id = dma_spec->args[0]; |
2208 | if (chan_id >= pdmac->num_peripherals) | 2137 | if (chan_id >= pl330->num_peripherals) |
2209 | return NULL; | 2138 | return NULL; |
2210 | 2139 | ||
2211 | return dma_get_slave_channel(&pdmac->peripherals[chan_id].chan); | 2140 | return dma_get_slave_channel(&pl330->peripherals[chan_id].chan); |
2212 | } | 2141 | } |
2213 | 2142 | ||
2214 | static int pl330_alloc_chan_resources(struct dma_chan *chan) | 2143 | static int pl330_alloc_chan_resources(struct dma_chan *chan) |
2215 | { | 2144 | { |
2216 | struct dma_pl330_chan *pch = to_pchan(chan); | 2145 | struct dma_pl330_chan *pch = to_pchan(chan); |
2217 | struct dma_pl330_dmac *pdmac = pch->dmac; | 2146 | struct pl330_dmac *pl330 = pch->dmac; |
2218 | unsigned long flags; | 2147 | unsigned long flags; |
2219 | 2148 | ||
2220 | spin_lock_irqsave(&pch->lock, flags); | 2149 | spin_lock_irqsave(&pch->lock, flags); |
@@ -2222,7 +2151,7 @@ static int pl330_alloc_chan_resources(struct dma_chan *chan) | |||
2222 | dma_cookie_init(chan); | 2151 | dma_cookie_init(chan); |
2223 | pch->cyclic = false; | 2152 | pch->cyclic = false; |
2224 | 2153 | ||
2225 | pch->thread = pl330_request_channel(&pdmac->pif); | 2154 | pch->thread = pl330_request_channel(pl330); |
2226 | if (!pch->thread) { | 2155 | if (!pch->thread) { |
2227 | spin_unlock_irqrestore(&pch->lock, flags); | 2156 | spin_unlock_irqrestore(&pch->lock, flags); |
2228 | return -ENOMEM; | 2157 | return -ENOMEM; |
@@ -2240,7 +2169,7 @@ static int pl330_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd, unsigned | |||
2240 | struct dma_pl330_chan *pch = to_pchan(chan); | 2169 | struct dma_pl330_chan *pch = to_pchan(chan); |
2241 | struct dma_pl330_desc *desc; | 2170 | struct dma_pl330_desc *desc; |
2242 | unsigned long flags; | 2171 | unsigned long flags; |
2243 | struct dma_pl330_dmac *pdmac = pch->dmac; | 2172 | struct pl330_dmac *pl330 = pch->dmac; |
2244 | struct dma_slave_config *slave_config; | 2173 | struct dma_slave_config *slave_config; |
2245 | LIST_HEAD(list); | 2174 | LIST_HEAD(list); |
2246 | 2175 | ||
@@ -2267,9 +2196,9 @@ static int pl330_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd, unsigned | |||
2267 | dma_cookie_complete(&desc->txd); | 2196 | dma_cookie_complete(&desc->txd); |
2268 | } | 2197 | } |
2269 | 2198 | ||
2270 | list_splice_tail_init(&pch->submitted_list, &pdmac->desc_pool); | 2199 | list_splice_tail_init(&pch->submitted_list, &pl330->desc_pool); |
2271 | list_splice_tail_init(&pch->work_list, &pdmac->desc_pool); | 2200 | list_splice_tail_init(&pch->work_list, &pl330->desc_pool); |
2272 | list_splice_tail_init(&pch->completed_list, &pdmac->desc_pool); | 2201 | list_splice_tail_init(&pch->completed_list, &pl330->desc_pool); |
2273 | spin_unlock_irqrestore(&pch->lock, flags); | 2202 | spin_unlock_irqrestore(&pch->lock, flags); |
2274 | break; | 2203 | break; |
2275 | case DMA_SLAVE_CONFIG: | 2204 | case DMA_SLAVE_CONFIG: |
@@ -2292,7 +2221,7 @@ static int pl330_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd, unsigned | |||
2292 | } | 2221 | } |
2293 | break; | 2222 | break; |
2294 | default: | 2223 | default: |
2295 | dev_err(pch->dmac->pif.dev, "Not supported command.\n"); | 2224 | dev_err(pch->dmac->ddma.dev, "Not supported command.\n"); |
2296 | return -ENXIO; | 2225 | return -ENXIO; |
2297 | } | 2226 | } |
2298 | 2227 | ||
@@ -2383,44 +2312,37 @@ static inline void _init_desc(struct dma_pl330_desc *desc) | |||
2383 | } | 2312 | } |
2384 | 2313 | ||
2385 | /* Returns the number of descriptors added to the DMAC pool */ | 2314 | /* Returns the number of descriptors added to the DMAC pool */ |
2386 | static int add_desc(struct dma_pl330_dmac *pdmac, gfp_t flg, int count) | 2315 | static int add_desc(struct pl330_dmac *pl330, gfp_t flg, int count) |
2387 | { | 2316 | { |
2388 | struct dma_pl330_desc *desc; | 2317 | struct dma_pl330_desc *desc; |
2389 | unsigned long flags; | 2318 | unsigned long flags; |
2390 | int i; | 2319 | int i; |
2391 | 2320 | ||
2392 | if (!pdmac) | ||
2393 | return 0; | ||
2394 | |||
2395 | desc = kcalloc(count, sizeof(*desc), flg); | 2321 | desc = kcalloc(count, sizeof(*desc), flg); |
2396 | if (!desc) | 2322 | if (!desc) |
2397 | return 0; | 2323 | return 0; |
2398 | 2324 | ||
2399 | spin_lock_irqsave(&pdmac->pool_lock, flags); | 2325 | spin_lock_irqsave(&pl330->pool_lock, flags); |
2400 | 2326 | ||
2401 | for (i = 0; i < count; i++) { | 2327 | for (i = 0; i < count; i++) { |
2402 | _init_desc(&desc[i]); | 2328 | _init_desc(&desc[i]); |
2403 | list_add_tail(&desc[i].node, &pdmac->desc_pool); | 2329 | list_add_tail(&desc[i].node, &pl330->desc_pool); |
2404 | } | 2330 | } |
2405 | 2331 | ||
2406 | spin_unlock_irqrestore(&pdmac->pool_lock, flags); | 2332 | spin_unlock_irqrestore(&pl330->pool_lock, flags); |
2407 | 2333 | ||
2408 | return count; | 2334 | return count; |
2409 | } | 2335 | } |
2410 | 2336 | ||
2411 | static struct dma_pl330_desc * | 2337 | static struct dma_pl330_desc *pluck_desc(struct pl330_dmac *pl330) |
2412 | pluck_desc(struct dma_pl330_dmac *pdmac) | ||
2413 | { | 2338 | { |
2414 | struct dma_pl330_desc *desc = NULL; | 2339 | struct dma_pl330_desc *desc = NULL; |
2415 | unsigned long flags; | 2340 | unsigned long flags; |
2416 | 2341 | ||
2417 | if (!pdmac) | 2342 | spin_lock_irqsave(&pl330->pool_lock, flags); |
2418 | return NULL; | ||
2419 | 2343 | ||
2420 | spin_lock_irqsave(&pdmac->pool_lock, flags); | 2344 | if (!list_empty(&pl330->desc_pool)) { |
2421 | 2345 | desc = list_entry(pl330->desc_pool.next, | |
2422 | if (!list_empty(&pdmac->desc_pool)) { | ||
2423 | desc = list_entry(pdmac->desc_pool.next, | ||
2424 | struct dma_pl330_desc, node); | 2346 | struct dma_pl330_desc, node); |
2425 | 2347 | ||
2426 | list_del_init(&desc->node); | 2348 | list_del_init(&desc->node); |
@@ -2429,29 +2351,29 @@ pluck_desc(struct dma_pl330_dmac *pdmac) | |||
2429 | desc->txd.callback = NULL; | 2351 | desc->txd.callback = NULL; |
2430 | } | 2352 | } |
2431 | 2353 | ||
2432 | spin_unlock_irqrestore(&pdmac->pool_lock, flags); | 2354 | spin_unlock_irqrestore(&pl330->pool_lock, flags); |
2433 | 2355 | ||
2434 | return desc; | 2356 | return desc; |
2435 | } | 2357 | } |
2436 | 2358 | ||
2437 | static struct dma_pl330_desc *pl330_get_desc(struct dma_pl330_chan *pch) | 2359 | static struct dma_pl330_desc *pl330_get_desc(struct dma_pl330_chan *pch) |
2438 | { | 2360 | { |
2439 | struct dma_pl330_dmac *pdmac = pch->dmac; | 2361 | struct pl330_dmac *pl330 = pch->dmac; |
2440 | u8 *peri_id = pch->chan.private; | 2362 | u8 *peri_id = pch->chan.private; |
2441 | struct dma_pl330_desc *desc; | 2363 | struct dma_pl330_desc *desc; |
2442 | 2364 | ||
2443 | /* Pluck one desc from the pool of DMAC */ | 2365 | /* Pluck one desc from the pool of DMAC */ |
2444 | desc = pluck_desc(pdmac); | 2366 | desc = pluck_desc(pl330); |
2445 | 2367 | ||
2446 | /* If the DMAC pool is empty, alloc new */ | 2368 | /* If the DMAC pool is empty, alloc new */ |
2447 | if (!desc) { | 2369 | if (!desc) { |
2448 | if (!add_desc(pdmac, GFP_ATOMIC, 1)) | 2370 | if (!add_desc(pl330, GFP_ATOMIC, 1)) |
2449 | return NULL; | 2371 | return NULL; |
2450 | 2372 | ||
2451 | /* Try again */ | 2373 | /* Try again */ |
2452 | desc = pluck_desc(pdmac); | 2374 | desc = pluck_desc(pl330); |
2453 | if (!desc) { | 2375 | if (!desc) { |
2454 | dev_err(pch->dmac->pif.dev, | 2376 | dev_err(pch->dmac->ddma.dev, |
2455 | "%s:%d ALERT!\n", __func__, __LINE__); | 2377 | "%s:%d ALERT!\n", __func__, __LINE__); |
2456 | return NULL; | 2378 | return NULL; |
2457 | } | 2379 | } |
@@ -2463,7 +2385,7 @@ static struct dma_pl330_desc *pl330_get_desc(struct dma_pl330_chan *pch) | |||
2463 | async_tx_ack(&desc->txd); | 2385 | async_tx_ack(&desc->txd); |
2464 | 2386 | ||
2465 | desc->req.peri = peri_id ? pch->chan.chan_id : 0; | 2387 | desc->req.peri = peri_id ? pch->chan.chan_id : 0; |
2466 | desc->rqcfg.pcfg = &pch->dmac->pif.pcfg; | 2388 | desc->rqcfg.pcfg = &pch->dmac->pcfg; |
2467 | 2389 | ||
2468 | dma_async_tx_descriptor_init(&desc->txd, &pch->chan); | 2390 | dma_async_tx_descriptor_init(&desc->txd, &pch->chan); |
2469 | 2391 | ||
@@ -2485,7 +2407,7 @@ __pl330_prep_dma_memcpy(struct dma_pl330_chan *pch, dma_addr_t dst, | |||
2485 | struct dma_pl330_desc *desc = pl330_get_desc(pch); | 2407 | struct dma_pl330_desc *desc = pl330_get_desc(pch); |
2486 | 2408 | ||
2487 | if (!desc) { | 2409 | if (!desc) { |
2488 | dev_err(pch->dmac->pif.dev, "%s:%d Unable to fetch desc\n", | 2410 | dev_err(pch->dmac->ddma.dev, "%s:%d Unable to fetch desc\n", |
2489 | __func__, __LINE__); | 2411 | __func__, __LINE__); |
2490 | return NULL; | 2412 | return NULL; |
2491 | } | 2413 | } |
@@ -2509,11 +2431,11 @@ __pl330_prep_dma_memcpy(struct dma_pl330_chan *pch, dma_addr_t dst, | |||
2509 | static inline int get_burst_len(struct dma_pl330_desc *desc, size_t len) | 2431 | static inline int get_burst_len(struct dma_pl330_desc *desc, size_t len) |
2510 | { | 2432 | { |
2511 | struct dma_pl330_chan *pch = desc->pchan; | 2433 | struct dma_pl330_chan *pch = desc->pchan; |
2512 | struct pl330_info *pi = &pch->dmac->pif; | 2434 | struct pl330_dmac *pl330 = pch->dmac; |
2513 | int burst_len; | 2435 | int burst_len; |
2514 | 2436 | ||
2515 | burst_len = pi->pcfg.data_bus_width / 8; | 2437 | burst_len = pl330->pcfg.data_bus_width / 8; |
2516 | burst_len *= pi->pcfg.data_buf_dep; | 2438 | burst_len *= pl330->pcfg.data_buf_dep; |
2517 | burst_len >>= desc->rqcfg.brst_size; | 2439 | burst_len >>= desc->rqcfg.brst_size; |
2518 | 2440 | ||
2519 | /* src/dst_burst_len can't be more than 16 */ | 2441 | /* src/dst_burst_len can't be more than 16 */ |
@@ -2536,7 +2458,7 @@ static struct dma_async_tx_descriptor *pl330_prep_dma_cyclic( | |||
2536 | { | 2458 | { |
2537 | struct dma_pl330_desc *desc = NULL, *first = NULL; | 2459 | struct dma_pl330_desc *desc = NULL, *first = NULL; |
2538 | struct dma_pl330_chan *pch = to_pchan(chan); | 2460 | struct dma_pl330_chan *pch = to_pchan(chan); |
2539 | struct dma_pl330_dmac *pdmac = pch->dmac; | 2461 | struct pl330_dmac *pl330 = pch->dmac; |
2540 | unsigned int i; | 2462 | unsigned int i; |
2541 | dma_addr_t dst; | 2463 | dma_addr_t dst; |
2542 | dma_addr_t src; | 2464 | dma_addr_t src; |
@@ -2545,7 +2467,7 @@ static struct dma_async_tx_descriptor *pl330_prep_dma_cyclic( | |||
2545 | return NULL; | 2467 | return NULL; |
2546 | 2468 | ||
2547 | if (!is_slave_direction(direction)) { | 2469 | if (!is_slave_direction(direction)) { |
2548 | dev_err(pch->dmac->pif.dev, "%s:%d Invalid dma direction\n", | 2470 | dev_err(pch->dmac->ddma.dev, "%s:%d Invalid dma direction\n", |
2549 | __func__, __LINE__); | 2471 | __func__, __LINE__); |
2550 | return NULL; | 2472 | return NULL; |
2551 | } | 2473 | } |
@@ -2553,23 +2475,23 @@ static struct dma_async_tx_descriptor *pl330_prep_dma_cyclic( | |||
2553 | for (i = 0; i < len / period_len; i++) { | 2475 | for (i = 0; i < len / period_len; i++) { |
2554 | desc = pl330_get_desc(pch); | 2476 | desc = pl330_get_desc(pch); |
2555 | if (!desc) { | 2477 | if (!desc) { |
2556 | dev_err(pch->dmac->pif.dev, "%s:%d Unable to fetch desc\n", | 2478 | dev_err(pch->dmac->ddma.dev, "%s:%d Unable to fetch desc\n", |
2557 | __func__, __LINE__); | 2479 | __func__, __LINE__); |
2558 | 2480 | ||
2559 | if (!first) | 2481 | if (!first) |
2560 | return NULL; | 2482 | return NULL; |
2561 | 2483 | ||
2562 | spin_lock_irqsave(&pdmac->pool_lock, flags); | 2484 | spin_lock_irqsave(&pl330->pool_lock, flags); |
2563 | 2485 | ||
2564 | while (!list_empty(&first->node)) { | 2486 | while (!list_empty(&first->node)) { |
2565 | desc = list_entry(first->node.next, | 2487 | desc = list_entry(first->node.next, |
2566 | struct dma_pl330_desc, node); | 2488 | struct dma_pl330_desc, node); |
2567 | list_move_tail(&desc->node, &pdmac->desc_pool); | 2489 | list_move_tail(&desc->node, &pl330->desc_pool); |
2568 | } | 2490 | } |
2569 | 2491 | ||
2570 | list_move_tail(&first->node, &pdmac->desc_pool); | 2492 | list_move_tail(&first->node, &pl330->desc_pool); |
2571 | 2493 | ||
2572 | spin_unlock_irqrestore(&pdmac->pool_lock, flags); | 2494 | spin_unlock_irqrestore(&pl330->pool_lock, flags); |
2573 | 2495 | ||
2574 | return NULL; | 2496 | return NULL; |
2575 | } | 2497 | } |
@@ -2619,14 +2541,12 @@ pl330_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dst, | |||
2619 | { | 2541 | { |
2620 | struct dma_pl330_desc *desc; | 2542 | struct dma_pl330_desc *desc; |
2621 | struct dma_pl330_chan *pch = to_pchan(chan); | 2543 | struct dma_pl330_chan *pch = to_pchan(chan); |
2622 | struct pl330_info *pi; | 2544 | struct pl330_dmac *pl330 = pch->dmac; |
2623 | int burst; | 2545 | int burst; |
2624 | 2546 | ||
2625 | if (unlikely(!pch || !len)) | 2547 | if (unlikely(!pch || !len)) |
2626 | return NULL; | 2548 | return NULL; |
2627 | 2549 | ||
2628 | pi = &pch->dmac->pif; | ||
2629 | |||
2630 | desc = __pl330_prep_dma_memcpy(pch, dst, src, len); | 2550 | desc = __pl330_prep_dma_memcpy(pch, dst, src, len); |
2631 | if (!desc) | 2551 | if (!desc) |
2632 | return NULL; | 2552 | return NULL; |
@@ -2636,7 +2556,7 @@ pl330_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dst, | |||
2636 | desc->req.rqtype = DMA_MEM_TO_MEM; | 2556 | desc->req.rqtype = DMA_MEM_TO_MEM; |
2637 | 2557 | ||
2638 | /* Select max possible burst size */ | 2558 | /* Select max possible burst size */ |
2639 | burst = pi->pcfg.data_bus_width / 8; | 2559 | burst = pl330->pcfg.data_bus_width / 8; |
2640 | 2560 | ||
2641 | while (burst > 1) { | 2561 | while (burst > 1) { |
2642 | if (!(len % burst)) | 2562 | if (!(len % burst)) |
@@ -2655,7 +2575,7 @@ pl330_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dst, | |||
2655 | return &desc->txd; | 2575 | return &desc->txd; |
2656 | } | 2576 | } |
2657 | 2577 | ||
2658 | static void __pl330_giveback_desc(struct dma_pl330_dmac *pdmac, | 2578 | static void __pl330_giveback_desc(struct pl330_dmac *pl330, |
2659 | struct dma_pl330_desc *first) | 2579 | struct dma_pl330_desc *first) |
2660 | { | 2580 | { |
2661 | unsigned long flags; | 2581 | unsigned long flags; |
@@ -2664,17 +2584,17 @@ static void __pl330_giveback_desc(struct dma_pl330_dmac *pdmac, | |||
2664 | if (!first) | 2584 | if (!first) |
2665 | return; | 2585 | return; |
2666 | 2586 | ||
2667 | spin_lock_irqsave(&pdmac->pool_lock, flags); | 2587 | spin_lock_irqsave(&pl330->pool_lock, flags); |
2668 | 2588 | ||
2669 | while (!list_empty(&first->node)) { | 2589 | while (!list_empty(&first->node)) { |
2670 | desc = list_entry(first->node.next, | 2590 | desc = list_entry(first->node.next, |
2671 | struct dma_pl330_desc, node); | 2591 | struct dma_pl330_desc, node); |
2672 | list_move_tail(&desc->node, &pdmac->desc_pool); | 2592 | list_move_tail(&desc->node, &pl330->desc_pool); |
2673 | } | 2593 | } |
2674 | 2594 | ||
2675 | list_move_tail(&first->node, &pdmac->desc_pool); | 2595 | list_move_tail(&first->node, &pl330->desc_pool); |
2676 | 2596 | ||
2677 | spin_unlock_irqrestore(&pdmac->pool_lock, flags); | 2597 | spin_unlock_irqrestore(&pl330->pool_lock, flags); |
2678 | } | 2598 | } |
2679 | 2599 | ||
2680 | static struct dma_async_tx_descriptor * | 2600 | static struct dma_async_tx_descriptor * |
@@ -2699,12 +2619,12 @@ pl330_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl, | |||
2699 | 2619 | ||
2700 | desc = pl330_get_desc(pch); | 2620 | desc = pl330_get_desc(pch); |
2701 | if (!desc) { | 2621 | if (!desc) { |
2702 | struct dma_pl330_dmac *pdmac = pch->dmac; | 2622 | struct pl330_dmac *pl330 = pch->dmac; |
2703 | 2623 | ||
2704 | dev_err(pch->dmac->pif.dev, | 2624 | dev_err(pch->dmac->ddma.dev, |
2705 | "%s:%d Unable to fetch desc\n", | 2625 | "%s:%d Unable to fetch desc\n", |
2706 | __func__, __LINE__); | 2626 | __func__, __LINE__); |
2707 | __pl330_giveback_desc(pdmac, first); | 2627 | __pl330_giveback_desc(pl330, first); |
2708 | 2628 | ||
2709 | return NULL; | 2629 | return NULL; |
2710 | } | 2630 | } |
@@ -2768,9 +2688,9 @@ static int | |||
2768 | pl330_probe(struct amba_device *adev, const struct amba_id *id) | 2688 | pl330_probe(struct amba_device *adev, const struct amba_id *id) |
2769 | { | 2689 | { |
2770 | struct dma_pl330_platdata *pdat; | 2690 | struct dma_pl330_platdata *pdat; |
2771 | struct dma_pl330_dmac *pdmac; | 2691 | struct pl330_config *pcfg; |
2692 | struct pl330_dmac *pl330; | ||
2772 | struct dma_pl330_chan *pch, *_p; | 2693 | struct dma_pl330_chan *pch, *_p; |
2773 | struct pl330_info *pi; | ||
2774 | struct dma_device *pd; | 2694 | struct dma_device *pd; |
2775 | struct resource *res; | 2695 | struct resource *res; |
2776 | int i, ret, irq; | 2696 | int i, ret, irq; |
@@ -2783,30 +2703,27 @@ pl330_probe(struct amba_device *adev, const struct amba_id *id) | |||
2783 | return ret; | 2703 | return ret; |
2784 | 2704 | ||
2785 | /* Allocate a new DMAC and its Channels */ | 2705 | /* Allocate a new DMAC and its Channels */ |
2786 | pdmac = devm_kzalloc(&adev->dev, sizeof(*pdmac), GFP_KERNEL); | 2706 | pl330 = devm_kzalloc(&adev->dev, sizeof(*pl330), GFP_KERNEL); |
2787 | if (!pdmac) { | 2707 | if (!pl330) { |
2788 | dev_err(&adev->dev, "unable to allocate mem\n"); | 2708 | dev_err(&adev->dev, "unable to allocate mem\n"); |
2789 | return -ENOMEM; | 2709 | return -ENOMEM; |
2790 | } | 2710 | } |
2791 | 2711 | ||
2792 | pi = &pdmac->pif; | 2712 | pl330->mcbufsz = pdat ? pdat->mcbuf_sz : 0; |
2793 | pi->dev = &adev->dev; | ||
2794 | pi->pl330_data = NULL; | ||
2795 | pi->mcbufsz = pdat ? pdat->mcbuf_sz : 0; | ||
2796 | 2713 | ||
2797 | res = &adev->res; | 2714 | res = &adev->res; |
2798 | pi->base = devm_ioremap_resource(&adev->dev, res); | 2715 | pl330->base = devm_ioremap_resource(&adev->dev, res); |
2799 | if (IS_ERR(pi->base)) | 2716 | if (IS_ERR(pl330->base)) |
2800 | return PTR_ERR(pi->base); | 2717 | return PTR_ERR(pl330->base); |
2801 | 2718 | ||
2802 | amba_set_drvdata(adev, pdmac); | 2719 | amba_set_drvdata(adev, pl330); |
2803 | 2720 | ||
2804 | for (i = 0; i < AMBA_NR_IRQS; i++) { | 2721 | for (i = 0; i < AMBA_NR_IRQS; i++) { |
2805 | irq = adev->irq[i]; | 2722 | irq = adev->irq[i]; |
2806 | if (irq) { | 2723 | if (irq) { |
2807 | ret = devm_request_irq(&adev->dev, irq, | 2724 | ret = devm_request_irq(&adev->dev, irq, |
2808 | pl330_irq_handler, 0, | 2725 | pl330_irq_handler, 0, |
2809 | dev_name(&adev->dev), pi); | 2726 | dev_name(&adev->dev), pl330); |
2810 | if (ret) | 2727 | if (ret) |
2811 | return ret; | 2728 | return ret; |
2812 | } else { | 2729 | } else { |
@@ -2814,38 +2731,40 @@ pl330_probe(struct amba_device *adev, const struct amba_id *id) | |||
2814 | } | 2731 | } |
2815 | } | 2732 | } |
2816 | 2733 | ||
2817 | pi->pcfg.periph_id = adev->periphid; | 2734 | pcfg = &pl330->pcfg; |
2818 | ret = pl330_add(pi); | 2735 | |
2736 | pcfg->periph_id = adev->periphid; | ||
2737 | ret = pl330_add(pl330); | ||
2819 | if (ret) | 2738 | if (ret) |
2820 | return ret; | 2739 | return ret; |
2821 | 2740 | ||
2822 | INIT_LIST_HEAD(&pdmac->desc_pool); | 2741 | INIT_LIST_HEAD(&pl330->desc_pool); |
2823 | spin_lock_init(&pdmac->pool_lock); | 2742 | spin_lock_init(&pl330->pool_lock); |
2824 | 2743 | ||
2825 | /* Create a descriptor pool of default size */ | 2744 | /* Create a descriptor pool of default size */ |
2826 | if (!add_desc(pdmac, GFP_KERNEL, NR_DEFAULT_DESC)) | 2745 | if (!add_desc(pl330, GFP_KERNEL, NR_DEFAULT_DESC)) |
2827 | dev_warn(&adev->dev, "unable to allocate desc\n"); | 2746 | dev_warn(&adev->dev, "unable to allocate desc\n"); |
2828 | 2747 | ||
2829 | pd = &pdmac->ddma; | 2748 | pd = &pl330->ddma; |
2830 | INIT_LIST_HEAD(&pd->channels); | 2749 | INIT_LIST_HEAD(&pd->channels); |
2831 | 2750 | ||
2832 | /* Initialize channel parameters */ | 2751 | /* Initialize channel parameters */ |
2833 | if (pdat) | 2752 | if (pdat) |
2834 | num_chan = max_t(int, pdat->nr_valid_peri, pi->pcfg.num_chan); | 2753 | num_chan = max_t(int, pdat->nr_valid_peri, pcfg->num_chan); |
2835 | else | 2754 | else |
2836 | num_chan = max_t(int, pi->pcfg.num_peri, pi->pcfg.num_chan); | 2755 | num_chan = max_t(int, pcfg->num_peri, pcfg->num_chan); |
2837 | 2756 | ||
2838 | pdmac->num_peripherals = num_chan; | 2757 | pl330->num_peripherals = num_chan; |
2839 | 2758 | ||
2840 | pdmac->peripherals = kzalloc(num_chan * sizeof(*pch), GFP_KERNEL); | 2759 | pl330->peripherals = kzalloc(num_chan * sizeof(*pch), GFP_KERNEL); |
2841 | if (!pdmac->peripherals) { | 2760 | if (!pl330->peripherals) { |
2842 | ret = -ENOMEM; | 2761 | ret = -ENOMEM; |
2843 | dev_err(&adev->dev, "unable to allocate pdmac->peripherals\n"); | 2762 | dev_err(&adev->dev, "unable to allocate pl330->peripherals\n"); |
2844 | goto probe_err2; | 2763 | goto probe_err2; |
2845 | } | 2764 | } |
2846 | 2765 | ||
2847 | for (i = 0; i < num_chan; i++) { | 2766 | for (i = 0; i < num_chan; i++) { |
2848 | pch = &pdmac->peripherals[i]; | 2767 | pch = &pl330->peripherals[i]; |
2849 | if (!adev->dev.of_node) | 2768 | if (!adev->dev.of_node) |
2850 | pch->chan.private = pdat ? &pdat->peri_id[i] : NULL; | 2769 | pch->chan.private = pdat ? &pdat->peri_id[i] : NULL; |
2851 | else | 2770 | else |
@@ -2857,7 +2776,7 @@ pl330_probe(struct amba_device *adev, const struct amba_id *id) | |||
2857 | spin_lock_init(&pch->lock); | 2776 | spin_lock_init(&pch->lock); |
2858 | pch->thread = NULL; | 2777 | pch->thread = NULL; |
2859 | pch->chan.device = pd; | 2778 | pch->chan.device = pd; |
2860 | pch->dmac = pdmac; | 2779 | pch->dmac = pl330; |
2861 | 2780 | ||
2862 | /* Add the channel to the DMAC list */ | 2781 | /* Add the channel to the DMAC list */ |
2863 | list_add_tail(&pch->chan.device_node, &pd->channels); | 2782 | list_add_tail(&pch->chan.device_node, &pd->channels); |
@@ -2868,7 +2787,7 @@ pl330_probe(struct amba_device *adev, const struct amba_id *id) | |||
2868 | pd->cap_mask = pdat->cap_mask; | 2787 | pd->cap_mask = pdat->cap_mask; |
2869 | } else { | 2788 | } else { |
2870 | dma_cap_set(DMA_MEMCPY, pd->cap_mask); | 2789 | dma_cap_set(DMA_MEMCPY, pd->cap_mask); |
2871 | if (pi->pcfg.num_peri) { | 2790 | if (pcfg->num_peri) { |
2872 | dma_cap_set(DMA_SLAVE, pd->cap_mask); | 2791 | dma_cap_set(DMA_SLAVE, pd->cap_mask); |
2873 | dma_cap_set(DMA_CYCLIC, pd->cap_mask); | 2792 | dma_cap_set(DMA_CYCLIC, pd->cap_mask); |
2874 | dma_cap_set(DMA_PRIVATE, pd->cap_mask); | 2793 | dma_cap_set(DMA_PRIVATE, pd->cap_mask); |
@@ -2893,14 +2812,14 @@ pl330_probe(struct amba_device *adev, const struct amba_id *id) | |||
2893 | 2812 | ||
2894 | if (adev->dev.of_node) { | 2813 | if (adev->dev.of_node) { |
2895 | ret = of_dma_controller_register(adev->dev.of_node, | 2814 | ret = of_dma_controller_register(adev->dev.of_node, |
2896 | of_dma_pl330_xlate, pdmac); | 2815 | of_dma_pl330_xlate, pl330); |
2897 | if (ret) { | 2816 | if (ret) { |
2898 | dev_err(&adev->dev, | 2817 | dev_err(&adev->dev, |
2899 | "unable to register DMA to the generic DT DMA helpers\n"); | 2818 | "unable to register DMA to the generic DT DMA helpers\n"); |
2900 | } | 2819 | } |
2901 | } | 2820 | } |
2902 | 2821 | ||
2903 | adev->dev.dma_parms = &pdmac->dma_parms; | 2822 | adev->dev.dma_parms = &pl330->dma_parms; |
2904 | 2823 | ||
2905 | /* | 2824 | /* |
2906 | * This is the limit for transfers with a buswidth of 1, larger | 2825 | * This is the limit for transfers with a buswidth of 1, larger |
@@ -2915,14 +2834,13 @@ pl330_probe(struct amba_device *adev, const struct amba_id *id) | |||
2915 | "Loaded driver for PL330 DMAC-%d\n", adev->periphid); | 2834 | "Loaded driver for PL330 DMAC-%d\n", adev->periphid); |
2916 | dev_info(&adev->dev, | 2835 | dev_info(&adev->dev, |
2917 | "\tDBUFF-%ux%ubytes Num_Chans-%u Num_Peri-%u Num_Events-%u\n", | 2836 | "\tDBUFF-%ux%ubytes Num_Chans-%u Num_Peri-%u Num_Events-%u\n", |
2918 | pi->pcfg.data_buf_dep, | 2837 | pcfg->data_buf_dep, pcfg->data_bus_width / 8, pcfg->num_chan, |
2919 | pi->pcfg.data_bus_width / 8, pi->pcfg.num_chan, | 2838 | pcfg->num_peri, pcfg->num_events); |
2920 | pi->pcfg.num_peri, pi->pcfg.num_events); | ||
2921 | 2839 | ||
2922 | return 0; | 2840 | return 0; |
2923 | probe_err3: | 2841 | probe_err3: |
2924 | /* Idle the DMAC */ | 2842 | /* Idle the DMAC */ |
2925 | list_for_each_entry_safe(pch, _p, &pdmac->ddma.channels, | 2843 | list_for_each_entry_safe(pch, _p, &pl330->ddma.channels, |
2926 | chan.device_node) { | 2844 | chan.device_node) { |
2927 | 2845 | ||
2928 | /* Remove the channel */ | 2846 | /* Remove the channel */ |
@@ -2933,27 +2851,23 @@ probe_err3: | |||
2933 | pl330_free_chan_resources(&pch->chan); | 2851 | pl330_free_chan_resources(&pch->chan); |
2934 | } | 2852 | } |
2935 | probe_err2: | 2853 | probe_err2: |
2936 | pl330_del(pi); | 2854 | pl330_del(pl330); |
2937 | 2855 | ||
2938 | return ret; | 2856 | return ret; |
2939 | } | 2857 | } |
2940 | 2858 | ||
2941 | static int pl330_remove(struct amba_device *adev) | 2859 | static int pl330_remove(struct amba_device *adev) |
2942 | { | 2860 | { |
2943 | struct dma_pl330_dmac *pdmac = amba_get_drvdata(adev); | 2861 | struct pl330_dmac *pl330 = amba_get_drvdata(adev); |
2944 | struct dma_pl330_chan *pch, *_p; | 2862 | struct dma_pl330_chan *pch, *_p; |
2945 | struct pl330_info *pi; | ||
2946 | |||
2947 | if (!pdmac) | ||
2948 | return 0; | ||
2949 | 2863 | ||
2950 | if (adev->dev.of_node) | 2864 | if (adev->dev.of_node) |
2951 | of_dma_controller_free(adev->dev.of_node); | 2865 | of_dma_controller_free(adev->dev.of_node); |
2952 | 2866 | ||
2953 | dma_async_device_unregister(&pdmac->ddma); | 2867 | dma_async_device_unregister(&pl330->ddma); |
2954 | 2868 | ||
2955 | /* Idle the DMAC */ | 2869 | /* Idle the DMAC */ |
2956 | list_for_each_entry_safe(pch, _p, &pdmac->ddma.channels, | 2870 | list_for_each_entry_safe(pch, _p, &pl330->ddma.channels, |
2957 | chan.device_node) { | 2871 | chan.device_node) { |
2958 | 2872 | ||
2959 | /* Remove the channel */ | 2873 | /* Remove the channel */ |
@@ -2964,9 +2878,7 @@ static int pl330_remove(struct amba_device *adev) | |||
2964 | pl330_free_chan_resources(&pch->chan); | 2878 | pl330_free_chan_resources(&pch->chan); |
2965 | } | 2879 | } |
2966 | 2880 | ||
2967 | pi = &pdmac->pif; | 2881 | pl330_del(pl330); |
2968 | |||
2969 | pl330_del(pi); | ||
2970 | 2882 | ||
2971 | return 0; | 2883 | return 0; |
2972 | } | 2884 | } |