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authorStephen Warren <swarren@nvidia.com>2013-11-06 18:35:34 -0500
committerStephen Warren <swarren@nvidia.com>2013-12-11 18:43:20 -0500
commit9aa433d2a77220fc261cb8248bb93bdd8e3944ef (patch)
tree138c34d7fd2198bd1b1932e32ecf440ff483e9f6 /drivers/dma
parent80b28791ff0416a472e5a555a4b6f5f39df2fc24 (diff)
dma: tegra: use reset framework
Tegra's clock driver now provides an implementation of the common reset API (include/linux/reset.h). Use this instead of the old Tegra- specific API; that will soon be removed. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Acked-by: Dan Williams <dan.j.williams@intel.com> Acked-by: Vinod Koul <vinod.koul@intel.com>
Diffstat (limited to 'drivers/dma')
-rw-r--r--drivers/dma/tegra20-apb-dma.c13
1 files changed, 10 insertions, 3 deletions
diff --git a/drivers/dma/tegra20-apb-dma.c b/drivers/dma/tegra20-apb-dma.c
index 73654e33f13b..afa5844c9346 100644
--- a/drivers/dma/tegra20-apb-dma.c
+++ b/drivers/dma/tegra20-apb-dma.c
@@ -32,8 +32,8 @@
32#include <linux/platform_device.h> 32#include <linux/platform_device.h>
33#include <linux/pm.h> 33#include <linux/pm.h>
34#include <linux/pm_runtime.h> 34#include <linux/pm_runtime.h>
35#include <linux/reset.h>
35#include <linux/slab.h> 36#include <linux/slab.h>
36#include <linux/clk/tegra.h>
37 37
38#include "dmaengine.h" 38#include "dmaengine.h"
39 39
@@ -208,6 +208,7 @@ struct tegra_dma {
208 struct dma_device dma_dev; 208 struct dma_device dma_dev;
209 struct device *dev; 209 struct device *dev;
210 struct clk *dma_clk; 210 struct clk *dma_clk;
211 struct reset_control *rst;
211 spinlock_t global_lock; 212 spinlock_t global_lock;
212 void __iomem *base_addr; 213 void __iomem *base_addr;
213 const struct tegra_dma_chip_data *chip_data; 214 const struct tegra_dma_chip_data *chip_data;
@@ -1282,6 +1283,12 @@ static int tegra_dma_probe(struct platform_device *pdev)
1282 return PTR_ERR(tdma->dma_clk); 1283 return PTR_ERR(tdma->dma_clk);
1283 } 1284 }
1284 1285
1286 tdma->rst = devm_reset_control_get(&pdev->dev, "dma");
1287 if (IS_ERR(tdma->rst)) {
1288 dev_err(&pdev->dev, "Error: Missing reset\n");
1289 return PTR_ERR(tdma->rst);
1290 }
1291
1285 spin_lock_init(&tdma->global_lock); 1292 spin_lock_init(&tdma->global_lock);
1286 1293
1287 pm_runtime_enable(&pdev->dev); 1294 pm_runtime_enable(&pdev->dev);
@@ -1302,9 +1309,9 @@ static int tegra_dma_probe(struct platform_device *pdev)
1302 } 1309 }
1303 1310
1304 /* Reset DMA controller */ 1311 /* Reset DMA controller */
1305 tegra_periph_reset_assert(tdma->dma_clk); 1312 reset_control_assert(tdma->rst);
1306 udelay(2); 1313 udelay(2);
1307 tegra_periph_reset_deassert(tdma->dma_clk); 1314 reset_control_deassert(tdma->rst);
1308 1315
1309 /* Enable global DMA registers */ 1316 /* Enable global DMA registers */
1310 tdma_write(tdma, TEGRA_APBDMA_GENERAL, TEGRA_APBDMA_GENERAL_ENABLE); 1317 tdma_write(tdma, TEGRA_APBDMA_GENERAL, TEGRA_APBDMA_GENERAL_ENABLE);