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authorJonas Aaberg <jonas.aberg@stericsson.com>2010-06-20 17:25:54 -0400
committerDan Williams <dan.j.williams@intel.com>2010-06-22 21:01:55 -0400
commit2123a61e174074b849fce2277412836b1b897942 (patch)
tree4f96e988dba2dcb3689cbb5c31a32ef2100e33b8 /drivers/dma
parent0c32269d813c148194524fc8272f7ec1f7c90e6a (diff)
DMAENGINE: ste_dma40: interrupts only on dst
We don't want interrupts when the source is done, only when the destination is done and everything is complete at the recieveing end of a transfer. Signed-off-by: Jonas Aaberg <jonas.aberg@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'drivers/dma')
-rw-r--r--drivers/dma/ste_dma40.c2
-rw-r--r--drivers/dma/ste_dma40_ll.c11
2 files changed, 5 insertions, 8 deletions
diff --git a/drivers/dma/ste_dma40.c b/drivers/dma/ste_dma40.c
index abbc1b627bcc..aa098a672605 100644
--- a/drivers/dma/ste_dma40.c
+++ b/drivers/dma/ste_dma40.c
@@ -1759,7 +1759,7 @@ static struct dma_async_tx_descriptor *d40_prep_memcpy(struct dma_chan *chan,
1759 0, 1759 0,
1760 d40c->log_def.lcsp1, 1760 d40c->log_def.lcsp1,
1761 d40c->dma_cfg.src_info.data_width, 1761 d40c->dma_cfg.src_info.data_width,
1762 true, true); 1762 false, true);
1763 1763
1764 d40_log_fill_lli(d40d->lli_log.dst, 1764 d40_log_fill_lli(d40d->lli_log.dst,
1765 dst, 1765 dst,
diff --git a/drivers/dma/ste_dma40_ll.c b/drivers/dma/ste_dma40_ll.c
index e0194e4fd86c..772636be13eb 100644
--- a/drivers/dma/ste_dma40_ll.c
+++ b/drivers/dma/ste_dma40_ll.c
@@ -315,11 +315,8 @@ int d40_log_sg_to_dev(struct d40_lcla_elem *lcla,
315 int total_size = 0; 315 int total_size = 0;
316 struct scatterlist *current_sg = sg; 316 struct scatterlist *current_sg = sg;
317 int i; 317 int i;
318 u32 next_lli_off_dst; 318 u32 next_lli_off_dst = 0;
319 u32 next_lli_off_src; 319 u32 next_lli_off_src = 0;
320
321 next_lli_off_src = 0;
322 next_lli_off_dst = 0;
323 320
324 for_each_sg(sg, current_sg, sg_len, i) { 321 for_each_sg(sg, current_sg, sg_len, i) {
325 total_size += sg_dma_len(current_sg); 322 total_size += sg_dma_len(current_sg);
@@ -351,7 +348,7 @@ int d40_log_sg_to_dev(struct d40_lcla_elem *lcla,
351 sg_dma_len(current_sg), 348 sg_dma_len(current_sg),
352 next_lli_off_src, 349 next_lli_off_src,
353 lcsp->lcsp1, src_data_width, 350 lcsp->lcsp1, src_data_width,
354 term_int && !next_lli_off_src, 351 false,
355 true); 352 true);
356 d40_log_fill_lli(&lli->dst[i], 353 d40_log_fill_lli(&lli->dst[i],
357 dev_addr, 354 dev_addr,
@@ -375,7 +372,7 @@ int d40_log_sg_to_dev(struct d40_lcla_elem *lcla,
375 sg_dma_len(current_sg), 372 sg_dma_len(current_sg),
376 next_lli_off_src, 373 next_lli_off_src,
377 lcsp->lcsp1, src_data_width, 374 lcsp->lcsp1, src_data_width,
378 term_int && !next_lli_off_src, 375 false,
379 false); 376 false);
380 } 377 }
381 } 378 }