Merge remote branch 'gcl/next' into next

13 files changed, 156 insertions, 91 deletions

diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
index 6ee23592700a..ef138731c0ea 100644
--- a/drivers/dma/Kconfig
+++ b/drivers/dma/Kconfig
@@ -109,7 +109,7 @@ config FSL_DMA
 
 config MPC512X_DMA
         tristate "Freescale MPC512x built-in DMA engine support"
-        depends on PPC_MPC512x
+        depends on PPC_MPC512x || PPC_MPC831x
         select DMA_ENGINE
         ---help---
           Enable support for the Freescale MPC512x built-in DMA engine.
diff --git a/drivers/dma/Makefile b/drivers/dma/Makefile
index a8a84f4587f2..64b21f5cd740 100644
--- a/drivers/dma/Makefile
+++ b/drivers/dma/Makefile
@@ -1,8 +1,8 @@
 ifeq ($(CONFIG_DMADEVICES_DEBUG),y)
-        EXTRA_CFLAGS    += -DDEBUG
+        ccflags-y       += -DDEBUG
 endif
 ifeq ($(CONFIG_DMADEVICES_VDEBUG),y)
-        EXTRA_CFLAGS    += -DVERBOSE_DEBUG
+        ccflags-y       += -DVERBOSE_DEBUG
 endif
 
 obj-$(CONFIG_DMA_ENGINE) += dmaengine.o
diff --git a/drivers/dma/at_hdmac.c b/drivers/dma/at_hdmac.c
index a0f3e6a06e06..ea0ee81cff53 100644
--- a/drivers/dma/at_hdmac.c
+++ b/drivers/dma/at_hdmac.c
@@ -722,7 +722,7 @@ atc_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
                         desc->lli.daddr = mem;
                         desc->lli.ctrla = ctrla
                                         | ATC_DST_WIDTH(mem_width)
-                                        | len >> mem_width;
+                                        | len >> reg_width;
                         desc->lli.ctrlb = ctrlb;
 
                         if (!first) {
diff --git a/drivers/dma/fsldma.c b/drivers/dma/fsldma.c
index 286c3ac6bdcc..e5e172d21692 100644
--- a/drivers/dma/fsldma.c
+++ b/drivers/dma/fsldma.c
@@ -50,9 +50,11 @@ static void dma_init(struct fsldma_chan *chan)
                  * EIE - Error interrupt enable
                  * EOSIE - End of segments interrupt enable (basic mode)
                  * EOLNIE - End of links interrupt enable
+                 * BWC - Bandwidth sharing among channels
                  */
-                DMA_OUT(chan, &chan->regs->mr, FSL_DMA_MR_EIE
-                                | FSL_DMA_MR_EOLNIE | FSL_DMA_MR_EOSIE, 32);
+                DMA_OUT(chan, &chan->regs->mr, FSL_DMA_MR_BWC
+                                | FSL_DMA_MR_EIE | FSL_DMA_MR_EOLNIE
+                                | FSL_DMA_MR_EOSIE, 32);
                 break;
         case FSL_DMA_IP_83XX:
                 /* Set the channel to below modes:
diff --git a/drivers/dma/fsldma.h b/drivers/dma/fsldma.h
index cb4d6ff51597..ba9f403c0fbe 100644
--- a/drivers/dma/fsldma.h
+++ b/drivers/dma/fsldma.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved.
+ * Copyright (C) 2007-2010 Freescale Semiconductor, Inc. All rights reserved.
  *
  * Author:
  *   Zhang Wei <wei.zhang@freescale.com>, Jul 2007
@@ -36,6 +36,13 @@
 #define FSL_DMA_MR_DAHE         0x00002000
 #define FSL_DMA_MR_SAHE         0x00001000
 
+/*
+ * Bandwidth/pause control determines how many bytes a given
+ * channel is allowed to transfer before the DMA engine pauses
+ * the current channel and switches to the next channel
+ */
+#define FSL_DMA_MR_BWC         0x08000000
+
 /* Special MR definition for MPC8349 */
 #define FSL_DMA_MR_EOTIE        0x00000080
 #define FSL_DMA_MR_PRC_RM       0x00000800
diff --git a/drivers/dma/imx-dma.c b/drivers/dma/imx-dma.c
index f629e4961af5..e53d438142bb 100644
--- a/drivers/dma/imx-dma.c
+++ b/drivers/dma/imx-dma.c
@@ -379,7 +379,7 @@ static int __init imxdma_probe(struct platform_device *pdev)
         return 0;
 
 err_init:
-        while (i-- >= 0) {
+        while (--i >= 0) {
                 struct imxdma_channel *imxdmac = &imxdma->channel[i];
                 imx_dma_free(imxdmac->imxdma_channel);
         }
diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c
index 0834323a0599..d0602dd5d1b2 100644
--- a/drivers/dma/imx-sdma.c
+++ b/drivers/dma/imx-sdma.c
@@ -951,7 +951,7 @@ static struct dma_async_tx_descriptor *sdma_prep_slave_sg(
                 struct sdma_buffer_descriptor *bd = &sdmac->bd[i];
                 int param;
 
-                bd->buffer_addr = sgl->dma_address;
+                bd->buffer_addr = sg->dma_address;
 
                 count = sg->length;
 
@@ -1385,7 +1385,7 @@ static int __init sdma_module_init(void)
 {
         return platform_driver_probe(&sdma_driver, sdma_probe);
 }
-subsys_initcall(sdma_module_init);
+module_init(sdma_module_init);
 
 MODULE_AUTHOR("Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>");
 MODULE_DESCRIPTION("i.MX SDMA driver");
diff --git a/drivers/dma/intel_mid_dma.c b/drivers/dma/intel_mid_dma.c
index 338bc4eed1f3..3109bd94bc4f 100644
--- a/drivers/dma/intel_mid_dma.c
+++ b/drivers/dma/intel_mid_dma.c
@@ -1075,7 +1075,6 @@ static int mid_setup_dma(struct pci_dev *pdev)
         if (NULL == dma->dma_pool) {
                 pr_err("ERR_MDMA:pci_pool_create failed\n");
                 err = -ENOMEM;
-                kfree(dma);
                 goto err_dma_pool;
         }
 
@@ -1186,7 +1185,6 @@ err_engine:
         free_irq(pdev->irq, dma);
 err_irq:
         pci_pool_destroy(dma->dma_pool);
-        kfree(dma);
 err_dma_pool:
         pr_err("ERR_MDMA:setup_dma failed: %d\n", err);
         return err;
@@ -1413,7 +1411,7 @@ static const struct dev_pm_ops intel_mid_dma_pm = {
         .runtime_idle = dma_runtime_idle,
 };
 
-static struct pci_driver intel_mid_dma_pci = {
+static struct pci_driver intel_mid_dma_pci_driver = {
         .name           =       "Intel MID DMA",
         .id_table       =       intel_mid_dma_ids,
         .probe          =       intel_mid_dma_probe,
@@ -1431,13 +1429,13 @@ static int __init intel_mid_dma_init(void)
 {
         pr_debug("INFO_MDMA: LNW DMA Driver Version %s\n",
                         INTEL_MID_DMA_DRIVER_VERSION);
-        return pci_register_driver(&intel_mid_dma_pci);
+        return pci_register_driver(&intel_mid_dma_pci_driver);
 }
 fs_initcall(intel_mid_dma_init);
 
 static void __exit intel_mid_dma_exit(void)
 {
-        pci_unregister_driver(&intel_mid_dma_pci);
+        pci_unregister_driver(&intel_mid_dma_pci_driver);
 }
 module_exit(intel_mid_dma_exit);
 
diff --git a/drivers/dma/ioat/Makefile b/drivers/dma/ioat/Makefile
index 8997d3fb9051..0ff7270af25b 100644
--- a/drivers/dma/ioat/Makefile
+++ b/drivers/dma/ioat/Makefile
@@ -1,2 +1,2 @@
 obj-$(CONFIG_INTEL_IOATDMA) += ioatdma.o
-ioatdma-objs := pci.o dma.o dma_v2.o dma_v3.o dca.o
+ioatdma-y := pci.o dma.o dma_v2.o dma_v3.o dca.o
diff --git a/drivers/dma/mpc512x_dma.c b/drivers/dma/mpc512x_dma.c
index 4e9cbf300594..59c270192ccc 100644
--- a/drivers/dma/mpc512x_dma.c
+++ b/drivers/dma/mpc512x_dma.c
@@ -1,6 +1,7 @@
 /*
  * Copyright (C) Freescale Semicondutor, Inc. 2007, 2008.
  * Copyright (C) Semihalf 2009
+ * Copyright (C) Ilya Yanok, Emcraft Systems 2010
  *
  * Written by Piotr Ziecik <kosmo@semihalf.com>. Hardware description
  * (defines, structures and comments) was taken from MPC5121 DMA driver
@@ -70,6 +71,8 @@
 #define MPC_DMA_DMAES_SBE       (1 << 1)
 #define MPC_DMA_DMAES_DBE       (1 << 0)
 
+#define MPC_DMA_DMAGPOR_SNOOP_ENABLE    (1 << 6)
+
 #define MPC_DMA_TSIZE_1         0x00
 #define MPC_DMA_TSIZE_2         0x01
 #define MPC_DMA_TSIZE_4         0x02
@@ -104,7 +107,10 @@ struct __attribute__ ((__packed__)) mpc_dma_regs {
         /* 0x30 */
         u32 dmahrsh;            /* DMA hw request status high(ch63~32) */
         u32 dmahrsl;            /* DMA hardware request status low(ch31~0) */
-        u32 dmaihsa;            /* DMA interrupt high select AXE(ch63~32) */
+        union {
+                u32 dmaihsa;    /* DMA interrupt high select AXE(ch63~32) */
+                u32 dmagpor;    /* (General purpose register on MPC8308) */
+        };
         u32 dmailsa;            /* DMA interrupt low select AXE(ch31~0) */
         /* 0x40 ~ 0xff */
         u32 reserve0[48];       /* Reserved */
@@ -195,7 +201,9 @@ struct mpc_dma {
         struct mpc_dma_regs __iomem     *regs;
         struct mpc_dma_tcd __iomem      *tcd;
         int                             irq;
+        int                             irq2;
         uint                            error_status;
+        int                             is_mpc8308;
 
         /* Lock for error_status field in this structure */
         spinlock_t                      error_status_lock;
@@ -252,11 +260,13 @@ static void mpc_dma_execute(struct mpc_dma_chan *mchan)
                 prev = mdesc;
         }
 
-        prev->tcd->start = 0;
         prev->tcd->int_maj = 1;
 
         /* Send first descriptor in chain into hardware */
         memcpy_toio(&mdma->tcd[cid], first->tcd, sizeof(struct mpc_dma_tcd));
+
+        if (first != prev)
+                mdma->tcd[cid].e_sg = 1;
         out_8(&mdma->regs->dmassrt, cid);
 }
 
@@ -274,6 +284,9 @@ static void mpc_dma_irq_process(struct mpc_dma *mdma, u32 is, u32 es, int off)
 
                 spin_lock(&mchan->lock);
 
+                out_8(&mdma->regs->dmacint, ch + off);
+                out_8(&mdma->regs->dmacerr, ch + off);
+
                 /* Check error status */
                 if (es & (1 << ch))
                         list_for_each_entry(mdesc, &mchan->active, node)
@@ -302,36 +315,68 @@ static irqreturn_t mpc_dma_irq(int irq, void *data)
         spin_unlock(&mdma->error_status_lock);
 
         /* Handle interrupt on each channel */
-        mpc_dma_irq_process(mdma, in_be32(&mdma->regs->dmainth),
+        if (mdma->dma.chancnt > 32) {
+                mpc_dma_irq_process(mdma, in_be32(&mdma->regs->dmainth),
                                         in_be32(&mdma->regs->dmaerrh), 32);
+        }
         mpc_dma_irq_process(mdma, in_be32(&mdma->regs->dmaintl),
                                         in_be32(&mdma->regs->dmaerrl), 0);
 
-        /* Ack interrupt on all channels */
-        out_be32(&mdma->regs->dmainth, 0xFFFFFFFF);
-        out_be32(&mdma->regs->dmaintl, 0xFFFFFFFF);
-        out_be32(&mdma->regs->dmaerrh, 0xFFFFFFFF);
-        out_be32(&mdma->regs->dmaerrl, 0xFFFFFFFF);
-
         /* Schedule tasklet */
         tasklet_schedule(&mdma->tasklet);
 
         return IRQ_HANDLED;
 }
 
-/* DMA Tasklet */
-static void mpc_dma_tasklet(unsigned long data)
+/* proccess completed descriptors */
+static void mpc_dma_process_completed(struct mpc_dma *mdma)
 {
-        struct mpc_dma *mdma = (void *)data;
         dma_cookie_t last_cookie = 0;
         struct mpc_dma_chan *mchan;
         struct mpc_dma_desc *mdesc;
         struct dma_async_tx_descriptor *desc;
         unsigned long flags;
         LIST_HEAD(list);
-        uint es;
         int i;
 
+        for (i = 0; i < mdma->dma.chancnt; i++) {
+                mchan = &mdma->channels[i];
+
+                /* Get all completed descriptors */
+                spin_lock_irqsave(&mchan->lock, flags);
+                if (!list_empty(&mchan->completed))
+                        list_splice_tail_init(&mchan->completed, &list);
+                spin_unlock_irqrestore(&mchan->lock, flags);
+
+                if (list_empty(&list))
+                        continue;
+
+                /* Execute callbacks and run dependencies */
+                list_for_each_entry(mdesc, &list, node) {
+                        desc = &mdesc->desc;
+
+                        if (desc->callback)
+                                desc->callback(desc->callback_param);
+
+                        last_cookie = desc->cookie;
+                        dma_run_dependencies(desc);
+                }
+
+                /* Free descriptors */
+                spin_lock_irqsave(&mchan->lock, flags);
+                list_splice_tail_init(&list, &mchan->free);
+                mchan->completed_cookie = last_cookie;
+                spin_unlock_irqrestore(&mchan->lock, flags);
+        }
+}
+
+/* DMA Tasklet */
+static void mpc_dma_tasklet(unsigned long data)
+{
+        struct mpc_dma *mdma = (void *)data;
+        unsigned long flags;
+        uint es;
+
         spin_lock_irqsave(&mdma->error_status_lock, flags);
         es = mdma->error_status;
         mdma->error_status = 0;
@@ -370,35 +415,7 @@ static void mpc_dma_tasklet(unsigned long data)
                         dev_err(mdma->dma.dev, "- Destination Bus Error\n");
         }
 
-        for (i = 0; i < mdma->dma.chancnt; i++) {
-                mchan = &mdma->channels[i];
-
-                /* Get all completed descriptors */
-                spin_lock_irqsave(&mchan->lock, flags);
-                if (!list_empty(&mchan->completed))
-                        list_splice_tail_init(&mchan->completed, &list);
-                spin_unlock_irqrestore(&mchan->lock, flags);
-
-                if (list_empty(&list))
-                        continue;
-
-                /* Execute callbacks and run dependencies */
-                list_for_each_entry(mdesc, &list, node) {
-                        desc = &mdesc->desc;
-
-                        if (desc->callback)
-                                desc->callback(desc->callback_param);
-
-                        last_cookie = desc->cookie;
-                        dma_run_dependencies(desc);
-                }
-
-                /* Free descriptors */
-                spin_lock_irqsave(&mchan->lock, flags);
-                list_splice_tail_init(&list, &mchan->free);
-                mchan->completed_cookie = last_cookie;
-                spin_unlock_irqrestore(&mchan->lock, flags);
-        }
+        mpc_dma_process_completed(mdma);
 }
 
 /* Submit descriptor to hardware */
@@ -563,6 +580,7 @@ static struct dma_async_tx_descriptor *
 mpc_dma_prep_memcpy(struct dma_chan *chan, dma_addr_t dst, dma_addr_t src,
                                         size_t len, unsigned long flags)
 {
+        struct mpc_dma *mdma = dma_chan_to_mpc_dma(chan);
         struct mpc_dma_chan *mchan = dma_chan_to_mpc_dma_chan(chan);
         struct mpc_dma_desc *mdesc = NULL;
         struct mpc_dma_tcd *tcd;
@@ -577,8 +595,11 @@ mpc_dma_prep_memcpy(struct dma_chan *chan, dma_addr_t dst, dma_addr_t src,
         }
         spin_unlock_irqrestore(&mchan->lock, iflags);
 
-        if (!mdesc)
+        if (!mdesc) {
+                /* try to free completed descriptors */
+                mpc_dma_process_completed(mdma);
                 return NULL;
+        }
 
         mdesc->error = 0;
         tcd = mdesc->tcd;
@@ -591,7 +612,8 @@ mpc_dma_prep_memcpy(struct dma_chan *chan, dma_addr_t dst, dma_addr_t src,
                 tcd->dsize = MPC_DMA_TSIZE_32;
                 tcd->soff = 32;
                 tcd->doff = 32;
-        } else if (IS_ALIGNED(src | dst | len, 16)) {
+        } else if (!mdma->is_mpc8308 && IS_ALIGNED(src | dst | len, 16)) {
+                /* MPC8308 doesn't support 16 byte transfers */
                 tcd->ssize = MPC_DMA_TSIZE_16;
                 tcd->dsize = MPC_DMA_TSIZE_16;
                 tcd->soff = 16;
@@ -651,6 +673,15 @@ static int __devinit mpc_dma_probe(struct platform_device *op,
                 return -EINVAL;
         }
 
+        if (of_device_is_compatible(dn, "fsl,mpc8308-dma")) {
+                mdma->is_mpc8308 = 1;
+                mdma->irq2 = irq_of_parse_and_map(dn, 1);
+                if (mdma->irq2 == NO_IRQ) {
+                        dev_err(dev, "Error mapping IRQ!\n");
+                        return -EINVAL;
+                }
+        }
+
         retval = of_address_to_resource(dn, 0, &res);
         if (retval) {
                 dev_err(dev, "Error parsing memory region!\n");
@@ -681,11 +712,23 @@ static int __devinit mpc_dma_probe(struct platform_device *op,
                 return -EINVAL;
         }
 
+        if (mdma->is_mpc8308) {
+                retval = devm_request_irq(dev, mdma->irq2, &mpc_dma_irq, 0,
+                                DRV_NAME, mdma);
+                if (retval) {
+                        dev_err(dev, "Error requesting IRQ2!\n");
+                        return -EINVAL;
+                }
+        }
+
         spin_lock_init(&mdma->error_status_lock);
 
         dma = &mdma->dma;
         dma->dev = dev;
-        dma->chancnt = MPC_DMA_CHANNELS;
+        if (!mdma->is_mpc8308)
+                dma->chancnt = MPC_DMA_CHANNELS;
+        else
+                dma->chancnt = 16; /* MPC8308 DMA has only 16 channels */
         dma->device_alloc_chan_resources = mpc_dma_alloc_chan_resources;
         dma->device_free_chan_resources = mpc_dma_free_chan_resources;
         dma->device_issue_pending = mpc_dma_issue_pending;
@@ -721,26 +764,40 @@ static int __devinit mpc_dma_probe(struct platform_device *op,
          * - Round-robin group arbitration,
          * - Round-robin channel arbitration.
          */
-        out_be32(&mdma->regs->dmacr, MPC_DMA_DMACR_EDCG |
-                                MPC_DMA_DMACR_ERGA | MPC_DMA_DMACR_ERCA);
-
-        /* Disable hardware DMA requests */
-        out_be32(&mdma->regs->dmaerqh, 0);
-        out_be32(&mdma->regs->dmaerql, 0);
-
-        /* Disable error interrupts */
-        out_be32(&mdma->regs->dmaeeih, 0);
-        out_be32(&mdma->regs->dmaeeil, 0);
-
-        /* Clear interrupts status */
-        out_be32(&mdma->regs->dmainth, 0xFFFFFFFF);
-        out_be32(&mdma->regs->dmaintl, 0xFFFFFFFF);
-        out_be32(&mdma->regs->dmaerrh, 0xFFFFFFFF);
-        out_be32(&mdma->regs->dmaerrl, 0xFFFFFFFF);
-
-        /* Route interrupts to IPIC */
-        out_be32(&mdma->regs->dmaihsa, 0);
-        out_be32(&mdma->regs->dmailsa, 0);
+        if (!mdma->is_mpc8308) {
+                out_be32(&mdma->regs->dmacr, MPC_DMA_DMACR_EDCG |
+                                        MPC_DMA_DMACR_ERGA | MPC_DMA_DMACR_ERCA);
+
+                /* Disable hardware DMA requests */
+                out_be32(&mdma->regs->dmaerqh, 0);
+                out_be32(&mdma->regs->dmaerql, 0);
+
+                /* Disable error interrupts */
+                out_be32(&mdma->regs->dmaeeih, 0);
+                out_be32(&mdma->regs->dmaeeil, 0);
+
+                /* Clear interrupts status */
+                out_be32(&mdma->regs->dmainth, 0xFFFFFFFF);
+                out_be32(&mdma->regs->dmaintl, 0xFFFFFFFF);
+                out_be32(&mdma->regs->dmaerrh, 0xFFFFFFFF);
+                out_be32(&mdma->regs->dmaerrl, 0xFFFFFFFF);
+
+                /* Route interrupts to IPIC */
+                out_be32(&mdma->regs->dmaihsa, 0);
+                out_be32(&mdma->regs->dmailsa, 0);
+        } else {
+                /* MPC8308 has 16 channels and lacks some registers */
+                out_be32(&mdma->regs->dmacr, MPC_DMA_DMACR_ERCA);
+
+                /* enable snooping */
+                out_be32(&mdma->regs->dmagpor, MPC_DMA_DMAGPOR_SNOOP_ENABLE);
+                /* Disable error interrupts */
+                out_be32(&mdma->regs->dmaeeil, 0);
+
+                /* Clear interrupts status */
+                out_be32(&mdma->regs->dmaintl, 0xFFFF);
+                out_be32(&mdma->regs->dmaerrl, 0xFFFF);
+        }
 
         /* Register DMA engine */
         dev_set_drvdata(dev, mdma);
diff --git a/drivers/dma/pch_dma.c b/drivers/dma/pch_dma.c
index 92b679024fed..c064c89420d0 100644
--- a/drivers/dma/pch_dma.c
+++ b/drivers/dma/pch_dma.c
@@ -259,11 +259,6 @@ static void pdc_dostart(struct pch_dma_chan *pd_chan, struct pch_dma_desc* desc)
                 return;
         }
 
-        channel_writel(pd_chan, DEV_ADDR, desc->regs.dev_addr);
-        channel_writel(pd_chan, MEM_ADDR, desc->regs.mem_addr);
-        channel_writel(pd_chan, SIZE, desc->regs.size);
-        channel_writel(pd_chan, NEXT, desc->regs.next);
-
         dev_dbg(chan2dev(&pd_chan->chan), "chan %d -> dev_addr: %x\n",
                 pd_chan->chan.chan_id, desc->regs.dev_addr);
         dev_dbg(chan2dev(&pd_chan->chan), "chan %d -> mem_addr: %x\n",
@@ -273,10 +268,16 @@ static void pdc_dostart(struct pch_dma_chan *pd_chan, struct pch_dma_desc* desc)
         dev_dbg(chan2dev(&pd_chan->chan), "chan %d -> next: %x\n",
                 pd_chan->chan.chan_id, desc->regs.next);
 
-        if (list_empty(&desc->tx_list))
+        if (list_empty(&desc->tx_list)) {
+                channel_writel(pd_chan, DEV_ADDR, desc->regs.dev_addr);
+                channel_writel(pd_chan, MEM_ADDR, desc->regs.mem_addr);
+                channel_writel(pd_chan, SIZE, desc->regs.size);
+                channel_writel(pd_chan, NEXT, desc->regs.next);
                 pdc_set_mode(&pd_chan->chan, DMA_CTL0_ONESHOT);
-        else
+        } else {
+                channel_writel(pd_chan, NEXT, desc->txd.phys);
                 pdc_set_mode(&pd_chan->chan, DMA_CTL0_SG);
+        }
 
         val = dma_readl(pd, CTL2);
         val |= 1 << (DMA_CTL2_START_SHIFT_BITS + pd_chan->chan.chan_id);
diff --git a/drivers/dma/ppc4xx/adma.c b/drivers/dma/ppc4xx/adma.c
index 0d58a4a4487f..cef584533ee8 100644
--- a/drivers/dma/ppc4xx/adma.c
+++ b/drivers/dma/ppc4xx/adma.c
@@ -4449,9 +4449,8 @@ static int __devinit ppc440spe_adma_probe(struct platform_device *ofdev,
 
         if (!request_mem_region(res.start, resource_size(&res),
                                 dev_driver_string(&ofdev->dev))) {
-                dev_err(&ofdev->dev, "failed to request memory region "
-                        "(0x%016llx-0x%016llx)\n",
-                        (u64)res.start, (u64)res.end);
+                dev_err(&ofdev->dev, "failed to request memory region %pR\n",
+                        &res);
                 initcode = PPC_ADMA_INIT_MEMREG;
                 ret = -EBUSY;
                 goto out;
diff --git a/drivers/dma/shdma.c b/drivers/dma/shdma.c
index eb6b54dbb806..85ffd5e38c50 100644
--- a/drivers/dma/shdma.c
+++ b/drivers/dma/shdma.c
@@ -1213,3 +1213,4 @@ module_exit(sh_dmae_exit);
 MODULE_AUTHOR("Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>");
 MODULE_DESCRIPTION("Renesas SH DMA Engine driver");
 MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:sh-dma-engine");