Merge tag 'cleanup-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC cleanups from Olof Johansson:
 "This is the branch where we usually queue up cleanup efforts, moving
  drivers out of the architecture directory, header file restructuring,
  etc.  Sometimes they tangle with new development so it's hard to keep
  it strictly to cleanups.

  Some of the things included in this branch are:

   * Atmel SAMA5 conversion to common clock
   * Reset framework conversion for tegra platforms
    - Some of this depends on tegra clock driver reworks that are shared
      with Mike Turquette's clk tree.
   * Tegra DMA refactoring, which are shared branches with the DMA tree.
   * Removal of some header files on exynos to prepare for
     multiplatform"

* tag 'cleanup-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (169 commits)
  ARM: mvebu: move Armada 370/XP specific definitions to armada-370-xp.h
  ARM: mvebu: remove prototypes of non-existing functions from common.h
  ARM: mvebu: move ARMADA_XP_MAX_CPUS to armada-370-xp.h
  serial: sh-sci: Rework baud rate calculation
  serial: sh-sci: Compute overrun_bit without using baud rate algo
  serial: sh-sci: Remove unused GPIO request code
  serial: sh-sci: Move overrun_bit and error_mask fields out of pdata
  serial: sh-sci: Support resources passed through platform resources
  serial: sh-sci: Don't check IRQ in verify port operation
  serial: sh-sci: Set the UPF_FIXED_PORT flag
  serial: sh-sci: Remove duplicate interrupt check in verify port op
  serial: sh-sci: Simplify baud rate calculation algorithms
  serial: sh-sci: Remove baud rate calculation algorithm 5
  serial: sh-sci: Sort headers alphabetically
  ARM: EXYNOS: Kill exynos_pm_late_initcall()
  ARM: EXYNOS: Consolidate selection of PM_GENERIC_DOMAINS for Exynos4
  ARM: at91: switch Calao QIL-A9260 board to DT
  clk: at91: fix pmc_clk_ids data type attriubte
  PM / devfreq: use inclusion <mach/map.h> instead of <plat/map-s5p.h>
  ARM: EXYNOS: remove <mach/regs-clock.h> for exynos
  ...

4 files changed, 83 insertions, 29 deletions

diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
index c823daaf9043..c10eb89a3c1b 100644
--- a/drivers/dma/Kconfig
+++ b/drivers/dma/Kconfig
@@ -292,9 +292,11 @@ config MMP_TDMA
         bool "MMP Two-Channel DMA support"
         depends on ARCH_MMP
         select DMA_ENGINE
+        select MMP_SRAM
         help
           Support the MMP Two-Channel DMA engine.
           This engine used for MMP Audio DMA and pxa910 SQU.
+          It needs sram driver under mach-mmp.
 
           Say Y here if you enabled MMP ADMA, otherwise say N.
 
diff --git a/drivers/dma/dmaengine.c b/drivers/dma/dmaengine.c
index 92caad629d99..ed610b497518 100644
--- a/drivers/dma/dmaengine.c
+++ b/drivers/dma/dmaengine.c
@@ -535,6 +535,34 @@ struct dma_chan *dma_get_slave_channel(struct dma_chan *chan)
 }
 EXPORT_SYMBOL_GPL(dma_get_slave_channel);
 
+struct dma_chan *dma_get_any_slave_channel(struct dma_device *device)
+{
+        dma_cap_mask_t mask;
+        struct dma_chan *chan;
+        int err;
+
+        dma_cap_zero(mask);
+        dma_cap_set(DMA_SLAVE, mask);
+
+        /* lock against __dma_request_channel */
+        mutex_lock(&dma_list_mutex);
+
+        chan = private_candidate(&mask, device, NULL, NULL);
+        if (chan) {
+                err = dma_chan_get(chan);
+                if (err) {
+                        pr_debug("%s: failed to get %s: (%d)\n",
+                                __func__, dma_chan_name(chan), err);
+                        chan = NULL;
+                }
+        }
+
+        mutex_unlock(&dma_list_mutex);
+
+        return chan;
+}
+EXPORT_SYMBOL_GPL(dma_get_any_slave_channel);
+
 /**
  * __dma_request_channel - try to allocate an exclusive channel
  * @mask: capabilities that the channel must satisfy
diff --git a/drivers/dma/mmp_pdma.c b/drivers/dma/mmp_pdma.c
index 8869500ab92b..c6a01ea8bc59 100644
--- a/drivers/dma/mmp_pdma.c
+++ b/drivers/dma/mmp_pdma.c
@@ -893,33 +893,17 @@ static struct dma_chan *mmp_pdma_dma_xlate(struct of_phandle_args *dma_spec,
                                            struct of_dma *ofdma)
 {
         struct mmp_pdma_device *d = ofdma->of_dma_data;
-        struct dma_chan *chan, *candidate;
+        struct dma_chan *chan;
+        struct mmp_pdma_chan *c;
 
-retry:
-        candidate = NULL;
-
-        /* walk the list of channels registered with the current instance and
-         * find one that is currently unused */
-        list_for_each_entry(chan, &d->device.channels, device_node)
-                if (chan->client_count == 0) {
-                        candidate = chan;
-                        break;
-                }
-
-        if (!candidate)
+        chan = dma_get_any_slave_channel(&d->device);
+        if (!chan)
                 return NULL;
 
-        /* dma_get_slave_channel will return NULL if we lost a race between
-         * the lookup and the reservation */
-        chan = dma_get_slave_channel(candidate);
-
-        if (chan) {
-                struct mmp_pdma_chan *c = to_mmp_pdma_chan(chan);
-                c->drcmr = dma_spec->args[0];
-                return chan;
-        }
+        c = to_mmp_pdma_chan(chan);
+        c->drcmr = dma_spec->args[0];
 
-        goto retry;
+        return chan;
 }
 
 static int mmp_pdma_probe(struct platform_device *op)
diff --git a/drivers/dma/tegra20-apb-dma.c b/drivers/dma/tegra20-apb-dma.c
index 73654e33f13b..d11bb3620f27 100644
--- a/drivers/dma/tegra20-apb-dma.c
+++ b/drivers/dma/tegra20-apb-dma.c
@@ -1,7 +1,7 @@
 /*
  * DMA driver for Nvidia's Tegra20 APB DMA controller.
  *
- * Copyright (c) 2012, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2012-2013, NVIDIA CORPORATION.  All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -29,11 +29,12 @@
 #include <linux/module.h>
 #include <linux/of.h>
 #include <linux/of_device.h>
+#include <linux/of_dma.h>
 #include <linux/platform_device.h>
 #include <linux/pm.h>
 #include <linux/pm_runtime.h>
+#include <linux/reset.h>
 #include <linux/slab.h>
-#include <linux/clk/tegra.h>
 
 #include "dmaengine.h"
 
@@ -199,6 +200,7 @@ struct tegra_dma_channel {
         void                    *callback_param;
 
         /* Channel-slave specific configuration */
+        unsigned int slave_id;
         struct dma_slave_config dma_sconfig;
         struct tegra_dma_channel_regs   channel_reg;
 };
@@ -208,6 +210,7 @@ struct tegra_dma {
         struct dma_device               dma_dev;
         struct device                   *dev;
         struct clk                      *dma_clk;
+        struct reset_control            *rst;
         spinlock_t                      global_lock;
         void __iomem                    *base_addr;
         const struct tegra_dma_chip_data *chip_data;
@@ -339,6 +342,8 @@ static int tegra_dma_slave_config(struct dma_chan *dc,
         }
 
         memcpy(&tdc->dma_sconfig, sconfig, sizeof(*sconfig));
+        if (!tdc->slave_id)
+                tdc->slave_id = sconfig->slave_id;
         tdc->config_init = true;
         return 0;
 }
@@ -941,7 +946,7 @@ static struct dma_async_tx_descriptor *tegra_dma_prep_slave_sg(
         ahb_seq |= TEGRA_APBDMA_AHBSEQ_BUS_WIDTH_32;
 
         csr |= TEGRA_APBDMA_CSR_ONCE | TEGRA_APBDMA_CSR_FLOW;
-        csr |= tdc->dma_sconfig.slave_id << TEGRA_APBDMA_CSR_REQ_SEL_SHIFT;
+        csr |= tdc->slave_id << TEGRA_APBDMA_CSR_REQ_SEL_SHIFT;
         if (flags & DMA_PREP_INTERRUPT)
                 csr |= TEGRA_APBDMA_CSR_IE_EOC;
 
@@ -1085,7 +1090,7 @@ static struct dma_async_tx_descriptor *tegra_dma_prep_dma_cyclic(
         csr |= TEGRA_APBDMA_CSR_FLOW;
         if (flags & DMA_PREP_INTERRUPT)
                 csr |= TEGRA_APBDMA_CSR_IE_EOC;
-        csr |= tdc->dma_sconfig.slave_id << TEGRA_APBDMA_CSR_REQ_SEL_SHIFT;
+        csr |= tdc->slave_id << TEGRA_APBDMA_CSR_REQ_SEL_SHIFT;
 
         apb_seq |= TEGRA_APBDMA_APBSEQ_WRAP_WORD_1;
 
@@ -1205,6 +1210,25 @@ static void tegra_dma_free_chan_resources(struct dma_chan *dc)
                 kfree(sg_req);
         }
         clk_disable_unprepare(tdma->dma_clk);
+
+        tdc->slave_id = 0;
+}
+
+static struct dma_chan *tegra_dma_of_xlate(struct of_phandle_args *dma_spec,
+                                           struct of_dma *ofdma)
+{
+        struct tegra_dma *tdma = ofdma->of_dma_data;
+        struct dma_chan *chan;
+        struct tegra_dma_channel *tdc;
+
+        chan = dma_get_any_slave_channel(&tdma->dma_dev);
+        if (!chan)
+                return NULL;
+
+        tdc = to_tegra_dma_chan(chan);
+        tdc->slave_id = dma_spec->args[0];
+
+        return chan;
 }
 
 /* Tegra20 specific DMA controller information */
@@ -1282,6 +1306,12 @@ static int tegra_dma_probe(struct platform_device *pdev)
                 return PTR_ERR(tdma->dma_clk);
         }
 
+        tdma->rst = devm_reset_control_get(&pdev->dev, "dma");
+        if (IS_ERR(tdma->rst)) {
+                dev_err(&pdev->dev, "Error: Missing reset\n");
+                return PTR_ERR(tdma->rst);
+        }
+
         spin_lock_init(&tdma->global_lock);
 
         pm_runtime_enable(&pdev->dev);
@@ -1302,9 +1332,9 @@ static int tegra_dma_probe(struct platform_device *pdev)
         }
 
         /* Reset DMA controller */
-        tegra_periph_reset_assert(tdma->dma_clk);
+        reset_control_assert(tdma->rst);
         udelay(2);
-        tegra_periph_reset_deassert(tdma->dma_clk);
+        reset_control_deassert(tdma->rst);
 
         /* Enable global DMA registers */
         tdma_write(tdma, TEGRA_APBDMA_GENERAL, TEGRA_APBDMA_GENERAL_ENABLE);
@@ -1376,10 +1406,20 @@ static int tegra_dma_probe(struct platform_device *pdev)
                 goto err_irq;
         }
 
+        ret = of_dma_controller_register(pdev->dev.of_node,
+                                         tegra_dma_of_xlate, tdma);
+        if (ret < 0) {
+                dev_err(&pdev->dev,
+                        "Tegra20 APB DMA OF registration failed %d\n", ret);
+                goto err_unregister_dma_dev;
+        }
+
         dev_info(&pdev->dev, "Tegra20 APB DMA driver register %d channels\n",
                         cdata->nr_channels);
         return 0;
 
+err_unregister_dma_dev:
+        dma_async_device_unregister(&tdma->dma_dev);
 err_irq:
         while (--i >= 0) {
                 struct tegra_dma_channel *tdc = &tdma->channels[i];