diff options
author | Vinod Koul <vinod.koul@linux.intel.com> | 2012-08-05 03:34:33 -0400 |
---|---|---|
committer | Vinod Koul <vinod.koul@linux.intel.com> | 2012-08-05 03:34:33 -0400 |
commit | df3d898c9f200e9e08a7b2223136759edb98a01d (patch) | |
tree | 036399507682be0dad2450c5c9533ac57df8f00a /drivers/dma | |
parent | 0d7614f09c1ebdbaa1599a5aba7593f147bf96ee (diff) | |
parent | fed57cd375ece6d271e45d9ad630c7de632e74b6 (diff) |
Merge branch 'for-3.7' into next
Diffstat (limited to 'drivers/dma')
-rw-r--r-- | drivers/dma/dw_dmac.c | 53 | ||||
-rw-r--r-- | drivers/dma/dw_dmac_regs.h | 2 | ||||
-rw-r--r-- | drivers/dma/tegra20-apb-dma.c | 18 |
3 files changed, 27 insertions, 46 deletions
diff --git a/drivers/dma/dw_dmac.c b/drivers/dma/dw_dmac.c index d3c5a5a88f1e..4f4ff1337cac 100644 --- a/drivers/dma/dw_dmac.c +++ b/drivers/dma/dw_dmac.c | |||
@@ -1392,26 +1392,17 @@ static int __devinit dw_probe(struct platform_device *pdev) | |||
1392 | 1392 | ||
1393 | size = sizeof(struct dw_dma); | 1393 | size = sizeof(struct dw_dma); |
1394 | size += pdata->nr_channels * sizeof(struct dw_dma_chan); | 1394 | size += pdata->nr_channels * sizeof(struct dw_dma_chan); |
1395 | dw = kzalloc(size, GFP_KERNEL); | 1395 | dw = devm_kzalloc(&pdev->dev, size, GFP_KERNEL); |
1396 | if (!dw) | 1396 | if (!dw) |
1397 | return -ENOMEM; | 1397 | return -ENOMEM; |
1398 | 1398 | ||
1399 | if (!request_mem_region(io->start, DW_REGLEN, pdev->dev.driver->name)) { | 1399 | dw->regs = devm_request_and_ioremap(&pdev->dev, io); |
1400 | err = -EBUSY; | 1400 | if (!dw->regs) |
1401 | goto err_kfree; | 1401 | return -EBUSY; |
1402 | } | ||
1403 | |||
1404 | dw->regs = ioremap(io->start, DW_REGLEN); | ||
1405 | if (!dw->regs) { | ||
1406 | err = -ENOMEM; | ||
1407 | goto err_release_r; | ||
1408 | } | ||
1409 | 1402 | ||
1410 | dw->clk = clk_get(&pdev->dev, "hclk"); | 1403 | dw->clk = devm_clk_get(&pdev->dev, "hclk"); |
1411 | if (IS_ERR(dw->clk)) { | 1404 | if (IS_ERR(dw->clk)) |
1412 | err = PTR_ERR(dw->clk); | 1405 | return PTR_ERR(dw->clk); |
1413 | goto err_clk; | ||
1414 | } | ||
1415 | clk_prepare_enable(dw->clk); | 1406 | clk_prepare_enable(dw->clk); |
1416 | 1407 | ||
1417 | /* Calculate all channel mask before DMA setup */ | 1408 | /* Calculate all channel mask before DMA setup */ |
@@ -1423,9 +1414,10 @@ static int __devinit dw_probe(struct platform_device *pdev) | |||
1423 | /* disable BLOCK interrupts as well */ | 1414 | /* disable BLOCK interrupts as well */ |
1424 | channel_clear_bit(dw, MASK.BLOCK, dw->all_chan_mask); | 1415 | channel_clear_bit(dw, MASK.BLOCK, dw->all_chan_mask); |
1425 | 1416 | ||
1426 | err = request_irq(irq, dw_dma_interrupt, 0, "dw_dmac", dw); | 1417 | err = devm_request_irq(&pdev->dev, irq, dw_dma_interrupt, 0, |
1418 | "dw_dmac", dw); | ||
1427 | if (err) | 1419 | if (err) |
1428 | goto err_irq; | 1420 | return err; |
1429 | 1421 | ||
1430 | platform_set_drvdata(pdev, dw); | 1422 | platform_set_drvdata(pdev, dw); |
1431 | 1423 | ||
@@ -1491,30 +1483,16 @@ static int __devinit dw_probe(struct platform_device *pdev) | |||
1491 | dma_async_device_register(&dw->dma); | 1483 | dma_async_device_register(&dw->dma); |
1492 | 1484 | ||
1493 | return 0; | 1485 | return 0; |
1494 | |||
1495 | err_irq: | ||
1496 | clk_disable_unprepare(dw->clk); | ||
1497 | clk_put(dw->clk); | ||
1498 | err_clk: | ||
1499 | iounmap(dw->regs); | ||
1500 | dw->regs = NULL; | ||
1501 | err_release_r: | ||
1502 | release_resource(io); | ||
1503 | err_kfree: | ||
1504 | kfree(dw); | ||
1505 | return err; | ||
1506 | } | 1486 | } |
1507 | 1487 | ||
1508 | static int __devexit dw_remove(struct platform_device *pdev) | 1488 | static int __devexit dw_remove(struct platform_device *pdev) |
1509 | { | 1489 | { |
1510 | struct dw_dma *dw = platform_get_drvdata(pdev); | 1490 | struct dw_dma *dw = platform_get_drvdata(pdev); |
1511 | struct dw_dma_chan *dwc, *_dwc; | 1491 | struct dw_dma_chan *dwc, *_dwc; |
1512 | struct resource *io; | ||
1513 | 1492 | ||
1514 | dw_dma_off(dw); | 1493 | dw_dma_off(dw); |
1515 | dma_async_device_unregister(&dw->dma); | 1494 | dma_async_device_unregister(&dw->dma); |
1516 | 1495 | ||
1517 | free_irq(platform_get_irq(pdev, 0), dw); | ||
1518 | tasklet_kill(&dw->tasklet); | 1496 | tasklet_kill(&dw->tasklet); |
1519 | 1497 | ||
1520 | list_for_each_entry_safe(dwc, _dwc, &dw->dma.channels, | 1498 | list_for_each_entry_safe(dwc, _dwc, &dw->dma.channels, |
@@ -1523,17 +1501,6 @@ static int __devexit dw_remove(struct platform_device *pdev) | |||
1523 | channel_clear_bit(dw, CH_EN, dwc->mask); | 1501 | channel_clear_bit(dw, CH_EN, dwc->mask); |
1524 | } | 1502 | } |
1525 | 1503 | ||
1526 | clk_disable_unprepare(dw->clk); | ||
1527 | clk_put(dw->clk); | ||
1528 | |||
1529 | iounmap(dw->regs); | ||
1530 | dw->regs = NULL; | ||
1531 | |||
1532 | io = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
1533 | release_mem_region(io->start, DW_REGLEN); | ||
1534 | |||
1535 | kfree(dw); | ||
1536 | |||
1537 | return 0; | 1504 | return 0; |
1538 | } | 1505 | } |
1539 | 1506 | ||
diff --git a/drivers/dma/dw_dmac_regs.h b/drivers/dma/dw_dmac_regs.h index 50830bee087a..f6d92d72ae40 100644 --- a/drivers/dma/dw_dmac_regs.h +++ b/drivers/dma/dw_dmac_regs.h | |||
@@ -140,8 +140,6 @@ struct dw_dma_regs { | |||
140 | /* Bitfields in CFG */ | 140 | /* Bitfields in CFG */ |
141 | #define DW_CFG_DMA_EN (1 << 0) | 141 | #define DW_CFG_DMA_EN (1 << 0) |
142 | 142 | ||
143 | #define DW_REGLEN 0x400 | ||
144 | |||
145 | enum dw_dmac_flags { | 143 | enum dw_dmac_flags { |
146 | DW_DMA_IS_CYCLIC = 0, | 144 | DW_DMA_IS_CYCLIC = 0, |
147 | }; | 145 | }; |
diff --git a/drivers/dma/tegra20-apb-dma.c b/drivers/dma/tegra20-apb-dma.c index d52dbc6c54ab..24acd711e032 100644 --- a/drivers/dma/tegra20-apb-dma.c +++ b/drivers/dma/tegra20-apb-dma.c | |||
@@ -1119,15 +1119,21 @@ struct dma_async_tx_descriptor *tegra_dma_prep_dma_cyclic( | |||
1119 | static int tegra_dma_alloc_chan_resources(struct dma_chan *dc) | 1119 | static int tegra_dma_alloc_chan_resources(struct dma_chan *dc) |
1120 | { | 1120 | { |
1121 | struct tegra_dma_channel *tdc = to_tegra_dma_chan(dc); | 1121 | struct tegra_dma_channel *tdc = to_tegra_dma_chan(dc); |
1122 | struct tegra_dma *tdma = tdc->tdma; | ||
1123 | int ret; | ||
1122 | 1124 | ||
1123 | dma_cookie_init(&tdc->dma_chan); | 1125 | dma_cookie_init(&tdc->dma_chan); |
1124 | tdc->config_init = false; | 1126 | tdc->config_init = false; |
1125 | return 0; | 1127 | ret = clk_prepare_enable(tdma->dma_clk); |
1128 | if (ret < 0) | ||
1129 | dev_err(tdc2dev(tdc), "clk_prepare_enable failed: %d\n", ret); | ||
1130 | return ret; | ||
1126 | } | 1131 | } |
1127 | 1132 | ||
1128 | static void tegra_dma_free_chan_resources(struct dma_chan *dc) | 1133 | static void tegra_dma_free_chan_resources(struct dma_chan *dc) |
1129 | { | 1134 | { |
1130 | struct tegra_dma_channel *tdc = to_tegra_dma_chan(dc); | 1135 | struct tegra_dma_channel *tdc = to_tegra_dma_chan(dc); |
1136 | struct tegra_dma *tdma = tdc->tdma; | ||
1131 | 1137 | ||
1132 | struct tegra_dma_desc *dma_desc; | 1138 | struct tegra_dma_desc *dma_desc; |
1133 | struct tegra_dma_sg_req *sg_req; | 1139 | struct tegra_dma_sg_req *sg_req; |
@@ -1163,6 +1169,7 @@ static void tegra_dma_free_chan_resources(struct dma_chan *dc) | |||
1163 | list_del(&sg_req->node); | 1169 | list_del(&sg_req->node); |
1164 | kfree(sg_req); | 1170 | kfree(sg_req); |
1165 | } | 1171 | } |
1172 | clk_disable_unprepare(tdma->dma_clk); | ||
1166 | } | 1173 | } |
1167 | 1174 | ||
1168 | /* Tegra20 specific DMA controller information */ | 1175 | /* Tegra20 specific DMA controller information */ |
@@ -1255,6 +1262,13 @@ static int __devinit tegra_dma_probe(struct platform_device *pdev) | |||
1255 | } | 1262 | } |
1256 | } | 1263 | } |
1257 | 1264 | ||
1265 | /* Enable clock before accessing registers */ | ||
1266 | ret = clk_prepare_enable(tdma->dma_clk); | ||
1267 | if (ret < 0) { | ||
1268 | dev_err(&pdev->dev, "clk_prepare_enable failed: %d\n", ret); | ||
1269 | goto err_pm_disable; | ||
1270 | } | ||
1271 | |||
1258 | /* Reset DMA controller */ | 1272 | /* Reset DMA controller */ |
1259 | tegra_periph_reset_assert(tdma->dma_clk); | 1273 | tegra_periph_reset_assert(tdma->dma_clk); |
1260 | udelay(2); | 1274 | udelay(2); |
@@ -1265,6 +1279,8 @@ static int __devinit tegra_dma_probe(struct platform_device *pdev) | |||
1265 | tdma_write(tdma, TEGRA_APBDMA_CONTROL, 0); | 1279 | tdma_write(tdma, TEGRA_APBDMA_CONTROL, 0); |
1266 | tdma_write(tdma, TEGRA_APBDMA_IRQ_MASK_SET, 0xFFFFFFFFul); | 1280 | tdma_write(tdma, TEGRA_APBDMA_IRQ_MASK_SET, 0xFFFFFFFFul); |
1267 | 1281 | ||
1282 | clk_disable_unprepare(tdma->dma_clk); | ||
1283 | |||
1268 | INIT_LIST_HEAD(&tdma->dma_dev.channels); | 1284 | INIT_LIST_HEAD(&tdma->dma_dev.channels); |
1269 | for (i = 0; i < cdata->nr_channels; i++) { | 1285 | for (i = 0; i < cdata->nr_channels; i++) { |
1270 | struct tegra_dma_channel *tdc = &tdma->channels[i]; | 1286 | struct tegra_dma_channel *tdc = &tdma->channels[i]; |