diff options
author | Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2013-03-26 10:53:54 -0400 |
---|---|---|
committer | Vinod Koul <vinod.koul@intel.com> | 2013-04-15 00:21:19 -0400 |
commit | 75c6122526f931ee7c23df9a05f0091b65c95e02 (patch) | |
tree | 3550e64e517e965bbbe6a95c5486d964ebb18414 /drivers/dma | |
parent | a53e28da574a40bcc9f78f5d0b0b60570182595b (diff) |
dw_dmac: fix style of the comments
Let's use capital letter as a first one in the comments.
There is no functional changes.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Diffstat (limited to 'drivers/dma')
-rw-r--r-- | drivers/dma/dw_dmac.c | 30 |
1 files changed, 15 insertions, 15 deletions
diff --git a/drivers/dma/dw_dmac.c b/drivers/dma/dw_dmac.c index 43e2e89886cc..d6dbb1428200 100644 --- a/drivers/dma/dw_dmac.c +++ b/drivers/dma/dw_dmac.c | |||
@@ -173,7 +173,7 @@ static void dwc_initialize(struct dw_dma_chan *dwc) | |||
173 | return; | 173 | return; |
174 | 174 | ||
175 | if (dws && dws->cfg_hi == ~0 && dws->cfg_lo == ~0) { | 175 | if (dws && dws->cfg_hi == ~0 && dws->cfg_lo == ~0) { |
176 | /* autoconfigure based on request line from DT */ | 176 | /* Autoconfigure based on request line from DT */ |
177 | if (dwc->direction == DMA_MEM_TO_DEV) | 177 | if (dwc->direction == DMA_MEM_TO_DEV) |
178 | cfghi = DWC_CFGH_DST_PER(dwc->request_line); | 178 | cfghi = DWC_CFGH_DST_PER(dwc->request_line); |
179 | else if (dwc->direction == DMA_DEV_TO_MEM) | 179 | else if (dwc->direction == DMA_DEV_TO_MEM) |
@@ -473,16 +473,16 @@ static void dwc_scan_descriptors(struct dw_dma *dw, struct dw_dma_chan *dwc) | |||
473 | (unsigned long long)llp); | 473 | (unsigned long long)llp); |
474 | 474 | ||
475 | list_for_each_entry_safe(desc, _desc, &dwc->active_list, desc_node) { | 475 | list_for_each_entry_safe(desc, _desc, &dwc->active_list, desc_node) { |
476 | /* initial residue value */ | 476 | /* Initial residue value */ |
477 | dwc->residue = desc->total_len; | 477 | dwc->residue = desc->total_len; |
478 | 478 | ||
479 | /* check first descriptors addr */ | 479 | /* Check first descriptors addr */ |
480 | if (desc->txd.phys == llp) { | 480 | if (desc->txd.phys == llp) { |
481 | spin_unlock_irqrestore(&dwc->lock, flags); | 481 | spin_unlock_irqrestore(&dwc->lock, flags); |
482 | return; | 482 | return; |
483 | } | 483 | } |
484 | 484 | ||
485 | /* check first descriptors llp */ | 485 | /* Check first descriptors llp */ |
486 | if (desc->lli.llp == llp) { | 486 | if (desc->lli.llp == llp) { |
487 | /* This one is currently in progress */ | 487 | /* This one is currently in progress */ |
488 | dwc->residue -= dwc_get_sent(dwc); | 488 | dwc->residue -= dwc_get_sent(dwc); |
@@ -588,7 +588,7 @@ inline dma_addr_t dw_dma_get_dst_addr(struct dma_chan *chan) | |||
588 | } | 588 | } |
589 | EXPORT_SYMBOL(dw_dma_get_dst_addr); | 589 | EXPORT_SYMBOL(dw_dma_get_dst_addr); |
590 | 590 | ||
591 | /* called with dwc->lock held and all DMAC interrupts disabled */ | 591 | /* Called with dwc->lock held and all DMAC interrupts disabled */ |
592 | static void dwc_handle_cyclic(struct dw_dma *dw, struct dw_dma_chan *dwc, | 592 | static void dwc_handle_cyclic(struct dw_dma *dw, struct dw_dma_chan *dwc, |
593 | u32 status_err, u32 status_xfer) | 593 | u32 status_err, u32 status_xfer) |
594 | { | 594 | { |
@@ -626,7 +626,7 @@ static void dwc_handle_cyclic(struct dw_dma *dw, struct dw_dma_chan *dwc, | |||
626 | 626 | ||
627 | dwc_chan_disable(dw, dwc); | 627 | dwc_chan_disable(dw, dwc); |
628 | 628 | ||
629 | /* make sure DMA does not restart by loading a new list */ | 629 | /* Make sure DMA does not restart by loading a new list */ |
630 | channel_writel(dwc, LLP, 0); | 630 | channel_writel(dwc, LLP, 0); |
631 | channel_writel(dwc, CTL_LO, 0); | 631 | channel_writel(dwc, CTL_LO, 0); |
632 | channel_writel(dwc, CTL_HI, 0); | 632 | channel_writel(dwc, CTL_HI, 0); |
@@ -1256,7 +1256,7 @@ static bool dw_dma_generic_filter(struct dma_chan *chan, void *param) | |||
1256 | struct dw_dma_filter_args *fargs = param; | 1256 | struct dw_dma_filter_args *fargs = param; |
1257 | struct dw_dma_slave *dws = &dwc->slave; | 1257 | struct dw_dma_slave *dws = &dwc->slave; |
1258 | 1258 | ||
1259 | /* ensure the device matches our channel */ | 1259 | /* Ensure the device matches our channel */ |
1260 | if (chan->device != &fargs->dw->dma) | 1260 | if (chan->device != &fargs->dw->dma) |
1261 | return false; | 1261 | return false; |
1262 | 1262 | ||
@@ -1323,7 +1323,7 @@ int dw_dma_cyclic_start(struct dma_chan *chan) | |||
1323 | 1323 | ||
1324 | spin_lock_irqsave(&dwc->lock, flags); | 1324 | spin_lock_irqsave(&dwc->lock, flags); |
1325 | 1325 | ||
1326 | /* assert channel is idle */ | 1326 | /* Assert channel is idle */ |
1327 | if (dma_readl(dw, CH_EN) & dwc->mask) { | 1327 | if (dma_readl(dw, CH_EN) & dwc->mask) { |
1328 | dev_err(chan2dev(&dwc->chan), | 1328 | dev_err(chan2dev(&dwc->chan), |
1329 | "BUG: Attempted to start non-idle channel\n"); | 1329 | "BUG: Attempted to start non-idle channel\n"); |
@@ -1335,7 +1335,7 @@ int dw_dma_cyclic_start(struct dma_chan *chan) | |||
1335 | dma_writel(dw, CLEAR.ERROR, dwc->mask); | 1335 | dma_writel(dw, CLEAR.ERROR, dwc->mask); |
1336 | dma_writel(dw, CLEAR.XFER, dwc->mask); | 1336 | dma_writel(dw, CLEAR.XFER, dwc->mask); |
1337 | 1337 | ||
1338 | /* setup DMAC channel registers */ | 1338 | /* Setup DMAC channel registers */ |
1339 | channel_writel(dwc, LLP, dwc->cdesc->desc[0]->txd.phys); | 1339 | channel_writel(dwc, LLP, dwc->cdesc->desc[0]->txd.phys); |
1340 | channel_writel(dwc, CTL_LO, DWC_CTLL_LLP_D_EN | DWC_CTLL_LLP_S_EN); | 1340 | channel_writel(dwc, CTL_LO, DWC_CTLL_LLP_D_EN | DWC_CTLL_LLP_S_EN); |
1341 | channel_writel(dwc, CTL_HI, 0); | 1341 | channel_writel(dwc, CTL_HI, 0); |
@@ -1502,7 +1502,7 @@ struct dw_cyclic_desc *dw_dma_cyclic_prep(struct dma_chan *chan, | |||
1502 | last = desc; | 1502 | last = desc; |
1503 | } | 1503 | } |
1504 | 1504 | ||
1505 | /* lets make a cyclic list */ | 1505 | /* Let's make a cyclic list */ |
1506 | last->lli.llp = cdesc->desc[0]->txd.phys; | 1506 | last->lli.llp = cdesc->desc[0]->txd.phys; |
1507 | 1507 | ||
1508 | dev_dbg(chan2dev(&dwc->chan), "cyclic prepared buf 0x%llx len %zu " | 1508 | dev_dbg(chan2dev(&dwc->chan), "cyclic prepared buf 0x%llx len %zu " |
@@ -1707,7 +1707,7 @@ static int dw_probe(struct platform_device *pdev) | |||
1707 | 1707 | ||
1708 | dw->regs = regs; | 1708 | dw->regs = regs; |
1709 | 1709 | ||
1710 | /* get hardware configuration parameters */ | 1710 | /* Get hardware configuration parameters */ |
1711 | if (autocfg) { | 1711 | if (autocfg) { |
1712 | max_blk_size = dma_readl(dw, MAX_BLK_SIZE); | 1712 | max_blk_size = dma_readl(dw, MAX_BLK_SIZE); |
1713 | 1713 | ||
@@ -1729,10 +1729,10 @@ static int dw_probe(struct platform_device *pdev) | |||
1729 | /* Calculate all channel mask before DMA setup */ | 1729 | /* Calculate all channel mask before DMA setup */ |
1730 | dw->all_chan_mask = (1 << nr_channels) - 1; | 1730 | dw->all_chan_mask = (1 << nr_channels) - 1; |
1731 | 1731 | ||
1732 | /* force dma off, just in case */ | 1732 | /* Force dma off, just in case */ |
1733 | dw_dma_off(dw); | 1733 | dw_dma_off(dw); |
1734 | 1734 | ||
1735 | /* disable BLOCK interrupts as well */ | 1735 | /* Disable BLOCK interrupts as well */ |
1736 | channel_clear_bit(dw, MASK.BLOCK, dw->all_chan_mask); | 1736 | channel_clear_bit(dw, MASK.BLOCK, dw->all_chan_mask); |
1737 | 1737 | ||
1738 | err = devm_request_irq(&pdev->dev, irq, dw_dma_interrupt, 0, | 1738 | err = devm_request_irq(&pdev->dev, irq, dw_dma_interrupt, 0, |
@@ -1742,7 +1742,7 @@ static int dw_probe(struct platform_device *pdev) | |||
1742 | 1742 | ||
1743 | platform_set_drvdata(pdev, dw); | 1743 | platform_set_drvdata(pdev, dw); |
1744 | 1744 | ||
1745 | /* create a pool of consistent memory blocks for hardware descriptors */ | 1745 | /* Create a pool of consistent memory blocks for hardware descriptors */ |
1746 | dw->desc_pool = dmam_pool_create("dw_dmac_desc_pool", &pdev->dev, | 1746 | dw->desc_pool = dmam_pool_create("dw_dmac_desc_pool", &pdev->dev, |
1747 | sizeof(struct dw_desc), 4, 0); | 1747 | sizeof(struct dw_desc), 4, 0); |
1748 | if (!dw->desc_pool) { | 1748 | if (!dw->desc_pool) { |
@@ -1783,7 +1783,7 @@ static int dw_probe(struct platform_device *pdev) | |||
1783 | 1783 | ||
1784 | dwc->direction = DMA_TRANS_NONE; | 1784 | dwc->direction = DMA_TRANS_NONE; |
1785 | 1785 | ||
1786 | /* hardware configuration */ | 1786 | /* Hardware configuration */ |
1787 | if (autocfg) { | 1787 | if (autocfg) { |
1788 | unsigned int dwc_params; | 1788 | unsigned int dwc_params; |
1789 | 1789 | ||