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authorChris Leech <christopher.leech@intel.com>2007-03-08 12:57:35 -0500
committerDan Williams <dan.j.williams@intel.com>2007-07-11 18:39:04 -0400
commit70774b47392171faae0e98f795aa1507f9246af1 (patch)
treedc6e61846b7f140e2756e77bbf2adff4011c4ed6 /drivers/dma
parente38288117c50fe22ed1693c2d8397245bb7e1a53 (diff)
ioatdma: Remove the use of writeq from the ioatdma driver
There's only one now anyway, and it's not in a performance path, so make it behave the same on 32-bit and 64-bit CPUs. Signed-off-by: Chris Leech <christopher.leech@intel.com>
Diffstat (limited to 'drivers/dma')
-rw-r--r--drivers/dma/ioatdma.c10
1 files changed, 4 insertions, 6 deletions
diff --git a/drivers/dma/ioatdma.c b/drivers/dma/ioatdma.c
index 275707097bf1..b3fca1200a73 100644
--- a/drivers/dma/ioatdma.c
+++ b/drivers/dma/ioatdma.c
@@ -608,13 +608,11 @@ static void ioat_start_null_desc(struct ioat_dma_chan *ioat_chan)
608 list_add_tail(&desc->node, &ioat_chan->used_desc); 608 list_add_tail(&desc->node, &ioat_chan->used_desc);
609 spin_unlock_bh(&ioat_chan->desc_lock); 609 spin_unlock_bh(&ioat_chan->desc_lock);
610 610
611#if (BITS_PER_LONG == 64) 611 writel(((u64) desc->phys) & 0x00000000FFFFFFFF,
612 writeq(desc->phys, ioat_chan->reg_base + IOAT_CHAINADDR_OFFSET);
613#else
614 writel((u32) desc->phys,
615 ioat_chan->reg_base + IOAT_CHAINADDR_OFFSET_LOW); 612 ioat_chan->reg_base + IOAT_CHAINADDR_OFFSET_LOW);
616 writel(0, ioat_chan->reg_base + IOAT_CHAINADDR_OFFSET_HIGH); 613 writel(((u64) desc->phys) >> 32,
617#endif 614 ioat_chan->reg_base + IOAT_CHAINADDR_OFFSET_HIGH);
615
618 writeb(IOAT_CHANCMD_START, ioat_chan->reg_base + IOAT_CHANCMD_OFFSET); 616 writeb(IOAT_CHANCMD_START, ioat_chan->reg_base + IOAT_CHANCMD_OFFSET);
619} 617}
620 618